/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.td | 42 def BR : InstRR<0x07, (outs), (ins ADDR64:$R2), 43 "br\t$R2", [(brind ADDR64:$R2)]>; 122 def BR : InstRR<0x07, (outs), (ins ADDR64:$R2), "b"##name##"r\t$R2", []>; 239 def CallBASR : Alias<2, (outs), (ins ADDR64:$R2, variable_ops), 240 [(z_call ADDR64:$R2)]>; 268 def BASR : InstRR<0x0D, (outs), (ins GR64:$R1, ADDR64:$R2), [all...] |
/external/valgrind/VEX/priv/ |
host_mips_isel.c | 125 Addr64 max_ga; 644 Addr64 target = mode64 ? (Addr)cee->addr : [all...] |
host_ppc_isel.c | 291 Addr64 max_ga; [all...] |
guest_amd64_toIR.c | 195 static Addr64 guest_RIP_bbstart; 199 static Addr64 guest_RIP_curr_instr; 216 static Addr64 guest_RIP_next_assumed; [all...] |
guest_ppc_toIR.c | 210 static Addr64 guest_CIA_bbstart; 214 static Addr64 guest_CIA_curr_instr; 508 static Addr64 nextInsnAddr( void ) [all...] |
host_s390_isel.c | 120 Addr64 max_ga; 517 Addr64 target; [all...] |
host_tilegx_defs.c | 798 TILEGXInstr *TILEGXInstr_Call ( TILEGXCondCode cond, Addr64 target, 816 TILEGXInstr *TILEGXInstr_CallAlways ( TILEGXCondCode cond, Addr64 target, 832 TILEGXInstr *TILEGXInstr_XDirect ( Addr64 dstGA, TILEGXAMode* amPC, [all...] |
host_mips_defs.c | 869 MIPSInstr *MIPSInstr_Call ( MIPSCondCode cond, Addr64 target, UInt argiregs, 888 MIPSInstr *MIPSInstr_CallAlways ( MIPSCondCode cond, Addr64 target, 906 MIPSInstr *MIPSInstr_XDirect ( Addr64 dstGA, MIPSAMode* amPC, [all...] |
guest_mips_toIR.c | 65 static Addr64 guest_PC_curr_instr; 1010 static void jmp_lit64 ( /*MOD*/ DisResult* dres, IRJumpKind kind, Addr64 d64 ) [all...] |
host_arm64_isel.c | 105 Addr64 max_ga; 487 Addr64 target; [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
x86-64-opcode.s | 70 # 66 -- -- -- 77 FD ; O16 override: (Addr64) = ZEXT(Addr16) 71 # 66 -- -- -- 0F 87 F9 FF FF FF ; O16 override: (Addr64) = ZEXT(Addr16) 377 # SLDT (%eax) # -- 67 -- -- 0F 00 00 ; A32 override: (Addr64) = ZEXT(Addr32 )
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/external/llvm/lib/Target/AMDGPU/InstPrinter/ |
AMDGPUInstPrinter.cpp | 70 O << " addr64";
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/external/llvm/test/CodeGen/AMDGPU/ |
cgp-addressing-modes.ll | 196 ; CI: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
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srl.ll | 203 ; GCN-DAG: buffer_load_dword v[[HI_A:[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
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/external/valgrind/VEX/switchback/ |
switchback.c | 109 static Bool chase_into_ok ( void* opaque, Addr64 dst ) {
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/external/valgrind/include/ |
pub_tool_basics.h | 46 // Addr, Addr32, Addr64, HWord, HChar, Bool, False and True.
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/toolchain/binutils/binutils-2.25/opcodes/po/ |
da.po | 442 msgid " addr64 Assume 64bit address size\n" 443 msgstr " addr64 Antag 64bit-adressest?rrelse\n" [all...] |
fr.po | 447 msgid " addr64 Assume 64bit address size\n" 448 msgstr " addr64 Taille des adresses : 64 bits\n" [all...] |
ga.po | 441 msgid " addr64 Assume 64bit address size\n" 442 msgstr " addr64 Glac le seolta? 64-giot?n\n" [all...] |
id.po | 445 msgid " addr64 Assume 64bit address size\n" 446 msgstr " addr64 Asumsikan ukuran alamat 64bit\n" [all...] |
it.po | 446 msgid " addr64 Assume 64bit address size\n" 447 msgstr " addr64 Assume 64bit come dimensione degli indirizzi\n" [all...] |
nl.po | 460 msgid " addr64 Assume 64bit address size\n" 461 msgstr " addr64 Ga uit van een 64-bits adresgrootte\n" [all...] |
uk.po | 491 msgid " addr64 Assume 64bit address size\n" 492 msgstr " addr64 ?????????? 64-??????? ?????? ?????\n" [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILInstrInfo.td | 158 def ADDR64 : ComplexPattern<i64, 2, "SelectADDR64", [], []>;
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/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 310 // additionally can do r + r + i with addr64. 32-bit has more addressing 317 // different than the normal addr64. [all...] |