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  /external/llvm/test/CodeGen/Hexagon/
absaddr-store.ll 2 ; Check that we generate load instructions with absolute addressing mode.
  /external/llvm/test/Transforms/IndVarSimplify/
preserve-signed-wrap.ll 4 ; sext for the addressing, however it shouldn't eliminate the sext
  /external/llvm/test/Transforms/LoopStrengthReduce/AArch64/
lsr-memcpy.ll 3 ; Prevent LSR of doing poor choice that cannot be folded in addressing mode
  /external/llvm/test/Transforms/StraightLineStrengthReduce/X86/
no-slsr.ll 6 ; Do not perform SLSR on &input[s] and &input[s * 2] which fit into addressing
  /frameworks/av/media/libstagefright/codecs/amrnb/common/
Android.mk 72 #addressing b/25409744
  /hardware/broadcom/wlan/bcmdhd/dhdutil/include/
bcmdefs.h 141 #define DMADDRWIDTH_30 30 /* 30-bit addressing capability */
142 #define DMADDRWIDTH_32 32 /* 32-bit addressing capability */
143 #define DMADDRWIDTH_63 63 /* 64-bit addressing capability */
144 #define DMADDRWIDTH_64 64 /* 64-bit addressing capability */
  /prebuilts/go/darwin-x86/src/net/
tcpsock.go 11 Zone string // IPv6 scoped addressing zone
udpsock.go 11 Zone string // IPv6 scoped addressing zone
  /prebuilts/go/linux-x86/src/net/
tcpsock.go 11 Zone string // IPv6 scoped addressing zone
udpsock.go 11 Zone string // IPv6 scoped addressing zone
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
ldr-t-bad.l 11 [^:]*:48: Error: cannot use register index with PC-relative addressing -- `str r1,\[r15,#10\]'
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ieee-fp/
x930509a.exp 36 # C54x alignment/addressing is different, so the listing looks different
  /toolchain/binutils/binutils-2.25/include/coff/
h8300.h 39 offset - eg the strange jump and high page addressing modes. */
mipspe.h 40 offset - eg the strange jump and high page addressing modes. */
  /toolchain/binutils/binutils-2.25/include/elf/
epiphany.h 51 /* 11 bit magnitude addressing displacement. */
  /external/libchrome/sandbox/win/src/sidestep/
mini_disassembler.h 119 // points to a register, we can tell by the addressing mode).
139 // when 16-bit addressing mode is being used. Defined in
144 // when 32-bit addressing mode is being used. Defined in
  /toolchain/binutils/binutils-2.25/gas/doc/
c-d10v.texi 60 * D10V-Addressing:: Addressing Modes
203 @node D10V-Addressing
204 @subsection Addressing Modes
205 @cindex addressing modes, D10V
206 @cindex D10V addressing modes
207 @code{@value{AS}} understands the following addressing modes for the D10V.
c-d30v.texi 59 * D30V-Addressing:: Addressing Modes
254 @node D30V-Addressing
255 @subsection Addressing Modes
256 @cindex addressing modes, D30V
257 @cindex D30V addressing modes
258 @code{@value{AS}} understands the following addressing modes for the D30V.
  /external/llvm/test/MC/SystemZ/
insn-bad.s 86 #CHECK: error: invalid use of indexed addressing
229 #CHECK: error: invalid use of indexed addressing
544 #CHECK: error: invalid use of indexed addressing
652 #CHECK: error: invalid use of indexed addressing
694 #CHECK: error: invalid use of indexed addressing
762 #CHECK: error: invalid use of length addressing
780 #CHECK: error: invalid use of indexed addressing
782 #CHECK: error: invalid use of indexed addressing
821 #CHECK: error: invalid use of indexed addressing
913 #CHECK: error: invalid use of indexed addressing
    [all...]
  /external/llvm/lib/Target/AMDGPU/
AMDGPUInstrInfo.h 99 /// read or write or -1 if indirect addressing is not used by this program.
103 /// read or write or -1 if indirect addressing is not used by this program.
160 /// We model indirect addressing using a virtual address space that can be
  /external/llvm/lib/Target/ARM/MCTargetDesc/
ARMAddressingModes.h 1 //===-- ARMAddressingModes.h - ARM Addressing Modes -------------*- C++ -*-===//
10 // This file contains the ARM addressing mode implementation stuff.
25 /// ARM_AM - ARM Addressing Mode Stuff
76 default: llvm_unreachable("Unknown addressing sub-mode!");
99 // Addressing Mode #1: shift_operand with registers
102 // This 'addressing mode' is used for arithmetic instructions. It can
390 // Addressing Mode #2
403 // If this addressing mode is a frame index (before prolog/epilog insertion
428 // Addressing Mode #3
458 // Addressing Mode #
    [all...]
  /art/runtime/arch/x86/
context_x86.h 104 // in 64bit addressing modes).
  /art/runtime/arch/x86_64/
context_x86_64.h 91 // in 64bit addressing modes).
  /external/chromium-trace/catapult/third_party/gsutil/third_party/pyasn1/pyasn1/type/
base.py 137 # * Primary method of component addressing is by-position. Data model for base
138 # type is Python sequence. Additional type-specific addressing methods
141 # * Sequence, Set and Choice types also implement by-identifier addressing
142 # * Sequence, Set and Choice types also implement by-asn1-type (tag) addressing
  /external/elfutils/libelf/
elf_rawdata.c 48 /* If `data' is not NULL this means we are not addressing the initial

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