| /external/opencv/cvaux/src/ |
| cvtrifocal.cpp | [all...] |
| /external/vixl/src/vixl/a64/ |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | 548 #include "traces/a64/sim-fsqrt-2d-trace-a64.h"
549 #include "traces/a64/sim-fsqrt-2s-trace-a64.h"
550 #include "traces/a64/sim-fsqrt-4s-trace-a64.h"
551 #include "traces/a64/sim-fsqrt-d-trace-a64.h"
552 #include "traces/a64/sim-fsqrt-s-trace-a64.h"
[all...] |
| test-simulator-a64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 180 setOperationAction(ISD::FSQRT, MVT::f64, Expand);
185 setOperationAction(ISD::FSQRT, MVT::f32, Expand);
455 setOperationAction(ISD::FSQRT, VT, Expand);
528 setOperationAction(ISD::FSQRT, MVT::v4f32, Legal);
584 setOperationAction(ISD::FSQRT, MVT::v2f64, Legal);
[all...] |
| /external/valgrind/VEX/priv/ |
| host_arm64_defs.c | 752 case ARM64vecu_FSQRT64x2: *nm = "fsqrt"; *ar = "2d"; return;
753 case ARM64vecu_FSQRT32x4: *nm = "fsqrt"; *ar = "4s"; return;
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | [all...] |
| LegalizeVectorOps.cpp | 307 case ISD::FSQRT:
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsMSAInstrInfo.td | [all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 431 // result back to ST(0). For example, fcos, fsqrt, etc.
|
| /external/v8/src/compiler/ppc/ |
| code-generator-ppc.cc | [all...] |
| /external/v8/src/x87/ |
| assembler-x87.cc | 1611 void Assembler::fsqrt() { function in class:v8::internal::Assembler
[all...] |
| assembler-x87.h | 858 void fsqrt();
[all...] |
| /external/valgrind/VEX/useful/ |
| hd_fpu.c | 1050 case 0xFA: /* FSQRT */
[all...] |
| /external/valgrind/none/tests/ppc32/ |
| test_isa_2_06_part3.c | [all...] |
| /external/clang/test/CodeGen/ |
| builtins-mips-msa.c | 448 v4f32_r = __builtin_msa_fsqrt_w(v8f16_a); // CHECK: call <4 x float> @llvm.mips.fsqrt.w(
449 v2f64_r = __builtin_msa_fsqrt_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.fsqrt.d(
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrVFP.td | 783 [(set DPR:$Dd, (fsqrt (f64 DPR:$Dm)))]>;
788 [(set SPR:$Sd, (fsqrt SPR:$Sm))]>;
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64.cc | 1881 void Assembler::fsqrt(const FPRegister& fd, function in class:v8::internal::Assembler
[all...] |
| /external/v8/src/ppc/ |
| assembler-ppc.cc | 2255 void Assembler::fsqrt(const DoubleRegister frt, const DoubleRegister frb, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | [all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/config/i386/ |
| i386.h | 170 const int fsqrt; /* cost of FSQRT instruction. */ member in struct:processor_costs
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| sh64-media.cpu | 632 "fsqrt.d $drgh, $drf"
638 "fsqrt.s $frgh, $frf"
[all...] |
