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  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/
mmtimer.h 2 * Intel Multimedia Timer device interface
11 * Timers Draft Specification (rev. 0.97) from Intel. Note that some
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
x86-64-suffix-intel.d 2 #objdump: -dw -Msuffix,intel
3 #name: x86-64 suffix (Intel mode)
  /toolchain/binutils/binutils-2.25/ld/emultempl/
ia64elf.em 30 /* None zero if generating binary for Intel Itanium processor. */
54 --itanium Generate code for Intel Itanium processor\n"
  /external/mesa3d/src/mesa/drivers/dri/i915/
i830_context.h 111 struct intel_texture_object intel; member in struct:i830_texture_object
143 struct intel_context intel; member in struct:i830_context
156 INTEL_FIREVERTICES( &i830->intel ); \
162 INTEL_FIREVERTICES( &i830->intel ); \
174 i830_state_draw_region(struct intel_context *intel,
187 extern void i830UpdateTextureState(struct intel_context *intel);
intel_clear.c 4 * Copyright 2009 Intel Corporation.
83 struct intel_context *intel = intel_context(ctx); local
93 intel->front_buffer_dirty = true;
127 intel_prepare_render(intel);
183 _mesa_meta_Clear(&intel->ctx, tri_mask);
185 _mesa_meta_glsl_Clear(&intel->ctx, tri_mask);
i915_texstate.c 106 * Intel drivers for "other operating systems" implement GL_CLAMP as
135 i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
137 struct gl_context *ctx = &intel->ctx;
158 if (!intel_finalize_mipmap_tree(intel, unit))
404 i915UpdateTextureState(struct intel_context *intel)
410 switch (intel->ctx.Texture.Unit[i]._ReallyEnabled) {
415 ok = i915_update_tex_unit(intel, i, SS3_NORMALIZED_COORDS);
418 ok = i915_update_tex_unit(intel, i, 0);
421 struct i915_context *i915 = i915_context(&intel->ctx);
438 FALLBACK(intel, I915_FALLBACK_TEXTURE, !ok)
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  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_wm.c 2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
195 struct intel_context *intel = &brw->intel; local
201 if (intel->gen >= 6) {
252 brw_wm_lookup_iz(intel, c);
266 struct intel_context *intel = &brw->intel; local
296 c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
330 brw_get_scratch_bo(intel, &brw->wm.scratch_bo
439 struct intel_context *intel = intel_context(ctx); local
488 struct intel_context *intel = &brw->intel; local
622 struct intel_context *intel = &brw->intel; local
    [all...]
brw_vs.c 2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
64 const struct intel_context *intel = &brw->intel; local
78 switch (intel->gen) {
154 if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
196 struct gl_context *ctx = &brw->intel.ctx;
197 struct intel_context *intel = &brw->intel; local
268 brw_get_scratch_bo(intel, &brw->vs.scratch_bo
374 struct intel_context *intel = &brw->intel; local
    [all...]
brw_fs_emit.cpp 2 * Copyright © 2010 Intel Corporation
55 if (intel->gen >= 6) {
159 (intel->gen >= 6 || (delta_x.nr & 1) == 0)) {
288 if (intel->gen >= 5) {
317 assert(intel->is_haswell);
503 if (intel->gen >= 6) {
577 if (intel->gen == 4 && !intel->is_g4x)
583 if (intel->gen == 4 && !intel->is_g4x)
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brw_state_upload.c 2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
261 if (brw->intel.gen >= 7) {
264 } else if (brw->intel.gen == 6) {
437 struct gl_context *ctx = &brw->intel.ctx;
438 struct intel_context *intel = &brw->intel; local
443 state->mesa |= brw->intel.NewGLState;
444 brw->intel.NewGLState = 0;
465 intel_check_front_buffer_rendering(intel);
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brw_urb.c 2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
117 struct intel_context *intel = &brw->intel; local
151 if (intel->gen == 5) {
161 } else if (intel->is_g4x) {
252 if ((brw->intel.batch.used & 15) > 12) {
253 int pad = 16 - (brw->intel.batch.used & 15);
255 brw->intel.batch.map[brw->intel.batch.used++] = MI_NOOP
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gen7_wm_surface_state.c 2 * Copyright © 2011 Intel Corporation
131 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
267 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
371 if (brw->intel.is_haswell) {
390 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
431 if (brw->intel.is_haswell) {
442 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
469 struct intel_context *intel = &brw->intel; local
470 struct gl_context *ctx = &intel->ctx
505 struct intel_context *intel = &brw->intel; local
597 struct intel_context *intel = &brw->intel; local
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  /external/mesa3d/src/mesa/drivers/dri/intel/
intel_fbo.h 46 * Intel renderbuffer, derived from gl_renderbuffer.
95 /*_mesa_warning(NULL, "Returning non-intel Rb\n");*/
150 intel_fbo_init(struct intel_context *intel);
191 intel_renderbuffer_resolve_hiz(struct intel_context *intel,
203 intel_renderbuffer_resolve_depth(struct intel_context *intel,
207 intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples);
intel_tex.c 56 struct intel_context *intel = intel_context(ctx); local
94 intel_image->mt = intel_miptree_create_for_teximage(intel, intel_texobj,
175 struct intel_context *intel = intel_context(ctx); local
192 intel_miptree_map(intel, mt, tex_image->Level, slice, x, y, w, h, mode,
200 struct intel_context *intel = intel_context(ctx); local
207 intel_miptree_unmap(intel, mt, tex_image->Level, slice);
  /external/webrtc/webrtc/base/
systeminfo_unittest.cc 22 // Tests Vendor identification is Intel or AMD.
108 // Tests Intel CPU Family identification.
115 // Tests Intel CPU Model identification.
122 // Tests Intel CPU Stepping identification.
137 // Tests Intel CPU Model identification.
144 // Tests Intel CPU Stepping identification.
  /hardware/intel/common/libmix/mix_audio/src/
mixaudio.h 2 INTEL CONFIDENTIAL
3 Copyright 2009 Intel Corporation All Rights Reserved.
4 The source code contained or described herein and all documents related to the source code ("Material") are owned by Intel Corporation or its suppliers or licensors. Title to the Material remains with Intel Corporation or its suppliers and licensors. The Material contains trade secrets and proprietary and confidential information of Intel or its suppliers and licensors. The Material is protected by worldwide copyright and trade secret laws and treaty provisions. No part of the Material may be used, copied, reproduced, modified, published, uploaded, posted, transmitted, distributed, or disclosed in any way without Intel?s prior express written permission.
6 No license under any patent, copyright, trade secret or other intellectual property right is granted to or conferred upon you by disclosure or delivery of the Materials, either expressly, by implication, inducement, estoppel or otherwise. Any license under such intellectual property rights must be express and approved by Intel in writing.
183 * @useIAM: Is current stream configured to use Intel Audio Manager.
286 * <listitem>Provide a stream name for the Intel Smart Sound Technology stream</listitem>
292 * <title>Intel Audio Manager support:</title
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  /hardware/intel/img/hwcomposer/moorefield_hdmi/common/base/
HwcModule.cpp 2 // Copyright (c) 2014 Intel Corporation 
44 namespace intel { namespace in namespace:android
284 } // namespace intel
288 open: android::intel::hwc_device_open
297 name: "Intel Hardware Composer",
298 author: "Intel",
  /external/google-breakpad/src/tools/windows/dump_syms/testdata/
omap_reorder_bbs.pdb     [all...]
omap_reorder_funcs.pdb     [all...]
omap_stretched.pdb     [all...]
omap_stretched_filled.pdb     [all...]
  /toolchain/binutils/binutils-2.25/bfd/
ihex.c 1 /* BFD back-end for Intel Hex objects.
23 /* This is what Intel Hex files look like:
25 1. INTEL FORMATS
27 A. Intel 1
51 B. INTEL 2
207 /* Report a problem in an Intel Hex file. */
229 (_("%B:%d: unexpected character `%s' in Intel Hex file"),
235 /* Read an Intel hex file and turn it into sections. We create a new
336 (_("%B:%u: bad checksum in Intel Hex file (expected %u, found %u)"),
391 (_("%B:%u: bad extended address record length in Intel Hex file")
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  /toolchain/binutils/binutils-2.25/gas/testsuite/
ChangeLog-2009 37 2009-12-07 H.J. Lu <hongjiu.lu@intel.com>
43 2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
45 * gas/i386/i386.exp: Run x86-64-fxsave and x86-64-fxsave-intel.
49 * gas/i386/x86-64-fxsave-intel.d: New.
67 2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
70 * gas/i386/lock-1-intel.d: Updated.
97 2009-11-18 H.J. Lu <hongjiu.lu@intel.com>
150 2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
152 * gas/i386/lock-1-intel.d: Updated.
157 * gas/i386/x86-64-lock-1-intel.d: Likewise
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  /external/opencv3/cmake/
OpenCVFindIPP.cmake 2 # The script to detect Intel(R) Integrated Performance Primitives (IPP)
14 # HAVE_IPP - True if Intel IPP found
15 # HAVE_IPP_ICV_ONLY - True if Intel IPP ICV version is available
24 # Created: 30 Dec 2010 by Vladimir Dudnik (vladimir.dudnik@intel.com)
197 _ipp_not_supported("IPP configuration error: can't find Intel compiler library dir ${INTEL_COMPILER_LIBRARY_DIR}")
202 message(SEND_ERROR "Intel compiler EM64T libraries not found")
207 message(SEND_ERROR "Intel compiler IA32 libraries not found")
  /external/opencv3/modules/core/include/opencv2/core/
ippasync.hpp 13 // Copyright (C) 2000-2015, Intel Corporation, all rights reserved.
35 // In no event shall the Intel Corporation or contributors be liable for any direct,
61 This section describes conversion between OpenCV and [Intel&reg; IPP Asynchronous
62 C/C++](http://software.intel.com/en-us/intel-ipp-preview) library. [Getting Started
63 Guide](http://registrationcenter.intel.com/irc_nas/3727/ipp_async_get_started.htm) help you to
154 [hppiCreateSharedMatrix](http://software.intel.com/ru-ru/node/501697).

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