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  /external/llvm/lib/Target/Mips/
MipsSEInstrInfo.cpp 46 (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) {
277 Opc = Mips::LDC1;
639 // spill + reload via ldc1
MipsSEFrameLowering.cpp 272 // spill + reload via ldc1
333 // spill + reload via ldc1
    [all...]
  /external/llvm/test/CodeGen/Mips/
o32_cc_byval.ll 51 ; CHECK: ldc1 $f[[F0:[0-9]+]], 72($sp)
fcmp.ll 787 ; 32-C-DAG: ldc1 $[[T1:f[0-9]+]], %lo($CPI33_0)(
792 ; 32-CMP-DAG: ldc1 $[[T1:f[0-9]+]], %lo($CPI33_0)(
800 ; 64-C-DAG: ldc1 $[[T1:f[0-9]+]], %got_ofst($CPI33_0)(
805 ; 64-CMP-DAG: ldc1 $[[T1:f[0-9]+]], %got_ofst($CPI33_0)(
  /ndk/docs/
Change_Log.html 162 <li> Deprecated <code>-mno-ldc1-stc1</code> for MIPS. This option may not work with the new
  /art/compiler/utils/mips64/
assembler_mips64_test.cc     [all...]
  /external/valgrind/none/tests/mips64/
move_instructions.c 128 "ldc1 $"#FS", "#offset"($t0)" "\n\t" \
167 "ldc1 $"#FS", "#offset"($t0)" "\n\t" \
  /external/llvm/test/CodeGen/Mips/llvm-ir/
select.ll 237 ; M2: ldc1 $f0, 16($sp)
249 ; CMOV-32: ldc1 $f0, 16($sp)
254 ; SEL-32: ldc1 $[[F1:f[0-9]+]], 16($sp)
  /external/v8/src/crankshaft/mips/
lithium-codegen-mips.cc 116 __ ldc1(DoubleRegister::from_code(save_iterator.Current()),
463 __ ldc1(dbl_scratch, mem_op);
    [all...]
  /external/valgrind/VEX/priv/
guest_mips_helpers.c     [all...]
  /external/llvm/test/MC/Disassembler/Mips/mips2/
valid-mips2-el.txt 55 0x07 0x40 0x0a 0xd6 # CHECK: ldc1 $f10, 16391($16)
  /external/llvm/test/MC/Mips/mips2/
valid.s 67 ldc1 $f11,16391($s0)
  /external/v8/src/crankshaft/mips64/
lithium-codegen-mips64.cc 91 __ ldc1(DoubleRegister::from_code(save_iterator.Current()),
446 __ ldc1(dbl_scratch, mem_op);
    [all...]
  /external/llvm/test/MC/Mips/
target-soft-float.s 270 ldc1 $f2, 16($7)
271 # FIXME: LDC1 is correctly rejected but the wrong error message is emitted.
  /external/v8/src/mips/
code-stubs-mips.cc 155 __ ldc1(double_scratch, MemOperand(input_reg, double_offset));
427 __ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset));
451 __ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset));
508 __ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset));
509 __ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset));
826 __ ldc1(double_base, FieldMemOperand(base, HeapNumber::kValueOffset));
838 __ ldc1(double_exponent,
844 __ ldc1(double_exponent,
    [all...]
constants-mips.h 374 LDC1 = ((6U << 3) + 5) << kOpcodeShift,
904 OpcodeToBitNumber(LWC1) | OpcodeToBitNumber(LDC1) |
    [all...]
disasm-mips.cc     [all...]
  /external/v8/src/mips64/
code-stubs-mips64.cc 153 __ ldc1(double_scratch, MemOperand(input_reg, double_offset));
423 __ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset));
447 __ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset));
504 __ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset));
505 __ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset));
823 __ ldc1(double_base, FieldMemOperand(base, HeapNumber::kValueOffset));
835 __ ldc1(double_exponent,
841 __ ldc1(double_exponent,
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/
ChangeLog-2010 416 * gas/mips/ld.s: Adjust to let SD, L.D, S.D, LDC1 and SDC1
458 * gas/mips/ldc1.d: New test.
459 * gas/mips/ldc1-forward.d: Likewise.
474 * gas/mips/ldc1-n32.d: Likewise.
475 * gas/mips/ldc1-n64.d: Likewise.
476 * gas/mips/ldc1-f-n32.d: Likewise.
477 * gas/mips/ldc1-f-n64.d: Likewise.
    [all...]
  /toolchain/binutils/binutils-2.25/opcodes/
score-dis.c 266 {0x0c00000a, 0x3e00001f, "ldc1\t\tc%15-19r, [%20-24r, %5-14i]"},
597 if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
    [all...]
  /external/llvm/test/MC/Disassembler/Mips/mips32/
valid-mips32.txt 327 0xd4 0xe9 0x23 0xc6 # CHECK: ldc1 $f9, 9158($7)
328 0xd6 0x0a 0x40 0x07 # CHECK: ldc1 $f10, 16391($16)
  /external/llvm/test/MC/Disassembler/Mips/mips32r2/
valid-mips32r2.txt 360 0xd4 0xe9 0x23 0xc6 # CHECK: ldc1 $f9, 9158($7)
361 0xd6 0x0a 0x40 0x07 # CHECK: ldc1 $f10, 16391($16)
  /external/llvm/test/MC/Disassembler/Mips/mips32r3/
valid-mips32r3.txt 357 0xd4 0xe9 0x23 0xc6 # CHECK: ldc1 $f9, 9158($7)
358 0xd6 0x0a 0x40 0x07 # CHECK: ldc1 $f10, 16391($16)
  /external/llvm/test/MC/Disassembler/Mips/mips32r5/
valid-mips32r5.txt 358 0xd4 0xe9 0x23 0xc6 # CHECK: ldc1 $f9, 9158($7)
359 0xd6 0x0a 0x40 0x07 # CHECK: ldc1 $f10, 16391($16)
  /external/llvm/test/MC/Disassembler/Mips/mips64/
valid-mips64.txt 429 0xd4 0xe9 0x23 0xc6 # CHECK: ldc1 $f9, 9158($7)
430 0xd6 0x0a 0x40 0x07 # CHECK: ldc1 $f10, 16391($16)

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