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  /toolchain/binutils/binutils-2.25/opcodes/
frv-desc.c 6185 int machs = cd->machs; local
6219 int machs = cd->machs; local
6268 unsigned int machs = cd->machs; local
6361 unsigned int machs = 0; \/* 0 = "unspecified" *\/ local
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mep-desc.c 6085 int machs = cd->machs; local
6119 int machs = cd->machs; local
6168 unsigned int machs = cd->machs; local
6261 unsigned int machs = 0; \/* 0 = "unspecified" *\/ local
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mep-opc.c 116 check_configured_mach (int machs)
136 return machs & mach;
143 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); local
155 if (machs == 0)
156 machs = ~0;
158 ok1 = ((machs & cd->machs) && cgen_bitset_intersect_p (& isas, cd->isas));
162 ok3 = check_configured_mach (machs);
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  /toolchain/binutils/binutils-2.25/cpu/
lm32.cpu 29 (machs lm32)
ip2k.cpu 34 (machs ip2022 ip2022ext)
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iq2000.cpu 29 (machs iq2000 iq10)
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mt.cpu 36 (machs ms1 ms1-003 ms2)
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fr30.cpu 34 (machs fr30)
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xstormy16.cpu 31 (machs xstormy16)
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cris.cpu 53 (machs crisv0 crisv3 crisv8 crisv10 crisv32)
167 ; if we include timings for machs that we don't generate sims for.
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epiphany.cpu 34 (machs epiphany32)
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m32r.cpu 38 (machs m32r m32rx m32r2)
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xc16x.cpu 36 (machs xc16x)
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mep-core.cpu 37 (machs mep h1 c5)
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frv.cpu 32 (machs frv fr550 fr500 fr450 fr400 tomcat simple)
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m32c.cpu 31 (machs m16c m32c)
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  /toolchain/binutils/binutils-2.25/include/opcode/
cgen.h 1199 int machs; member in struct:cgen_cpu_desc
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ChangeLog-9103     [all...]
  /toolchain/binutils/binutils-2.25/gas/config/
tc-m32r.c 188 gas_cgen_cpu_desc->machs = mach_table[on].mach_flags;
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