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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/
sh3-dsp.s 131 muls.w r5,r4 ;!/* 0010nnnnmmmm1111 muls.w <REG_M>,<REG_N>*/{"muls.w",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
132 muls r5,r4 ;!/* 0010nnnnmmmm1111 muls <REG_M>,<REG_N>*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
    [all...]
sh4al-dsp.s 177 muls.w r5,r4 ;!/* 0010nnnnmmmm1111 muls.w <REG_M>,<REG_N>*/{"muls.w",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
178 muls r5,r4 ;!/* 0010nnnnmmmm1111 muls <REG_M>,<REG_N>*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
    [all...]
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/
sh2a.s 125 muls.w r5,r4 ;!/* 0010nnnnmmmm1111 muls.w <REG_M>,<REG_N>*/{"muls.w",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
126 muls r5,r4 ;!/* 0010nnnnmmmm1111 muls <REG_M>,<REG_N>*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
    [all...]
sh3-dsp.s 131 muls.w r5,r4 ;!/* 0010nnnnmmmm1111 muls.w <REG_M>,<REG_N>*/{"muls.w",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
132 muls r5,r4 ;!/* 0010nnnnmmmm1111 muls <REG_M>,<REG_N>*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
    [all...]
sh4al-dsp.s 177 muls.w r5,r4 ;!/* 0010nnnnmmmm1111 muls.w <REG_M>,<REG_N>*/{"muls.w",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
178 muls r5,r4 ;!/* 0010nnnnmmmm1111 muls <REG_M>,<REG_N>*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up}
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
set-arch.s 346 muls $4,$5,$6
421 nsel2 muls.ob
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/
basic-1.s 233 muls.l r7,r53,r17
  /toolchain/binutils/binutils-2.25/opcodes/
ip2k-desc.c 485 /* muls W,#$lit8 */
487 IP2K_INSN_MULSW_L, "mulsw_l", "muls", 16,
535 /* muls W,$fr */
537 IP2K_INSN_MULSW_FR, "mulsw_fr", "muls", 16,
    [all...]
mcore-opc.h 157 { "muls.h", MULSH, 0, 0x6800 },
ip2k-opc.c 236 /* muls W,#$lit8 */
296 /* muls W,$fr */
  /external/valgrind/VEX/test/
mmxtest.c 284 /* 4x16 Parallel MULs giving Low 4x16 portions of results
291 /* 4x16 Parallel MULs giving High 4x16 portions of results
299 (muls like pmullw, then adds adjacent 16-bit fields
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
thumb32.s 487 muls r5, r0
488 muls r5, r0, r5
489 muls r0, r5
inst.d 115 0+19c <[^>]*> e0110392 ? muls r1, r2, r3
thumb-eabi.d 39 0+03a <[^>]+> 436c muls r4, r5
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/
cris.exp 545 test_template_insn_reg regreg muls.b d0 "" "" 44
546 test_template_insn_reg regreg muls.w d1 "" "" 44
547 test_template_insn_reg regreg muls.d d2 "" "" 44
  /device/google/contexthub/lib/nanohub/
rsa.c 139 * normal RSA public op with 65537 exponent does 34 operations. 17 muls and 17 mods, as follows:
  /external/valgrind/none/tests/mips64/
macro_fpu.h 5 DIVS, DIVD, MULS, MULD,
  /external/llvm/test/MC/ARM/
thumb-diagnostics.s 164 muls r1, r2, r3
166 @ CHECK-ERRORS: muls r1, r2, r3
  /toolchain/binutils/binutils-2.25/bfd/
xtensa-modules.c     [all...]
  /external/valgrind/none/tests/arm/
v6intThumb.stdout.exp 227 MULS-16 0x10d
228 muls r1, r2 :: rd 0xdde06f18 rm 0x27181728, c:v-in 0, cpsr 0x80000000 N
229 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
230 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
231 muls r1, r2 :: rd 0x00000000 rm 0x00000001, c:v-in 0, cpsr 0x40000000 Z
232 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
233 muls r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z
234 muls r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z
235 muls r1, r2 :: rd 0xdde06f18 rm 0x27181728, c:v-in 1, cpsr 0x90000000 N V
236 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z
    [all...]
v6intARM.c 507 printf("MULS\n");
508 TESTINST3("muls r0, r1, r2", 0, 0, r0, r1, r2, 0);
509 TESTINST3("muls r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0);
510 TESTINST3("muls r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0);
511 TESTINST3("muls r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0);
512 TESTINST3("muls r0, r1, r2", 0x7fffffff, 0x7fffffff, r0, r1, r2, 0);
513 TESTINST3("muls r0, r1, r2", 0x0000ffff, 0x0000ffff, r0, r1, r2, 0);
    [all...]
  /external/llvm/lib/Target/ARM/
Thumb2SizeReduction.cpp 248 /// r0 = muls ...
252 /// In this case it would have been ok to narrow the mul.w to muls since there
253 /// are indirect RAW dependency between the muls and the mul.w
    [all...]
  /toolchain/binutils/binutils-2.25/cpu/
ip2k.cpu 155 CSE POP SUBC DECSNZ MULU MULS INCSNZ ADDC
508 "muls W,#$lit8"
660 "muls W,$fr"
    [all...]
  /toolchain/binutils/binutils-2.25/gas/doc/
c-avr.texi 419 00000010ddddrrrr muls d,d
c-sh.texi 307 lds Rn,MACL muls Rm,Rn

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