1 @ RUN: not llvm-mc -triple=thumbv6-apple-darwin -o /dev/null < %s 2>&1 \ 2 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS %s 3 @ RUN: not llvm-mc -triple=thumbv5-apple-darwin -o /dev/null < %s 2>&1 \ 4 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS-V5 %s 5 @ RUN: not llvm-mc -triple=thumbv7m -o /dev/null < %s 2>&1 \ 6 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS-V7M %s 7 @ RUN: not llvm-mc -triple=thumbv8 -o /dev/null < %s 2>&1 \ 8 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS-V8 %s 9 10 @ Check for various assembly diagnostic messages on invalid input. 11 12 @ ADD instruction w/o 'S' suffix. 13 add r1, r2, r3 14 @ CHECK-ERRORS: error: invalid instruction 15 @ CHECK-ERRORS: add r1, r2, r3 16 @ CHECK-ERRORS: ^ 17 18 @ Instructions which require v6+ for both registers to be low regs. 19 add r2, r3 20 mov r2, r3 21 @ CHECK-ERRORS: error: instruction variant requires Thumb2 22 @ CHECK-ERRORS: add r2, r3 23 @ CHECK-ERRORS: ^ 24 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later 25 @ CHECK-ERRORS-V5: mov r2, r3 26 @ CHECK-ERRORS-V5: ^ 27 28 29 @ Out of range immediates for ASR instruction. 30 asrs r2, r3, #33 31 @ CHECK-ERRORS: error: invalid operand for instruction 32 @ CHECK-ERRORS: asrs r2, r3, #33 33 @ CHECK-ERRORS: ^ 34 35 @ Out of range immediates for BKPT instruction. 36 bkpt #256 37 bkpt #-1 38 error: invalid operand for instruction 39 bkpt #256 40 ^ 41 error: invalid operand for instruction 42 bkpt #-1 43 ^ 44 45 @ Out of range immediates for v8 HLT instruction. 46 hlt #64 47 hlt #-1 48 @CHECK-ERRORS: error: instruction requires: armv8 arm-mode 49 @CHECK-ERRORS: hlt #64 50 @CHECK-ERRORS: ^ 51 @CHECK-ERRORS-V8: error: instruction requires: arm-mode 52 @CHECK-ERRORS-V8: hlt #64 53 @CHECK-ERRORS-V8: ^ 54 @CHECK-ERRORS: error: invalid operand for instruction 55 @CHECK-ERRORS: hlt #-1 56 @CHECK-ERRORS: ^ 57 58 @ Invalid writeback and register lists for LDM 59 ldm r2!, {r5, r8} 60 ldm r2, {r5, r7} 61 ldm r2!, {r2, r3, r4} 62 ldm r2!, {r2, r3, r4, r10} 63 ldmdb r2!, {r2, r3, r4} 64 ldm r0, {r2, sp} 65 ldmia r0, {r2-r3, sp} 66 ldmia r0!, {r2-r3, sp} 67 ldmfd r2, {r1, r3-r6, sp} 68 ldmfd r2!, {r1, r3-r6, sp} 69 ldmdb r1, {r2, r3, sp} 70 ldmdb r1!, {r2, r3, sp} 71 @ CHECK-ERRORS: error: registers must be in range r0-r7 72 @ CHECK-ERRORS: ldm r2!, {r5, r8} 73 @ CHECK-ERRORS: ^ 74 @ CHECK-ERRORS: error: writeback operator '!' expected 75 @ CHECK-ERRORS: ldm r2, {r5, r7} 76 @ CHECK-ERRORS: ^ 77 @ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list 78 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4} 79 @ CHECK-ERRORS: ^ 80 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list 81 @ CHECK-ERRORS-V8: ldm r2!, {r2, r3, r4, r10} 82 @ CHECK-ERRORS-V8: ^ 83 @ CHECK-ERRORS-V8: error: writeback register not allowed in register list 84 @ CHECK-ERRORS-V8: ldmdb r2!, {r2, r3, r4} 85 @ CHECK-ERRORS-V8: ^ 86 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 87 @ CHECK-ERRORS-V7M: ldm r0, {r2, sp} 88 @ CHECK-ERRORS-V7M: ^ 89 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 90 @ CHECK-ERRORS-V7M: ldmia r0, {r2-r3, sp} 91 @ CHECK-ERRORS-V7M: ^ 92 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 93 @ CHECK-ERRORS-V7M: ldmia r0!, {r2-r3, sp} 94 @ CHECK-ERRORS-V7M: ^ 95 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 96 @ CHECK-ERRORS-V7M: ldmfd r2, {r1, r3-r6, sp} 97 @ CHECK-ERRORS-V7M: ^ 98 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 99 @ CHECK-ERRORS-V7M: ldmfd r2!, {r1, r3-r6, sp} 100 @ CHECK-ERRORS-V7M: ^ 101 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 102 @ CHECK-ERRORS-V7M: ldmdb r1, {r2, r3, sp} 103 @ CHECK-ERRORS-V7M: ^ 104 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 105 @ CHECK-ERRORS-V7M: ldmdb r1!, {r2, r3, sp} 106 @ CHECK-ERRORS-V7M: ^ 107 108 @ Invalid writeback and register lists for PUSH/POP 109 pop {r1, r2, r10} 110 push {r8, r9} 111 @ CHECK-ERRORS: error: registers must be in range r0-r7 or pc 112 @ CHECK-ERRORS: pop {r1, r2, r10} 113 @ CHECK-ERRORS: ^ 114 @ CHECK-ERRORS: error: registers must be in range r0-r7 or lr 115 @ CHECK-ERRORS: push {r8, r9} 116 @ CHECK-ERRORS: ^ 117 118 119 @ Invalid writeback and register lists for STM 120 stm r1, {r2, r6} 121 stm r1!, {r2, r9} 122 stm r2!, {r2, r9} 123 stmdb r2!, {r0, r2} 124 stm r1!, {r2, sp} 125 stmia r4!, {r0-r3, sp} 126 stmdb r1, {r2, r3, sp} 127 stmdb r1!, {r2, r3, sp} 128 @ CHECK-ERRORS: error: instruction requires: thumb2 129 @ CHECK-ERRORS: stm r1, {r2, r6} 130 @ CHECK-ERRORS: ^ 131 @ CHECK-ERRORS: error: registers must be in range r0-r7 132 @ CHECK-ERRORS: stm r1!, {r2, r9} 133 @ CHECK-ERRORS: ^ 134 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list 135 @ CHECK-ERRORS-V8: stm r2!, {r2, r9} 136 @ CHECK-ERRORS-V8: ^ 137 @ CHECK-ERRORS-V8: error: writeback register not allowed in register list 138 @ CHECK-ERRORS-V8: stmdb r2!, {r0, r2} 139 @ CHECK-ERRORS-V8: ^ 140 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 141 @ CHECK-ERRORS-V7M: stm r1!, {r2, sp} 142 @ CHECK-ERRORS-V7M: ^ 143 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 144 @ CHECK-ERRORS-V7M: stmia r4!, {r0-r3, sp} 145 @ CHECK-ERRORS-V7M: ^ 146 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 147 @ CHECK-ERRORS-V7M: stmdb r1, {r2, r3, sp} 148 @ CHECK-ERRORS-V7M: ^ 149 @ CHECK-ERRORS-V7M: error: SP may not be in the register list 150 @ CHECK-ERRORS-V7M: stmdb r1!, {r2, r3, sp} 151 @ CHECK-ERRORS-V7M: ^ 152 153 @ Out of range immediates for LSL instruction. 154 lsls r4, r5, #-1 155 lsls r4, r5, #32 156 @ CHECK-ERRORS: error: invalid operand for instruction 157 @ CHECK-ERRORS: lsls r4, r5, #-1 158 @ CHECK-ERRORS: ^ 159 @ CHECK-ERRORS: error: invalid operand for instruction 160 @ CHECK-ERRORS: lsls r4, r5, #32 161 @ CHECK-ERRORS: ^ 162 163 @ Mismatched source/destination operands for MUL instruction. 164 muls r1, r2, r3 165 @ CHECK-ERRORS: error: destination register must match source register 166 @ CHECK-ERRORS: muls r1, r2, r3 167 @ CHECK-ERRORS: ^ 168 169 170 @ Out of range immediates for STR instruction. 171 str r2, [r7, #-1] 172 str r5, [r1, #3] 173 str r3, [r7, #128] 174 @ CHECK-ERRORS: error: instruction requires: thumb2 175 @ CHECK-ERRORS: str r2, [r7, #-1] 176 @ CHECK-ERRORS: ^ 177 @ CHECK-ERRORS: error: instruction requires: thumb2 178 @ CHECK-ERRORS: str r5, [r1, #3] 179 @ CHECK-ERRORS: ^ 180 @ CHECK-ERRORS: error: instruction requires: thumb2 181 @ CHECK-ERRORS: str r3, [r7, #128] 182 @ CHECK-ERRORS: ^ 183 184 @ Out of range immediate for SVC instruction. 185 svc #-1 186 svc #256 187 @ CHECK-ERRORS: error: invalid operand for instruction 188 @ CHECK-ERRORS: svc #-1 189 @ CHECK-ERRORS: ^ 190 @ CHECK-ERRORS: error: instruction requires: arm-mode 191 @ CHECK-ERRORS: svc #256 192 @ CHECK-ERRORS: ^ 193 194 195 @ Out of range immediate for ADD SP instructions 196 add sp, #-1 197 add sp, #3 198 add sp, sp, #512 199 add r2, sp, #1024 200 @ CHECK-ERRORS: error: instruction requires: thumb2 201 @ CHECK-ERRORS: add sp, #-1 202 @ CHECK-ERRORS: ^ 203 @ CHECK-ERRORS: error: instruction requires: thumb2 204 @ CHECK-ERRORS: add sp, #3 205 @ CHECK-ERRORS: ^ 206 @ CHECK-ERRORS: error: instruction requires: thumb2 207 @ CHECK-ERRORS: add sp, sp, #512 208 @ CHECK-ERRORS: ^ 209 @ CHECK-ERRORS: error: instruction requires: thumb2 210 @ CHECK-ERRORS: add r2, sp, #1024 211 @ CHECK-ERRORS: ^ 212 213 add r2, sp, ip 214 @ CHECK-ERRORS: error: source register must be the same as destination 215 @ CHECK-ERRORS: add r2, sp, ip 216 @ CHECK-ERRORS: ^ 217 218 219 @------------------------------------------------------------------------------ 220 @ B/Bcc - out of range immediates for Thumb1 branches 221 @------------------------------------------------------------------------------ 222 223 beq #-258 224 bne #256 225 bgt #13 226 b #-1048578 227 b #1048576 228 b #10323 229 230 @ CHECK-ERRORS: error: branch target out of range 231 @ CHECK-ERRORS: error: branch target out of range 232 @ CHECK-ERRORS: error: branch target out of range 233 @ CHECK-ERRORS: error: branch target out of range 234 @ CHECK-ERRORS: error: branch target out of range 235 @ CHECK-ERRORS: error: branch target out of range 236 237 @------------------------------------------------------------------------------ 238 @ SEV/WFE/WFI/YIELD - are not supported pre v6M or v6T2 239 @------------------------------------------------------------------------------ 240 sev 241 wfe 242 wfi 243 yield 244 245 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 246 @ CHECK-ERRORS: sev 247 @ CHECK-ERRORS: ^ 248 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 249 @ CHECK-ERRORS: wfe 250 @ CHECK-ERRORS: ^ 251 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 252 @ CHECK-ERRORS: wfi 253 @ CHECK-ERRORS: ^ 254 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 255 @ CHECK-ERRORS: yield 256 @ CHECK-ERRORS: ^ 257 258 @------------------------------------------------------------------------------ 259 @ PLDW required mp-extensions 260 @------------------------------------------------------------------------------ 261 pldw [r0, #4] 262 @ CHECK-ERRORS: error: instruction requires: mp-extensions 263 264 @------------------------------------------------------------------------------ 265 @ LDR(lit) - invalid offsets 266 @------------------------------------------------------------------------------ 267 268 ldr r4, [pc, #-12] 269 @ CHECK-ERRORS: error: instruction requires: thumb2 270 271 @------------------------------------------------------------------------------ 272 @ STC2{L}/LDC2{L} - requires thumb2 273 @------------------------------------------------------------------------------ 274 stc2 p0, c8, [r1, #4] 275 stc2l p6, c2, [r7, #4] 276 ldc2 p0, c8, [r1, #4] 277 ldc2l p6, c2, [r7, #4] 278 @ CHECK-ERRORS: error: invalid operand for instruction 279 @ CHECK-ERRORS: error: invalid operand for instruction 280 @ CHECK-ERRORS: error: invalid operand for instruction 281 @ CHECK-ERRORS: error: invalid operand for instruction 282
