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  /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/
anames.go 176 "SDIV",
  /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/
anames.go 173 "SDIV",
  /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/
anames.go 173 "SDIV",
  /external/llvm/lib/Target/ARM/
ARMTargetTransformInfo.cpp 402 { ISD::SDIV, MVT::v1i64, 1 * FunctionCallDivCost},
406 { ISD::SDIV, MVT::v2i32, 2 * FunctionCallDivCost},
410 { ISD::SDIV, MVT::v4i16, ReciprocalDivCost},
414 { ISD::SDIV, MVT::v8i8, ReciprocalDivCost},
419 { ISD::SDIV, MVT::v2i64, 2 * FunctionCallDivCost},
423 { ISD::SDIV, MVT::v4i32, 4 * FunctionCallDivCost},
427 { ISD::SDIV, MVT::v8i16, 8 * FunctionCallDivCost},
431 { ISD::SDIV, MVT::v16i8, 16 * FunctionCallDivCost},
  /external/llvm/test/CodeGen/X86/
2008-02-27-DeadSlotElimBug.ll 24 %tmp42 = sdiv i32 %i, 9 ; <i32> [#uses=1]
28 %tmp48 = sdiv i32 %i, 3 ; <i32> [#uses=1]
twoaddr-coalesce-3.ll 32 %div = sdiv i32 %i.04, 2
70 %div = sdiv i32 %i.04, 2
optimize-max-0.ll 13 %2 = sdiv i32 %1, 4
75 %14 = sdiv i32 %w, 2
77 %16 = sdiv i32 %x, 2
97 %24 = sdiv i32 %w, 2
155 %38 = sdiv i32 %37, 4
192 %52 = sdiv i32 %51, 2
226 %63 = sdiv i32 %62, 2
divrem8_ext.ll 58 %div = sdiv i8 %x, %y
  /external/llvm/test/Transforms/InstCombine/
apint-sub.ll 99 %X = sdiv i51 %A, 1123 ; <i51> [#uses=1]
108 %C = sdiv i25 %B, 1234 ; <i25> [#uses=1]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
arch7.d 45 0+090 <[^>]*> fb99 f6fc sdiv r6, r9, ip
46 0+094 <[^>]*> fb96 f9f3 sdiv r9, r6, r3
thumb2_bad_reg.s 446 @ SDIV (register)
447 sdiv r13, r0, r1
448 sdiv r15, r0, r1
449 sdiv r0, r13, r1
450 sdiv r0, r15, r1
451 sdiv r0, r1, r13
452 sdiv r0, r1, r15
  /external/llvm/test/CodeGen/Mips/
divrem.ll 53 %div = sdiv i32 %a0, %a1
174 %div = sdiv i32 %a0, %a1
225 %div = sdiv i32 %0, %1
248 %div = sdiv i64 %a0, %a1
351 %div = sdiv i64 %a0, %a1
  /external/llvm/unittests/Transforms/Utils/
Cloning.cpp 148 BinaryOperator *SDiv = BinaryOperator::Create(Instruction::SDiv, V, V);
149 EXPECT_FALSE(this->clone(SDiv)->isExact());
151 SDiv->setIsExact(true);
152 EXPECT_TRUE(this->clone(SDiv)->isExact());
IntegerDivision.cpp 23 TEST(IntegerDivision, SDiv) {
42 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SDiv);
163 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SDiv);
  /art/runtime/arch/arm/
instruction_set_features_arm.cc 188 // instruction is an sdiv (4 bytes long).
204 // See if have a sdiv instruction. Register a signal handler and try to execute an sdiv
  /external/compiler-rt/lib/builtins/arm/
divmodsi4.S 44 sdiv r0, r3, r1
  /external/llvm/bindings/python/llvm/
enumerations.py 76 ('SDiv', 15),
  /external/llvm/include/llvm/IR/
Operator.h 72 /// Add, Sub, and Mul. It does not include SDiv, despite that operator having
124 /// A udiv or sdiv instruction, which can be marked as "exact",
146 return OpC == Instruction::SDiv ||
348 : public ConcreteOperator<PossiblyExactOperator, Instruction::SDiv> {
  /external/llvm/test/CodeGen/ARM/
vector-extend-narrow.ll 62 %2 = sdiv <4 x i8> zeroinitializer, %1
call-tc.ll 75 %0 = sdiv i32 %a, %b
159 %3 = sdiv i32 1000, %2
  /external/llvm/test/CodeGen/Generic/
2006-02-12-InsertLibcall.ll 10 %tmp.114.i = sdiv i64 %tmp.2i, 3 ; <i64> [#uses=1]
  /external/llvm/test/CodeGen/Mips/Fast-ISel/
div1.ll 30 %div = sdiv i32 %1, %2
  /external/llvm/test/CodeGen/Thumb2/
2009-08-04-SubregLoweringBug3.ll 22 %2 = sdiv i32 %1, 127773 ; <i32> [#uses=1]
  /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/
anames.go 176 "SDIV",
  /external/llvm/test/MC/Sparc/
sparc-alu-instructions.s 22 ! CHECK: sdiv %g1, %g2, %g3 ! encoding: [0x86,0x78,0x40,0x02]
23 sdiv %g1, %g2, %g3

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