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      1 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
      2 ; RUN:      -fast-isel-abort=1 | FileCheck %s
      3 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
      4 ; RUN:      -fast-isel-abort=1 | FileCheck %s
      5 
      6 @sj = global i32 200000, align 4
      7 @sk = global i32 -47, align 4
      8 @uj = global i32 200000, align 4
      9 @uk = global i32 43, align 4
     10 @si = common global i32 0, align 4
     11 @ui = common global i32 0, align 4
     12 
     13 define void @divs() {
     14   ; CHECK-LABEL:  divs:
     15 
     16   ; CHECK:        lui     $[[GOT1:[0-9]+]], %hi(_gp_disp)
     17   ; CHECK:        addiu   $[[GOT2:[0-9]+]], $[[GOT1]], %lo(_gp_disp)
     18   ; CHECK:        addu    $[[GOT:[0-9]+]], $[[GOT2:[0-9]+]], $25
     19   ; CHECK-DAG:    lw      $[[I_ADDR:[0-9]+]], %got(si)($[[GOT]])
     20   ; CHECK-DAG:    lw      $[[K_ADDR:[0-9]+]], %got(sk)($[[GOT]])
     21   ; CHECK-DAG:    lw      $[[J_ADDR:[0-9]+]], %got(sj)($[[GOT]])
     22   ; CHECK-DAG:    lw      $[[J:[0-9]+]], 0($[[J_ADDR]])
     23   ; CHECK-DAG:    lw      $[[K:[0-9]+]], 0($[[K_ADDR]])
     24   ; CHECK-DAG:    div     $zero, $[[J]], $[[K]]
     25   ; CHECK_DAG:    teq     $[[K]], $zero, 7
     26   ; CHECK-DAG:    mflo    $[[RESULT:[0-9]+]]
     27   ; CHECK:        sw      $[[RESULT]], 0($[[I_ADDR]])
     28   %1 = load i32, i32* @sj, align 4
     29   %2 = load i32, i32* @sk, align 4
     30   %div = sdiv i32 %1, %2
     31   store i32 %div, i32* @si, align 4
     32   ret void
     33 }
     34 
     35 define void @divu() {
     36   ; CHECK-LABEL:  divu:
     37 
     38   ; CHECK:            lui     $[[GOT1:[0-9]+]], %hi(_gp_disp)
     39   ; CHECK:            addiu   $[[GOT2:[0-9]+]], $[[GOT1]], %lo(_gp_disp)
     40   ; CHECK:            addu    $[[GOT:[0-9]+]], $[[GOT2:[0-9]+]], $25
     41   ; CHECK-DAG:        lw      $[[I_ADDR:[0-9]+]], %got(ui)($[[GOT]])
     42   ; CHECK-DAG:        lw      $[[K_ADDR:[0-9]+]], %got(uk)($[[GOT]])
     43   ; CHECK-DAG:        lw      $[[J_ADDR:[0-9]+]], %got(uj)($[[GOT]])
     44   ; CHECK-DAG:        lw      $[[J:[0-9]+]], 0($[[J_ADDR]])
     45   ; CHECK-DAG:        lw      $[[K:[0-9]+]], 0($[[K_ADDR]])
     46   ; CHECK-DAG:        divu    $zero, $[[J]], $[[K]]
     47   ; CHECK_DAG:        teq     $[[K]], $zero, 7
     48   ; CHECK-DAG:        mflo    $[[RESULT:[0-9]+]]
     49   ; CHECK:            sw      $[[RESULT]], 0($[[I_ADDR]])
     50   %1 = load i32, i32* @uj, align 4
     51   %2 = load i32, i32* @uk, align 4
     52   %div = udiv i32 %1, %2
     53   store i32 %div, i32* @ui, align 4
     54   ret void
     55 }
     56