| /art/runtime/interpreter/mterp/arm64/ |
| op_rem_double_2addr.S | 3 ubfx w2, wINST, #8, #4 // w2<- A
7 ubfx w2, wINST, #8, #4 // w2<- A (need to reload - killed across call)
|
| op_const_4.S | 3 ubfx w0, wINST, #8, #4 // w0<- A
|
| op_move_wide.S | 4 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_array_length.S | 5 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_iget_wide_quick.S | 5 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_iput_wide.S | 7 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_iget_object_quick.S | 9 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_iget_wide.S | 14 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_iput_quick.S | 7 ubfx w2, wINST, #8, #4 // w2<- A
|
| op_iput_wide_quick.S | 5 ubfx w0, wINST, #8, #4 // w0<- A
|
| op_move.S | 5 ubfx w0, wINST, #8, #4 // x0<- A from 11:8
|
| shiftWide2addr.S | 7 ubfx w2, wINST, #8, #4 // w2<- A
|
| unopWide.S | 10 ubfx w4, wINST, #8, #4 // w4<- A
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| archv6t2-bad.s | 33 ubfx r0,r1,#0,#0
34 ubfx r0,r1,#32,#0
35 ubfx r0,r1,#0,#33
36 ubfx r0,r1,#33,#1
37 ubfx r0,r1,#32,#1
38 ubfx r0,r1,#28,#10
|
| /art/runtime/interpreter/mterp/arm/ |
| op_const_4.S | 3 ubfx r0, rINST, #8, #4 @ r0<- A
|
| op_array_length.S | 5 ubfx r2, rINST, #8, #4 @ r2<- A
|
| op_iget_object_quick.S | 9 ubfx r2, rINST, #8, #4 @ r2<- A
|
| op_iput_quick.S | 7 ubfx r2, rINST, #8, #4 @ r2<- A
|
| op_iput_wide.S | 7 ubfx r2, rINST, #8, #4 @ r2<- A
|
| op_move.S | 5 ubfx r0, rINST, #8, #4 @ r0<- A from 11:8
|
| op_move_wide.S | 4 ubfx rINST, rINST, #8, #4 @ rINST<- A
|
| /external/llvm/test/CodeGen/Thumb2/ |
| bfx.ll | 14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| bitfield-dump | 91 154: 530000ff ubfx wzr, w7, #0, #1
98 170: d34000ff ubfx xzr, x7, #0, #1
99 174: d3407cff ubfx xzr, x7, #0, #32
105 18c: 530000ff ubfx wzr, w7, #0, #1
108 198: 531040ff ubfx wzr, w7, #16, #1
109 19c: 53105cff ubfx wzr, w7, #16, #8
112 1a8: d34000ff ubfx xzr, x7, #0, #1
113 1ac: d3407cff ubfx xzr, x7, #0, #32
115 1b4: d36080ff ubfx xzr, x7, #32, #1
116 1b8: d360bcff ubfx xzr, x7, #32, #1
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fold-lsl.ll | 11 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
23 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
35 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
47 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
59 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
71 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
|
| /external/llvm/test/CodeGen/ARM/ |
| bfx.ll | 14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
35 ; CHECK: ubfx [[REG2:(lr|r[0-9]+)]], r1, #16, #8
37 ; CHECK: ubfx [[REG3:(lr|r[0-9]+)]], r1, #8, #8
|
