| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyInstrInfo.h | 37 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
41 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
45 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
46 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
| WebAssemblyInstrInfo.cpp | 35 void WebAssemblyInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
41 auto &MRI = MBB.getParent()->getRegInfo();
58 BuildMI(MBB, I, DL, get(CopyLocalOpcode), DestReg)
63 bool WebAssemblyInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
69 for (MachineInstr &MI : MBB.terminators()) {
104 unsigned WebAssemblyInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
105 MachineBasicBlock::instr_iterator I = MBB.instr_end();
108 while (I != MBB.instr_begin()) {
116 I = MBB.instr_end();
123 unsigned WebAssemblyInstrInfo::InsertBranch(MachineBasicBlock &MBB,
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameToArgsOffsetElim.cpp | 51 MachineBasicBlock &MBB = *MFI;
52 for (MachineBasicBlock::iterator MBBI = MBB.begin(), EE = MBB.end();
57 MBBI = TII.loadImmediate(MBB, MBBI, Reg, StackSize);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUConvertToISA.cpp | 54 MachineBasicBlock &MBB = *BB;
55 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCBranchSelector.cpp | 74 [TII](MachineBasicBlock &MBB, unsigned Offset) -> unsigned {
75 unsigned Align = MBB.getAlignment();
80 unsigned ParentAlign = MBB.getParent()->getAlignment();
85 // The alignment of this MBB is larger than the function's alignment, so we
90 // Measure each MBB and compute a size for the entire function.
94 MachineBasicBlock *MBB = &*MFI;
98 if (MBB->getNumber() > 0) {
99 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, FuncSize);
100 BlockSizes[MBB->getNumber()-1] += AlignExtra;
105 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end()
[all...] |
| PPCFrameLowering.h | 44 * \param[in] MBB The machine basic block to find an available register for
52 bool findScratchRegister(MachineBasicBlock *MBB,
65 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
66 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
78 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
84 MachineBasicBlock &MBB,
87 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
122 /// Methods used by shrink wrapping to determine if MBB can be used for the
124 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
125 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.h | 46 void copyPhysReg(MachineBasicBlock &MBB,
51 void storeRegToStack(MachineBasicBlock &MBB,
58 void loadRegFromStack(MachineBasicBlock &MBB,
70 void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
74 void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
79 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
87 int64_t Imm, MachineBasicBlock &MBB,
104 (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const;
111 void ExpandRetRA16(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
115 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
[all...] |
| Mips16FrameLowering.cpp | 36 MachineBasicBlock &MBB) const {
37 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
41 MachineBasicBlock::iterator MBBI = MBB.begin();
57 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
62 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
82 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
88 MachineBasicBlock &MBB) const {
89 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
100 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP
[all...] |
| MipsSEFrameLowering.cpp | 59 bool expandInstr(MachineBasicBlock &MBB, Iter I);
60 void expandLoadCCond(MachineBasicBlock &MBB, Iter I);
61 void expandStoreCCond(MachineBasicBlock &MBB, Iter I);
62 void expandLoadACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
63 void expandStoreACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc,
65 bool expandCopy(MachineBasicBlock &MBB, Iter I);
66 bool expandCopyACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc,
68 bool expandBuildPairF64(MachineBasicBlock &MBB,
70 bool expandExtractElementF64(MachineBasicBlock &MBB,
98 bool ExpandPseudo::expandInstr(MachineBasicBlock &MBB, Iter I)
[all...] |
| /external/llvm/lib/CodeGen/ |
| EdgeBundles.cpp | 44 for (const auto &MBB : *MF) {
45 unsigned OutE = 2 * MBB.getNumber() + 1;
47 for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
48 SE = MBB.succ_end(); SI != SE; ++SI)
79 for (const auto &MBB : *MF) {
80 unsigned BB = MBB.getNumber();
84 for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
85 SE = MBB.succ_end(); SI != SE; ++SI)
|
| MachineVerifier.cpp | 99 // Is this MBB reachable from the MF entry point?
106 // Regs killed in MBB. They may be defined again, and will then be in both
110 // Regs defined in MBB and live out. Note that vregs passing through may
114 // Vregs that pass through MBB untouched. This set is disjoint from
118 // Vregs that must pass through MBB because they are needed by a successor
180 // Extra register info per MBB.
198 void visitMachineBasicBlockBefore(const MachineBasicBlock *MBB);
204 void visitMachineBasicBlockAfter(const MachineBasicBlock *MBB);
211 void report(const char *msg, const MachineBasicBlock *MBB);
224 void markReachable(const MachineBasicBlock *MBB);
[all...] |
| ExpandISelPseudos.cpp | 53 MachineBasicBlock *MBB = &*I;
54 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
62 TLI->EmitInstrWithCustomInserter(MI, MBB);
64 if (NewMBB != MBB) {
65 MBB = NewMBB;
|
| BranchFolding.cpp | 11 // directly to the target block. This pass often results in dead MBB's, which
123 void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
124 assert(MBB->pred_empty() && "MBB must be dead!");
125 DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
127 MachineFunction *MF = MBB->getParent();
129 while (!MBB->succ_empty())
130 MBB->removeSuccessor(MBB->succ_end()-1)
[all...] |
| BranchFolding.h | 48 void setBlock(MachineBasicBlock *MBB) {
49 Block = MBB;
85 void setBlock(MachineBasicBlock *MBB) {
86 getMergePotentialsElt().setBlock(MBB);
106 BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
107 void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F);
139 bool OptimizeBlock(MachineBasicBlock *MBB);
140 void RemoveDeadBlock(MachineBasicBlock *MBB);
141 bool OptimizeImpDefsBlock(MachineBasicBlock *MBB);
144 bool HoistCommonCodeInSuccs(MachineBasicBlock *MBB);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUFrameLowering.h | 39 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
40 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
|
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.h | 31 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
32 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
34 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
39 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
58 MachineBasicBlock &MBB) const override;
66 void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
71 void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
79 MachineBasicBlock &MBB,
|
| Thumb1InstrInfo.cpp | 40 void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
45 MachineFunction &MF = *MBB.getParent();
53 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
63 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tPUSH)))
65 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tPOP)))
71 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
83 if (I != MBB.end()) DL = I->getDebugLoc();
85 MachineFunction &MF = *MBB.getParent();
90 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
97 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64BranchRelaxation.cpp | 92 void adjustBlockOffsets(MachineBasicBlock &MBB);
95 void computeBlockSize(const MachineBasicBlock &MBB);
122 for (MachineBasicBlock &MBB : *MF) {
123 unsigned Align = MBB.getAlignment();
124 unsigned Num = MBB.getNumber();
134 for (auto &MBB : *MF) {
135 const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()];
136 dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
143 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
145 MachineFunction::iterator MBBI(MBB);
[all...] |
| AArch64FrameLowering.h | 27 void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
32 MachineBasicBlock &MBB,
37 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
38 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
45 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
50 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.h | 55 void copyPhysReg(MachineBasicBlock &MBB,
60 void storeRegToStackSlot(MachineBasicBlock &MBB,
66 void loadRegFromStackSlot(MachineBasicBlock &MBB,
78 bool AnalyzeBranch(MachineBasicBlock &MBB,
83 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
84 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
| MSP430FrameLowering.cpp | 43 MachineBasicBlock &MBB) const {
44 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
50 MachineBasicBlock::iterator MBBI = MBB.begin();
51 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
68 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
72 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FP)
84 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
87 if (MBBI != MBB.end())
93 //NumBytes -= mergeSPUpdates(MBB, MBBI, true);
96 // mergeSPUpdatesDown(MBB, MBBI, &NumBytes)
[all...] |
| MSP430BranchSelector.cpp | 63 // Measure each MBB and compute a size for the entire function.
67 MachineBasicBlock *MBB = &*MFI;
70 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
74 BlockSizes[MBB->getNumber()] = BlockSize;
90 // bCC MBB
93 // b MBB
103 MachineBasicBlock &MBB = *MFI;
105 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end()
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.h | 68 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
73 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
75 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
79 void copyPhysReg(MachineBasicBlock &MBB,
84 void storeRegToStackSlot(MachineBasicBlock &MBB,
90 void loadRegFromStackSlot(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.h | 29 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
31 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
33 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
38 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
45 MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override;
86 void insertPrologueInBlock(MachineBasicBlock &MBB) const;
87 void insertEpilogueInBlock(MachineBasicBlock &MBB) const;
88 bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
90 bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
92 void insertCFIInstructionsAt(MachineBasicBlock &MBB,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ExpandPseudo.cpp | 56 bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
57 bool ExpandMBB(MachineBasicBlock &MBB);
65 bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
89 StackAdj += X86FL->mergeSPUpdates(MBB, MBBI, true);
90 X86FL->emitSPUpdate(MBB, MBBI, StackAdj, /*InEpilogue=*/true);
99 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
112 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
116 BuildMI(MBB, MBBI, DL,
120 BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr))
128 MBB.erase(MBBI)
[all...] |
