/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
elf_arch_mips64r5.d | 1 # name: ELF MIPS64r5 markings 4 # as: -32 -march=mips64r5 11 ISA: MIPS64r5
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/external/llvm/test/MC/Mips/mips64r5/ |
abi-bad.s | 1 # RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r5 2>&1 | FileCheck %s
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abiflags.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 | \ 4 # RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -filetype=obj -o - | \
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invalid.s | 4 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -mcpu=mips64r5 2>%t1
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/external/llvm/test/MC/Mips/ |
set-mips-directives.s | 36 .set mips64r5 72 # CHECK: .set mips64r5
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set-arch.s | 35 .set arch=mips64r5
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set-mips-directives-bad.s | 40 .set mips64r5
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elf_eflags.s | 12 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s 17 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
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/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
invalid-xfail.txt | 1 # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips64r5 | FileCheck %s
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valid-xfail.txt | 1 # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips64r5 | FileCheck %s
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/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
check-disabled-mcpus.ll | 17 ; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic \
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/external/llvm/test/MC/Mips/eva/ |
invalid-noeva.s | 15 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r5 2>%t1
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/external/llvm/test/tools/llvm-readobj/ |
mips-abiflags.test | 8 EL64-NEXT: ISA: MIPS64r5
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/external/llvm/lib/Target/Mips/ |
Mips.td | 142 def FeatureMips64r5 : SubtargetFeature<"mips64r5", "MipsArchVersion", 143 "Mips64r5", "Mips64r5 ISA Support", 202 def : Proc<"mips64r5", [FeatureMips64r5]>;
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MipsSubtarget.h | 42 Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6 213 bool hasMips64r5() const { return MipsArchVersion >= Mips64r5; }
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/external/llvm/test/CodeGen/Mips/ |
check-adde-redundant-moves.ll | 18 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s -check-prefix=ALL
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/external/llvm/test/Object/Mips/ |
abi-flags.yaml | 7 # OBJ-NEXT: ISA: MIPS64r5
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
indirectbr.ll | 12 ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6
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and.ll | 23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
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or.ll | 23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
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udiv.ll | 23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
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xor.ll | 23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
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add.ll | 23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsABIInfo.cpp | 87 .Case("mips64r5", MipsABIInfo::N64())
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/external/llvm/test/MC/Disassembler/Mips/eva/ |
valid_preR6-eva.txt | 6 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r5 -mattr=eva | FileCheck %s
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