1 RUN: llvm-readobj -mips-abi-flags %p/Inputs/abiflags.obj.elf-mipsel | \ 2 RUN: FileCheck -check-prefix=EL64 %s 3 RUN: llvm-readobj -mips-abi-flags %p/Inputs/abiflags.obj.elf-mips | \ 4 RUN: FileCheck -check-prefix=BE32 %s 5 6 EL64: MIPS ABI Flags { 7 EL64-NEXT: Version: 0 8 EL64-NEXT: ISA: MIPS64r5 9 EL64-NEXT: ISA Extension: Cavium Networks Octeon3 (0x13) 10 EL64-NEXT: ASEs [ (0x103) 11 EL64-NEXT: DSP (0x1) 12 EL64-NEXT: DSPR2 (0x2) 13 EL64-NEXT: VZ (0x100) 14 EL64-NEXT: ] 15 EL64-NEXT: FP ABI: Hard float (double precision) (0x1) 16 EL64-NEXT: GPR size: 64 17 EL64-NEXT: CPR1 size: 64 18 EL64-NEXT: CPR2 size: 0 19 EL64-NEXT: Flags 1 [ (0x1) 20 EL64-NEXT: ODDSPREG (0x1) 21 EL64-NEXT: ] 22 EL64-NEXT: Flags 2: 0x0 23 EL64-NEXT: } 24 25 BE32: MIPS ABI Flags { 26 BE32-NEXT: Version: 0 27 BE32-NEXT: ISA: MIPS32r2 28 BE32-NEXT: ISA Extension: None (0x0) 29 BE32-NEXT: ASEs [ (0x803) 30 BE32-NEXT: DSP (0x1) 31 BE32-NEXT: DSPR2 (0x2) 32 BE32-NEXT: microMIPS (0x800) 33 BE32-NEXT: ] 34 BE32-NEXT: FP ABI: Soft float (0x3) 35 BE32-NEXT: GPR size: 32 36 BE32-NEXT: CPR1 size: 0 37 BE32-NEXT: CPR2 size: 0 38 BE32-NEXT: Flags 1 [ (0x1) 39 BE32-NEXT: ODDSPREG (0x1) 40 BE32-NEXT: ] 41 BE32-NEXT: Flags 2: 0x0 42 BE32-NEXT: } 43
