| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 204 bgtzalc $2, ext
205 bgtzalc $2, . + 4 + (-32768 << 2)
206 bgtzalc $2, . + 4 + (32767 << 2)
207 bgtzalc $2, 1f
|
| r6-n32.d | 388 0+0470 <[^>]*> 1c020000 bgtzalc v0,00000474 <[^>]*>
391 0+0478 <[^>]*> 1c020000 bgtzalc v0,0000047c <[^>]*>
394 0+0480 <[^>]*> 1c020000 bgtzalc v0,00000484 <[^>]*>
397 0+0488 <[^>]*> 1c020000 bgtzalc v0,0000048c <[^>]*>
|
| r6.d | 387 0+0470 <[^>]*> 1c02ffff bgtzalc v0,00000470 <[^>]*>
390 0+0478 <[^>]*> 1c028000 bgtzalc v0,fffe047c <[^>]*>
393 0+0480 <[^>]*> 1c027fff bgtzalc v0,00020480 <[^>]*>
396 0+0488 <[^>]*> 1c02ffff bgtzalc v0,00000488 <[^>]*>
|
| r6-n64.d | 574 0+0470 <[^>]*> 1c020000 bgtzalc v0,0+0474 <[^>]*>
579 0+0478 <[^>]*> 1c020000 bgtzalc v0,0+047c <[^>]*>
584 0+0480 <[^>]*> 1c020000 bgtzalc v0,0+0484 <[^>]*>
589 0+0488 <[^>]*> 1c020000 bgtzalc v0,0+048c <[^>]*>
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 352 COMPARE_PC_REL_COMPACT(bgtzalc(a0, -32768),
353 "1c048000 bgtzalc a0, -32768", -32768);
354 COMPARE_PC_REL_COMPACT(bgtzalc(a0, -1), "1c04ffff bgtzalc a0, -1",
356 COMPARE_PC_REL_COMPACT(bgtzalc(a0, 1), "1c040001 bgtzalc a0, 1", 1);
357 COMPARE_PC_REL_COMPACT(bgtzalc(a0, 32767),
358 "1c047fff bgtzalc a0, 32767", 32767);
[all...] |
| test-disasm-mips64.cc | [all...] |
| /external/v8/src/mips/ |
| constants-mips.cc | 137 case BGTZ: // POP07 bltuc/bgtuc, bgtzalc, bltzalc
|
| assembler-mips.h | 656 void bgtzalc(Register rt, int16_t offset);
657 inline void bgtzalc(Register rt, Label* L) {
658 bgtzalc(rt, shifted_branch_offset(L));
[all...] |
| constants-mips.h | 389 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc
[all...] |
| disasm-mips.cc | [all...] |
| /external/v8/src/mips64/ |
| constants-mips64.cc | 137 case BGTZ: // POP07 bltuc/bgtuc, bgtzalc, bltzalc
|
| assembler-mips64.h | 660 void bgtzalc(Register rt, int16_t offset);
661 inline void bgtzalc(Register rt, Label* L) {
662 bgtzalc(rt, shifted_branch_offset(L));
[all...] |
| constants-mips64.h | 385 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| valid-mips32r6-el.txt | 31 0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1332
|
| valid-mips32r6.txt | 42 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1332
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| valid.s | 51 bgtzalc $2, 1332 # CHECK: bgtzalc $2, 1332 # encoding: [0x1c,0x02,0x01,0x4d]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 47 bgtzalc $2, 1332 # CHECK: bgtzalc $2, 1332 # encoding: [0x1c,0x02,0x01,0x4d]
|
| /external/llvm/lib/Target/Mips/ |
| Mips32r6InstrInfo.td | 446 class BGTZALC_DESC : CMP_CBR_RT_Z_DESC_BASE<"bgtzalc", brtarget, GPR32Opnd> {
675 def BGTZALC : R6MMR6Rel, BGTZALC_ENC, BGTZALC_DESC, ISA_MIPS32R6;
[all...] |
| Mips32r6InstrFormats.td | 378 // BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0
|
| MicroMips32r6InstrInfo.td | 191 class BGTZALC_MMR6_DESC : CMP_CBR_RT_Z_MMR6_DESC_BASE<"bgtzalc", brtarget_mm,
[all...] |
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 26 bgtzalc $2, 1332 # CHECK: bgtzalc $2, 1332 # encoding: [0xe0,0x40,0x02,0x9a]
|
| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| valid.txt | 44 0xe0 0x40 0x02 0x9a # CHECK: bgtzalc $2, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| valid-mips64r6-el.txt | 27 0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1332
|
| valid-mips64r6.txt | 59 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1332
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 726 // BGTZALC if rs == 0 && rt != 0
740 MI.setOpcode(Mips::BGTZALC);
[all...] |
