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  /external/llvm/test/CodeGen/MIR/X86/
basic-block-liveins.mir 2 # This test ensures that the MIR parser parses basic block liveins correctly.
28 ; CHECK-NEXT: liveins: %edi, %esi
30 liveins: %edi, %esi
39 ; Verify that we can have multiple lists of liveins that will be merged into
42 ; CHECK-NEXT: liveins: %edi, %esi
44 liveins: %edi
45 liveins: %esi
53 ; Verify that we can have an empty list of liveins.
58 liveins:
function-liveins.mir 2 # This test ensures that the MIR parser parses machine function's liveins
22 # CHECK: liveins:
25 liveins:
30 liveins: %edi, %esi
newline-handling.mir 33 liveins:
39 # CHECK-NEXT: liveins: %edi
48 # CHECK-NEXT: liveins: %edi
55 liveins: %edi
69 liveins: %edi
77 liveins:
83 # CHECK-NEXT: liveins: %edi
92 # CHECK-NEXT: liveins: %edi
99 liveins: %edi
105 bb.2.exit: liveins: %ed
    [all...]
expected-comma-after-memory-operand.mir 17 liveins:
21 liveins: %rdi
expected-from-in-memory-operand.mir 15 liveins:
19 liveins: %rdi
expected-integer-after-tied-def.mir 15 liveins:
19 liveins: %rdi
expected-load-or-store-in-memory-operand.mir 15 liveins:
19 liveins: %rdi
expected-named-register-in-functions-livein.mir 17 liveins:
22 liveins: %edi
expected-pointer-value-in-memory-operand.mir 15 liveins:
19 liveins: %rdi
expected-size-integer-after-memory-operation.mir 15 liveins:
19 liveins: %rdi
expected-tied-def-after-lparen.mir 15 liveins:
19 liveins: %rdi
expected-value-in-memory-operand.mir 15 liveins:
19 liveins: %rdi
expected-virtual-register-in-functions-livein.mir 17 liveins:
22 liveins: %edi
invalid-tied-def-index-error.mir 15 liveins:
19 liveins: %rdi
large-size-in-memory-operand-error.mir 15 liveins:
19 liveins: %rdi
standalone-register-error.mir 14 liveins:
19 liveins: %edi
undefined-value-in-memory-operand.mir 15 liveins:
19 liveins: %rdi
basic-block-not-at-start-of-line-error.mir 21 liveins:
26 liveins: %edi 44
37 liveins: %edi
expected-basic-block-at-start-of-body.mir 21 liveins:
26 liveins: %edi 44
36 liveins: %edi
expected-newline-at-end-of-list.mir 21 liveins:
27 liveins: %edi 44
37 liveins: %edi
expected-named-register-livein.mir 16 liveins: %0
inline-asm-registers.mir 24 liveins:
29 liveins: %rdi, %rsi
41 liveins:
46 liveins: %rdi, %rsi
  /external/llvm/test/CodeGen/MIR/ARM/
extraneous-closing-brace-error.mir 12 liveins:
16 liveins: %r0
expected-closing-brace.mir 27 liveins:
32 liveins: %r0
35 liveins: %r0
46 liveins: %r1
  /external/llvm/test/CodeGen/X86/
virtual-registers-cleared-in-machine-functions-liveins.ll 5 ; liveins are cleared after register allocation.
13 ; PRE-RA: liveins:
17 ; POST-RA: liveins:

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