1 ; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA 2 ; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA 3 4 ; This test verifies that the virtual register references in machine function's 5 ; liveins are cleared after register allocation. 6 7 define i32 @test(i32 %a, i32 %b) { 8 body: 9 %c = mul i32 %a, %b 10 ret i32 %c 11 } 12 13 ; PRE-RA: liveins: 14 ; PRE-RA-NEXT: - { reg: '%edi', virtual-reg: '%0' } 15 ; PRE-RA-NEXT: - { reg: '%esi', virtual-reg: '%1' } 16 17 ; POST-RA: liveins: 18 ; POST-RA-NEXT: - { reg: '%edi' } 19 ; POST-RA-NEXT: - { reg: '%esi' } 20
