/external/llvm/lib/Target/Mips/ |
MicroMipsDSPInstrFormats.td | 10 class MMDSPInst<string opstr = ""> 14 string BaseOpcode = opstr; 25 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> { 37 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> { 48 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> { 61 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> { [all...] |
MicroMipsInstrInfo.td | 178 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op, 181 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> { 189 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO, 192 !strconcat(opstr, "\t$rt, $addr"), 199 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO, 202 !strconcat(opstr, "\t$rt, $addr"), 222 class MovePMM16<string opstr, RegisterOperand RO> : 224 !strconcat(opstr, "\t$dst_regs, $rs, $rt"), [], 243 class StorePairMM<string opstr, InstrItinClass Itin = NoItinerary, 246 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> [all...] |
MipsInstrFPU.td | 104 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm, 107 !strconcat(opstr, "\t$fd, $fs, $ft"), 108 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>, 113 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm, 115 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32; 116 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 { 121 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC, 123 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"), 124 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>, 128 multiclass ABSS_M<string opstr, InstrItinClass Itin [all...] |
MipsInstrInfo.td | 784 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0, 788 !strconcat(opstr, "\t$rd, $rs, $rt"), 789 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> { 796 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO, 801 !strconcat(opstr, "\t$rt, $rs, $imm16"), 803 Itin, FrmI, opstr> { 809 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> : 811 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> { 818 class LogicNOR<string opstr, RegisterOperand RO> [all...] |
MipsCondMov.td | 19 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC, 22 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> { 27 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC, 30 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>, 36 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, 39 !strconcat(opstr, "\t$rd, $rs, $fcc"), 41 Itin, FrmFR, opstr>, HARDFLOAT { 46 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin [all...] |
MicroMips32r6InstrInfo.td | 372 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO> 373 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"), 375 MMR6Arch<opstr>, MicroMipsR6Inst16 { 382 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd, 384 : MMR6Arch<opstr> { 386 string AsmString = !strconcat(opstr, "\t$rt, $offset"); 404 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO> 405 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"), 407 MMR6Arch<opstr>, MicroMipsR6Inst16 { 514 class SWE_MMR6_DESC_BASE<string opstr, DAGOperand RO, DAGOperand MO [all...] |
Mips64InstrInfo.td | 315 class Count1s<string opstr, RegisterOperand RO>: 316 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"), 317 [(set RO:$rd, (ctpop RO:$rs))], II_POP, FrmR, opstr> { 321 class ExtsCins<string opstr, SDPatternOperator Op = null_frag>: 323 !strconcat(opstr, " $rt, $rs, $pos, $lenm1"), 325 NoItinerary, FrmR, opstr> { 329 class SetCC64_R<string opstr, PatFrag cond_op> : 331 !strconcat(opstr, "\t$rd, $rs, $rt"), 334 II_SEQ_SNE, FrmR, opstr> { 338 class SetCC64_I<string opstr, PatFrag cond_op> [all...] |
MipsDSPInstrFormats.td | 43 class DSPInst<string opstr = ""> 46 string BaseOpcode = opstr;
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/build/kati/ |
stmt.cc | 37 const char* opstr = "???"; local 39 case AssignOp::EQ: opstr = "EQ"; break; 40 case AssignOp::COLON_EQ: opstr = "COLON_EQ"; break; 41 case AssignOp::PLUS_EQ: opstr = "PLUS_EQ"; break; 42 case AssignOp::QUESTION_EQ: opstr = "QUESTION_EQ"; break; 51 "opstr=%s dir=%s loc=%s:%d)", 55 opstr, dirstr, LOCF(loc())); 77 const char* opstr = "???"; local 79 case CondOp::IFEQ: opstr = "ifeq"; break; 80 case CondOp::IFNEQ: opstr = "ifneq"; break [all...] |
/hardware/qcom/display/msm8909/libhwcomposer/ |
hwc_ad.cpp | 51 char opStr[4] = ""; 52 snprintf(opStr, sizeof(opStr), "%d", value); 53 ssize_t ret = write(adFd, opStr, strlen(opStr)); 78 char opStr[4]; 79 ssize_t bytesRead = read(adFd, opStr, sizeof(opStr) - 1); 81 opStr[bytesRead] = '\0'; 83 ret = atoi(opStr); [all...] |
/hardware/qcom/display/msm8994/libhwcomposer/ |
hwc_ad.cpp | 51 char opStr[4] = ""; 52 snprintf(opStr, sizeof(opStr), "%d", value); 53 ssize_t ret = write(adFd, opStr, strlen(opStr)); 78 char opStr[4]; 79 ssize_t bytesRead = read(adFd, opStr, sizeof(opStr) - 1); 81 opStr[bytesRead] = '\0'; 83 ret = atoi(opStr); [all...] |
/hardware/qcom/display/msm8226/libhwcomposer/ |
hwc_ad.cpp | 52 char opStr[4] = ""; 53 snprintf(opStr, sizeof(opStr), "%d", value); 54 ssize_t ret = write(adFd, opStr, strlen(opStr)); 79 char opStr[4] = {'\0'}; 80 if(read(adFd, opStr, strlen(opStr)) >= 0) { 82 ret = atoi(opStr);
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/hardware/qcom/display/msm8084/libhwcomposer/ |
hwc_ad.cpp | 83 char opStr[4] = ""; 84 snprintf(opStr, sizeof(opStr), "%d", value); 85 ssize_t ret = write(adFd, opStr, strlen(opStr)); 110 char opStr[4] = {'\0'}; 111 if(read(adFd, opStr, strlen(opStr)) >= 0) { 113 ret = atoi(opStr);
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/external/llvm/lib/Target/X86/ |
X86InstrFMA.td | 194 string OpStr, string PackTy, 197 defm r132 : fma3s_rm<opc132, !strconcat(OpStr, "132", PackTy), x86memop, RC>; 198 defm r213 : fma3s_rm<opc213, !strconcat(OpStr, "213", PackTy), x86memop, RC, 200 defm r231 : fma3s_rm<opc231, !strconcat(OpStr, "231", PackTy), x86memop, RC>; 213 string OpStr, string PackTy, 215 defm r132 : fma3s_rm_int<opc132, !strconcat(OpStr, "132", PackTy), 217 defm r213 : fma3s_rm_int<opc213, !strconcat(OpStr, "213", PackTy), 219 defm r231 : fma3s_rm_int<opc231, !strconcat(OpStr, "231", PackTy), 224 string OpStr, Intrinsic IntF32, Intrinsic IntF64, 227 defm SS : fma3s_forms<opc132, opc213, opc231, OpStr, "ss", OpNode [all...] |
/prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/arm/armasm/ |
inst.go | 40 if op >= Op(len(opstr)) || opstr[op] == "" { 43 return opstr[op]
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/prebuilts/go/linux-x86/src/cmd/internal/rsc.io/arm/armasm/ |
inst.go | 40 if op >= Op(len(opstr)) || opstr[op] == "" { 43 return opstr[op]
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/external/skia/tests/ |
PathOpsOpCubicThreadedTest.cpp | 64 SkPathOpsDebug::OpStr((SkPathOp) op));
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/external/llvm/lib/Target/NVPTX/ |
NVPTXVector.td | [all...] |
NVPTXInstrInfo.td | [all...] |
/external/icu/icu4c/source/test/cintltst/ |
putiltst.c | 314 const char *opstr; local 322 opstr = testCases[j+1]; 324 switch(opstr[0]) { 339 log_verbose("%d: %s %s %s, OK\n", (j/3), v1str, opstr, v2str); 341 log_err("%d: %s %s %s: wanted values of the same sign, %d got %d\n", (j/3), v1str, opstr, v2str, op, got);
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/hardware/qcom/display/msm8909/libhdmi/ |
hdmi.cpp | 673 char opStr[4]; 674 ssize_t bytesRead = read(connectedNode, opStr, sizeof(opStr) - 1); 676 opStr[bytesRead] = '\0'; 677 ret = atoi(opStr);
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/hardware/qcom/display/msm8994/libhdmi/ |
hdmi.cpp | 695 char opStr[4]; 696 ssize_t bytesRead = read(connectedNode, opStr, sizeof(opStr) - 1); 698 opStr[bytesRead] = '\0'; 699 ret = atoi(opStr);
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/frameworks/base/services/core/java/com/android/server/ |
AppOpsService.java | [all...] |
/external/google-breakpad/src/third_party/libdisasm/ |
x86_format.c | 1090 struct op_string * opstr = (struct op_string *) arg; local 1114 struct op_string opstr = { buf, len }; local [all...] |
/toolchain/binutils/binutils-2.25/gas/ |
symbols.c | 3111 char * opstr = NULL; \/* Operator prefix string. *\/ local [all...] |