| /art/compiler/optimizing/ |
| common_arm64.h | 24 #include "vixl/a64/disasm-a64.h"
25 #include "vixl/a64/macro-assembler-a64.h"
31 // Convenience helpers to ease conversion to and from VIXL operands.
37 return vixl::kSPRegInternalCode;
40 return vixl::kZeroRegCode;
46 if (code == vixl::kSPRegInternalCode) {
49 if (code == vixl::kZeroRegCode) {
55 static inline vixl::Register XRegisterFrom(Location location) {
57 return vixl::Register::XRegFromCode(VIXLRegCodeFromART(location.reg()));
60 static inline vixl::Register WRegisterFrom(Location location)
[all...] |
| code_generator_arm64.h | 29 #include "vixl/a64/disasm-a64.h"
30 #include "vixl/a64/macro-assembler-a64.h"
40 static const vixl::Register kParameterCoreRegisters[] = {
41 vixl::x1, vixl::x2, vixl::x3, vixl::x4, vixl::x5, vixl::x6, vixl::x
[all...] |
| intrinsics_arm64.h | 22 namespace vixl { namespace
26 } // namespace vixl
76 vixl::MacroAssembler* GetVIXLAssembler();
|
| /external/vixl/doc/topics/ |
| index.md | 1 We will try to add documentation for topics that may be useful to VIXL users. If
3 us at <vixl@arm.com>.
8 * [Using VIM YouCompleteMe with VIXL](ycm.md)
|
| ycm.md | 1 VIM YouCompleteMe for VIXL
5 engine for VIM. VIXL includes a `.ycm_extra_conf.py` to configure YCM to work in
6 the VIXL repository.
|
| extending-the-disassembler.md | 29 of the disassembler. The VIXL `Decoder` uses a visitor pattern implementation,
40 VIXL disasm 0x7fff04cb05e0: add x10, x16, x17
43 VIXL disasm 0x7fff04cb05e4: cbz x10, #+0x28 (addr 0x7fff04cb060c)
46 VIXL disasm 0x7fff04cb05e8: add x11, x16, x17
49 VIXL disasm 0x7fff04cb05ec: add w5, w6, w30
52 VIXL disasm 0x7fff04cb05f0: tbz w10, #2, #-0x10 (addr 0x7fff04cb05e0)
|
| /external/vixl/ |
| README.version | 1 URL: https://github.com/armvixl/vixl/archive/1.7.tar.gz
|
| Android.mk | 65 src/vixl/a64/assembler-a64.cc \
66 src/vixl/a64/cpu-a64.cc \
67 src/vixl/a64/debugger-a64.cc \
68 src/vixl/a64/decoder-a64.cc \
69 src/vixl/a64/disasm-a64.cc \
70 src/vixl/a64/instructions-a64.cc \
71 src/vixl/a64/instrument-a64.cc \
72 src/vixl/a64/logic-a64.cc \
73 src/vixl/a64/macro-assembler-a64.cc \
74 src/vixl/a64/simulator-a64.cc
[all...] |
| README.md | 0 VIXL: AArch64 Runtime Code Generation Library Version 1.12
16 VIXL contains three components.
26 The VIXL git repository can be found [on GitHub][vixl].
28 Changes from previous versions of VIXL can be found in the
42 To build VIXL the following software is required:
48 A 64-bit host machine is required, implementing an LP64 data model. VIXL has
63 VIXL was developed for JavaScript engines so a number of features from A64 were
71 The VIXL simulator supports only those instructions that the VIXL assembler ca
[all...] |
| /art/disassembler/ |
| disassembler_arm64.cc | 42 const vixl::Instruction* instr,
43 const vixl::CPURegister& reg) {
59 void CustomDisassembler::VisitLoadLiteral(const vixl::Instruction* instr) {
76 vixl::Instr op = instr->Mask(vixl::LoadLiteralMask);
78 case vixl::LDR_w_lit:
79 case vixl::LDR_x_lit:
80 case vixl::LDRSW_x_lit: {
81 int64_t data = op == vixl::LDR_x_lit ? *reinterpret_cast<int64_t*>(data_address)
86 case vixl::LDR_s_lit
[all...] |
| disassembler_arm64.h | 24 #include "vixl/a64/decoder-a64.h"
25 #include "vixl/a64/disasm-a64.h"
31 class CustomDisassembler FINAL : public vixl::Disassembler {
34 : vixl::Disassembler(),
39 MapCodeAddress(0, reinterpret_cast<const vixl::Instruction*>(options->base_address_));
44 void AppendRegisterNameToOutput(const vixl::Instruction* instr,
45 const vixl::CPURegister& reg) OVERRIDE;
48 void VisitLoadLiteral(const vixl::Instruction* instr) OVERRIDE;
51 void VisitLoadStoreUnsignedOffset(const vixl::Instruction* instr) OVERRIDE;
78 vixl::Decoder decoder
[all...] |
| /external/vixl/test/ |
| test-runner.cc | 33 vixl::Test* vixl::Test::first_ = NULL;
34 vixl::Test* vixl::Test::last_ = NULL;
37 bool vixl::Test::debug_ = false;
40 bool vixl::Test::trace_sim_ = false;
41 bool vixl::Test::trace_reg_ = false;
42 bool vixl::Test::trace_write_ = false;
45 bool vixl::Test::coloured_trace_ = false;
48 bool vixl::Test::instruction_stats_ = false
[all...] |
| /art/runtime/simulator/ |
| code_simulator_arm64.h | 22 // TODO: make vixl clean wrt -Wshadow.
25 #include "vixl/a64/simulator-a64.h"
45 vixl::Decoder* decoder_;
46 vixl::Simulator* simulator_;
48 // TODO: Enable CodeSimulatorArm64 for more host ISAs once vixl::Simulator supports them.
|
| code_simulator_arm64.cc | 22 // VIXL has not been tested on 32bit architectures, so vixl::Simulator is not always
25 // TODO: when vixl::Simulator is always available, remove the these checks.
38 decoder_ = new vixl::Decoder();
39 simulator_ = new vixl::Simulator(decoder_);
50 simulator_->RunFrom(reinterpret_cast<const vixl::Instruction*>(code_buffer));
|
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 594 EXPECT_TRUE(vixl::x0.Is(Arm64Assembler::reg_x(X0)));
595 EXPECT_TRUE(vixl::x1.Is(Arm64Assembler::reg_x(X1)));
596 EXPECT_TRUE(vixl::x2.Is(Arm64Assembler::reg_x(X2)));
597 EXPECT_TRUE(vixl::x3.Is(Arm64Assembler::reg_x(X3)));
598 EXPECT_TRUE(vixl::x4.Is(Arm64Assembler::reg_x(X4)));
599 EXPECT_TRUE(vixl::x5.Is(Arm64Assembler::reg_x(X5)));
600 EXPECT_TRUE(vixl::x6.Is(Arm64Assembler::reg_x(X6)));
601 EXPECT_TRUE(vixl::x7.Is(Arm64Assembler::reg_x(X7)));
602 EXPECT_TRUE(vixl::x8.Is(Arm64Assembler::reg_x(X8)));
603 EXPECT_TRUE(vixl::x9.Is(Arm64Assembler::reg_x(X9)))
[all...] |
| assembler_arm64.h | 31 // TODO: make vixl clean wrt -Wshadow.
36 #include "vixl/a64/macro-assembler-a64.h"
37 #include "vixl/a64/disasm-a64.h"
43 #define MEM_OP(...) vixl::MemOperand(__VA_ARGS__)
71 vixl::Label* Entry() { return &exception_entry_; }
79 vixl::Label exception_entry_;
87 // We indicate the size of the initial code generation buffer to the VIXL
92 vixl_masm_(new vixl::MacroAssembler(kArm64BaseBufferSize)) {}
108 void SpillRegisters(vixl::CPURegList registers, int offset);
109 void UnspillRegisters(vixl::CPURegList registers, int offset)
[all...] |
| /external/vixl/src/vixl/a64/ |
| instrument-a64.h | 30 #include "vixl/globals.h"
31 #include "vixl/utils.h"
32 #include "vixl/a64/decoder-a64.h"
33 #include "vixl/a64/constants-a64.h"
34 #include "vixl/a64/instrument-a64.h"
36 namespace vixl { namespace
109 } // namespace vixl
|
| debugger-a64.h | 37 #include "vixl/globals.h"
38 #include "vixl/utils.h"
39 #include "vixl/a64/constants-a64.h"
40 #include "vixl/a64/simulator-a64.h"
42 namespace vixl { namespace
114 } // namespace vixl
|
| cpu-a64.h | 30 #include "vixl/globals.h"
31 #include "vixl/a64/instructions-a64.h"
33 namespace vixl { namespace
81 } // namespace vixl
|
| /external/vixl/doc/ |
| getting-started.md | 1 Getting Started with VIXL
5 This guide will show you how to use the VIXL framework. We will see how to set
6 up the VIXL assembler and generate some code. We will also go into details on a
7 few useful features provided by VIXL and see how to run the generated code in
8 the VIXL simulator.
24 VIXL's assembler will generate some code at run-time, and this code needs to
32 All VIXL components are declared in the `vixl` namespace, so let's add this to
35 using namespace vixl;
102 Now we are going to learn a bit more on a couple of interesting VIXL feature
[all...] |
| /external/vixl/benchmarks/ |
| bench-branch-link-masm.cc | 27 #include "vixl/a64/macro-assembler-a64.h"
28 #include "vixl/a64/instructions-a64.h"
29 #include "vixl/globals.h"
31 using namespace vixl;
|
| bench-branch-link.cc | 27 #include "vixl/a64/macro-assembler-a64.h"
28 #include "vixl/a64/instructions-a64.h"
29 #include "vixl/globals.h"
31 using namespace vixl;
|
| bench-branch-masm.cc | 27 #include "vixl/globals.h"
29 #include "vixl/a64/macro-assembler-a64.h"
30 #include "vixl/a64/instructions-a64.h"
32 using namespace vixl;
|
| bench-branch.cc | 27 #include "vixl/a64/macro-assembler-a64.h"
28 #include "vixl/a64/instructions-a64.h"
29 #include "vixl/globals.h"
31 using namespace vixl;
|
| bench-dataop.cc | 27 #include "vixl/a64/macro-assembler-a64.h"
28 #include "vixl/a64/instructions-a64.h"
29 #include "vixl/globals.h"
31 using namespace vixl;
|
