1 // REQUIRES: x86-registered-target 2 // RUN: %clang_cc1 %s -triple i386-apple-darwin10 -fasm-blocks -emit-llvm -o - | FileCheck %s 3 4 void t1() { 5 // CHECK: @t1 6 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() 7 // CHECK: ret void 8 __asm {} 9 } 10 11 void t2() { 12 // CHECK: @t2 13 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"() 14 // CHECK: ret void 15 __asm nop 16 __asm nop 17 __asm nop 18 } 19 20 void t3() { 21 // CHECK: @t3 22 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"() 23 // CHECK: ret void 24 __asm nop __asm nop __asm nop 25 } 26 27 void t4(void) { 28 // CHECK: @t4 29 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() 30 // CHECK: ret void 31 __asm mov ebx, eax 32 __asm mov ecx, ebx 33 } 34 35 void t5(void) { 36 // CHECK: @t5 37 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() 38 // CHECK: ret void 39 __asm mov ebx, eax __asm mov ecx, ebx 40 } 41 42 void t6(void) { 43 __asm int 0x2c 44 // CHECK: t6 45 // CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() 46 } 47 48 void t7() { 49 __asm { 50 int 0x2c ; } asm comments are fun! }{ 51 } 52 __asm { 53 { 54 int 0x2c ; } asm comments are fun! }{ 55 } 56 } 57 __asm {} 58 // CHECK: t7 59 // CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() 60 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() 61 } 62 63 int t8() { 64 __asm int 4 ; } comments for single-line asm 65 __asm {} 66 __asm int 4 67 return 10; 68 // CHECK: t8 69 // CHECK: call i32 asm sideeffect inteldialect "int $$4\0A\09int $$4", "={eax},~{dirflag},~{fpsr},~{flags}"() 70 // CHECK: ret i32 10 71 } 72 73 void t9() { 74 __asm { 75 push ebx 76 { mov ebx, 0x07 } 77 __asm { pop ebx } 78 } 79 // CHECK: t9 80 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$0x07\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 81 } 82 83 unsigned t10(void) { 84 unsigned i = 1, j; 85 __asm { 86 mov eax, i 87 mov j, eax 88 } 89 return j; 90 // CHECK: t10 91 // CHECK: [[r:%[a-zA-Z0-9]+]] = alloca i32, align 4 92 // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4 93 // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4 94 // CHECK: store i32 1, i32* [[I]], align 4 95 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $2\0A\09mov dword ptr $0, eax", "=*m,={eax},*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}) 96 // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32, i32* [[J]], align 4 97 // CHECK: ret i32 [[RET]] 98 } 99 100 void t11(void) { 101 __asm mov eax, 1 102 // CHECK: t11 103 // CHECK: call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() 104 } 105 106 unsigned t12(void) { 107 unsigned i = 1, j, l = 1, m; 108 __asm { 109 mov eax, i 110 mov j, eax 111 mov eax, l 112 mov m, eax 113 } 114 return j + m; 115 // CHECK: t12 116 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $3\0A\09mov dword ptr $0, eax\0A\09mov eax, dword ptr $4\0A\09mov dword ptr $1, eax", "=*m,=*m,={eax},*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 117 } 118 119 void t13() { 120 char i = 1; 121 short j = 2; 122 __asm movzx eax, i 123 __asm movzx eax, j 124 // CHECK: t13 125 // CHECK: call void asm sideeffect inteldialect "movzx eax, byte ptr $0\0A\09movzx eax, word ptr $1", "*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i8* %{{.*}}i, i16* %{{.*}}j) 126 } 127 128 void t14() { 129 unsigned i = 1, j = 2; 130 __asm { 131 .if 1 132 { mov eax, i } 133 .else 134 mov ebx, j 135 .endif 136 } 137 // CHECK: t14 138 // CHECK: call void asm sideeffect inteldialect ".if 1\0A\09mov eax, dword ptr $0\0A\09.else\0A\09mov ebx, j\0A\09.endif", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 139 } 140 141 int gvar = 10; 142 void t15() { 143 // CHECK: t15 144 int lvar = 10; 145 __asm mov eax, lvar ; eax = 10 146 // CHECK: mov eax, dword ptr $0 147 __asm mov eax, offset lvar ; eax = address of lvar 148 // CHECK: mov eax, $1 149 __asm mov eax, offset gvar ; eax = address of gvar 150 // CHECK: mov eax, $2 151 // CHECK: "*m,r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* @{{.*}}) 152 } 153 154 void t16() { 155 int var = 10; 156 __asm mov [eax], offset var 157 // CHECK: t16 158 // CHECK: call void asm sideeffect inteldialect "mov [eax], $0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 159 } 160 161 void t17() { 162 // CHECK: t17 163 __asm _emit 0x4A 164 // CHECK: .byte 0x4A 165 __asm _emit 0x43 166 // CHECK: .byte 0x43 167 __asm _emit 0x4B 168 // CHECK: .byte 0x4B 169 __asm _EMIT 0x4B 170 // CHECK: .byte 0x4B 171 // CHECK: "~{dirflag},~{fpsr},~{flags}"() 172 } 173 174 void t20() { 175 // CHECK: t20 176 char bar; 177 int foo; 178 char _bar[2]; 179 int _foo[4]; 180 181 __asm mov eax, LENGTH foo 182 // CHECK: mov eax, $$1 183 __asm mov eax, LENGTH bar 184 // CHECK: mov eax, $$1 185 __asm mov eax, LENGTH _foo 186 // CHECK: mov eax, $$4 187 __asm mov eax, LENGTH _bar 188 // CHECK: mov eax, $$2 189 190 __asm mov eax, TYPE foo 191 // CHECK: mov eax, $$4 192 __asm mov eax, TYPE bar 193 // CHECK: mov eax, $$1 194 __asm mov eax, TYPE _foo 195 // CHECK: mov eax, $$4 196 __asm mov eax, TYPE _bar 197 // CHECK: mov eax, $$1 198 199 __asm mov eax, SIZE foo 200 // CHECK: mov eax, $$4 201 __asm mov eax, SIZE bar 202 // CHECK: mov eax, $$1 203 __asm mov eax, SIZE _foo 204 // CHECK: mov eax, $$16 205 __asm mov eax, SIZE _bar 206 // CHECK: mov eax, $$2 207 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 208 } 209 210 void t21() { 211 __asm { 212 __asm push ebx 213 __asm mov ebx, 0x07 214 __asm pop ebx 215 } 216 // CHECK: t21 217 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$0x07\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 218 } 219 220 extern void t22_helper(int x); 221 void t22() { 222 int x = 0; 223 __asm { 224 __asm push ebx 225 __asm mov ebx, esp 226 } 227 t22_helper(x); 228 __asm { 229 __asm mov esp, ebx 230 __asm pop ebx 231 } 232 // CHECK: t22 233 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, esp", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 234 // CHECK: call void @t22_helper 235 // CHECK: call void asm sideeffect inteldialect "mov esp, ebx\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 236 } 237 238 void t23() { 239 __asm { 240 the_label: 241 } 242 // CHECK: t23 243 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.0__the_label:", "~{dirflag},~{fpsr},~{flags}"() 244 } 245 246 void t24_helper(void) {} 247 void t24() { 248 __asm call t24_helper 249 // CHECK: t24 250 // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void ()* @t24_helper) 251 } 252 253 void t25() { 254 // CHECK: t25 255 __asm mov eax, 0ffffffffh 256 // CHECK: mov eax, $$4294967295 257 __asm mov eax, 0fh 258 // CHECK: mov eax, $$15 259 __asm mov eax, 0a2h 260 // CHECK: mov eax, $$162 261 __asm mov eax, 0xa2h 262 // CHECK: mov eax, $$0xa2h 263 __asm mov eax, 0xa2 264 // CHECK: mov eax, $$0xa2 265 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 266 } 267 268 void t26() { 269 // CHECK: t26 270 __asm pushad 271 // CHECK: pushad 272 __asm mov eax, 0 273 // CHECK: mov eax, $$0 274 __asm __emit 0fh 275 // CHECK: .byte 0fh 276 __asm __emit 0a2h 277 // CHECK: .byte 0a2h 278 __asm __EMIT 0a2h 279 // CHECK: .byte 0a2h 280 __asm popad 281 // CHECK: popad 282 // CHECK: "~{eax},~{ebp},~{ebx},~{ecx},~{edi},~{edx},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"() 283 } 284 285 void t27() { 286 __asm mov eax, fs:[0h] 287 // CHECK: t27 288 // CHECK: call void asm sideeffect inteldialect "mov eax, fs:[$$0h]", "~{eax},~{dirflag},~{fpsr},~{flags}"() 289 } 290 291 void t28() { 292 // CHECK: t28 293 __asm align 8 294 // CHECK: .align 3 295 __asm align 16; 296 // CHECK: .align 4 297 __asm align 128; 298 // CHECK: .align 7 299 __asm ALIGN 256; 300 // CHECK: .align 8 301 // CHECK: "~{dirflag},~{fpsr},~{flags}"() 302 } 303 304 void t29() { 305 // CHECK: t29 306 int arr[2] = {0, 0}; 307 int olen = 0, osize = 0, otype = 0; 308 __asm mov olen, LENGTH arr 309 // CHECK: mov dword ptr $0, $$2 310 __asm mov osize, SIZE arr 311 // CHECK: mov dword ptr $1, $$8 312 __asm mov otype, TYPE arr 313 // CHECK: mov dword ptr $2, $$4 314 // CHECK: "=*m,=*m,=*m,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 315 } 316 317 int results[2] = {13, 37}; 318 int *t30() 319 // CHECK: t30 320 { 321 int *res; 322 __asm lea edi, results 323 // CHECK: lea edi, dword ptr $2 324 __asm mov res, edi 325 // CHECK: mov dword ptr $0, edi 326 return res; 327 // CHECK: "=*m,={eax},*m,~{edi},~{dirflag},~{fpsr},~{flags}"(i32** %{{.*}}, [2 x i32]* @{{.*}}) 328 } 329 330 void t31() { 331 // CHECK: t31 332 __asm pushad 333 // CHECK: pushad 334 __asm popad 335 // CHECK: popad 336 // CHECK: "~{eax},~{ebp},~{ebx},~{ecx},~{edi},~{edx},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"() 337 } 338 339 void t32() { 340 // CHECK: t32 341 int i; 342 __asm mov eax, i 343 // CHECK: mov eax, dword ptr $0 344 __asm mov eax, dword ptr i 345 // CHECK: mov eax, dword ptr $1 346 __asm mov ax, word ptr i 347 // CHECK: mov ax, word ptr $2 348 __asm mov al, byte ptr i 349 // CHECK: mov al, byte ptr $3 350 // CHECK: "*m,*m,*m,*m,~{al},~{ax},~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 351 } 352 353 void t33() { 354 // CHECK: t33 355 int i; 356 __asm mov eax, [i] 357 // CHECK: mov eax, dword ptr $0 358 __asm mov eax, dword ptr [i] 359 // CHECK: mov eax, dword ptr $1 360 __asm mov ax, word ptr [i] 361 // CHECK: mov ax, word ptr $2 362 __asm mov al, byte ptr [i] 363 // CHECK: mov al, byte ptr $3 364 // CHECK: "*m,*m,*m,*m,~{al},~{ax},~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 365 } 366 367 void t34() { 368 // CHECK: t34 369 __asm prefetchnta 64[eax] 370 // CHECK: prefetchnta $$64[eax] 371 __asm mov eax, dword ptr 4[eax] 372 // CHECK: mov eax, dword ptr $$4[eax] 373 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 374 } 375 376 void t35() { 377 // CHECK: t35 378 __asm prefetchnta [eax + (200*64)] 379 // CHECK: prefetchnta [eax + ($$200*$$64)] 380 __asm mov eax, dword ptr [eax + (200*64)] 381 // CHECK: mov eax, dword ptr [eax + ($$200*$$64)] 382 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 383 } 384 385 void t36() { 386 // CHECK: t36 387 int arr[4]; 388 // Work around PR20368: These should be single line blocks 389 __asm { mov eax, 4[arr] } 390 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 391 __asm { mov eax, 4[arr + 4] } 392 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 393 __asm { mov eax, 8[arr + 4 + 32*2 - 4] } 394 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 395 __asm { mov eax, 12[4 + arr] } 396 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 397 __asm { mov eax, 4[4 + arr + 4] } 398 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 399 __asm { mov eax, 4[64 + arr + (2*32)] } 400 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 401 __asm { mov eax, 4[64 + arr - 2*32] } 402 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 403 __asm { mov eax, [arr + 4] } 404 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 405 __asm { mov eax, [arr + 4 + 32*2 - 4] } 406 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 407 __asm { mov eax, [4 + arr] } 408 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 409 __asm { mov eax, [4 + arr + 4] } 410 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 411 __asm { mov eax, [64 + arr + (2*32)] } 412 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 413 __asm { mov eax, [64 + arr - 2*32] } 414 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 415 } 416 417 void t37() { 418 // CHECK: t37 419 __asm mov eax, 4 + 8 420 // CHECK: mov eax, $$12 421 __asm mov eax, 4 + 8 * 16 422 // CHECK: mov eax, $$132 423 __asm mov eax, -4 + 8 * 16 424 // CHECK: mov eax, $$124 425 __asm mov eax, (4 + 4) * 16 426 // CHECK: mov eax, $$128 427 __asm mov eax, 4 + 8 * -16 428 // CHECK: mov eax, $$4294967172 429 __asm mov eax, 4 + 16 / -8 430 // CHECK: mov eax, $$2 431 __asm mov eax, (16 + 16) / -8 432 // CHECK: mov eax, $$4294967292 433 __asm mov eax, ~15 434 // CHECK: mov eax, $$4294967280 435 __asm mov eax, 6 ^ 3 436 // CHECK: mov eax, $$5 437 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 438 } 439 440 void t38() { 441 // CHECK: t38 442 int arr[4]; 443 // Work around PR20368: These should be single line blocks 444 __asm { mov eax, 4+4[arr] } 445 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 446 __asm { mov eax, (4+4)[arr + 4] } 447 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 448 __asm { mov eax, 8*2[arr + 4 + 32*2 - 4] } 449 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$80$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 450 __asm { mov eax, 12+20[4 + arr] } 451 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$36$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 452 __asm { mov eax, 4*16+4[4 + arr + 4] } 453 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$76$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 454 __asm { mov eax, 4*4[64 + arr + (2*32)] } 455 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$144$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 456 __asm { mov eax, 4*(4-2)[64 + arr - 2*32] } 457 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 458 __asm { mov eax, 32*(4-2)[arr - 2*32] } 459 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$0$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 460 } 461 462 void cpuid() { 463 __asm cpuid 464 // CHECK-LABEL: define void @cpuid 465 // CHECK: call void asm sideeffect inteldialect "cpuid", "~{eax},~{ebx},~{ecx},~{edx},~{dirflag},~{fpsr},~{flags}"() 466 } 467 468 typedef struct { 469 int a; 470 int b; 471 } A; 472 473 typedef struct { 474 int b1; 475 A b2; 476 } B; 477 478 typedef struct { 479 int c1; 480 A c2; 481 int c3; 482 B c4; 483 } C; 484 485 void t39() { 486 // CHECK-LABEL: define void @t39 487 __asm mov eax, [eax].A.b 488 // CHECK: mov eax, [eax].4 489 __asm mov eax, [eax] A.b 490 // CHECK: mov eax, [eax] .4 491 __asm mov eax, fs:[0] A.b 492 // CHECK: mov eax, fs:[$$0] .4 493 __asm mov eax, [eax].B.b2.a 494 // CHECK: mov eax, [eax].4 495 __asm mov eax, [eax] B.b2.b 496 // CHECK: mov eax, [eax] .8 497 __asm mov eax, fs:[0] C.c2.b 498 // CHECK: mov eax, fs:[$$0] .8 499 __asm mov eax, [eax]C.c4.b2.b 500 // CHECK: mov eax, [eax].24 501 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 502 } 503 504 void t40(float a) { 505 // CHECK-LABEL: define void @t40 506 int i; 507 __asm fld a 508 // CHECK: fld dword ptr $1 509 __asm fistp i 510 // CHECK: fistp dword ptr $0 511 // CHECK: "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, float* %{{.*}}) 512 } 513 514 void t41(unsigned short a) { 515 // CHECK-LABEL: define void @t41(i16 zeroext %a) 516 __asm mov cs, a; 517 // CHECK: mov cs, word ptr $0 518 __asm mov ds, a; 519 // CHECK: mov ds, word ptr $1 520 __asm mov es, a; 521 // CHECK: mov es, word ptr $2 522 __asm mov fs, a; 523 // CHECK: mov fs, word ptr $3 524 __asm mov gs, a; 525 // CHECK: mov gs, word ptr $4 526 __asm mov ss, a; 527 // CHECK: mov ss, word ptr $5 528 // CHECK: "*m,*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"(i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}) 529 } 530 531 void t42() { 532 // CHECK-LABEL: define void @t42 533 int flags; 534 __asm mov flags, eax 535 // CHECK: mov dword ptr $0, eax 536 // CHECK: "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %flags) 537 } 538 539 void call_clobber() { 540 __asm call t41 541 // CHECK-LABEL: define void @call_clobber 542 // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void (i16)* @t41) 543 } 544 545 void xgetbv() { 546 __asm xgetbv 547 } 548 // CHECK-LABEL: define void @xgetbv() 549 // CHECK: call void asm sideeffect inteldialect "xgetbv", "~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"() 550 551 void label1() { 552 __asm { 553 label: 554 jmp label 555 } 556 // CHECK-LABEL: define void @label1() 557 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.1__label:\0A\09jmp {{.*}}__MSASMLABEL_.1__label", "~{dirflag},~{fpsr},~{flags}"() [[ATTR1:#[0-9]+]] 558 } 559 560 void label2() { 561 __asm { 562 jmp label 563 label: 564 } 565 // CHECK-LABEL: define void @label2 566 // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.2__label\0A\09{{.*}}__MSASMLABEL_.2__label:", "~{dirflag},~{fpsr},~{flags}"() 567 } 568 569 void label3() { 570 __asm { 571 label: 572 mov eax, label 573 } 574 // CHECK-LABEL: define void @label3 575 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.3__label:\0A\09mov eax, {{.*}}__MSASMLABEL_.3__label", "~{eax},~{dirflag},~{fpsr},~{flags}"() 576 } 577 578 void label4() { 579 __asm { 580 label: 581 mov eax, [label] 582 } 583 // CHECK-LABEL: define void @label4 584 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.4__label:\0A\09mov eax, {{.*}}__MSASMLABEL_.4__label", "~{eax},~{dirflag},~{fpsr},~{flags}"() 585 } 586 587 typedef union _LARGE_INTEGER { 588 struct { 589 unsigned int LowPart; 590 unsigned int HighPart; 591 }; 592 struct { 593 unsigned int LowPart; 594 unsigned int HighPart; 595 } u; 596 unsigned long long QuadPart; 597 } LARGE_INTEGER, *PLARGE_INTEGER; 598 599 int test_indirect_field(LARGE_INTEGER LargeInteger) { 600 __asm mov eax, LargeInteger.LowPart 601 } 602 // CHECK-LABEL: define i32 @test_indirect_field( 603 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $1", 604 605 // MS ASM containing labels must not be duplicated (PR23715). 606 // CHECK: attributes [[ATTR1]] = { {{.*}}noduplicate{{.*}} } 607
