1 ; RUN: opt -S -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -cost-model -analyze < %s | FileCheck %s -check-prefix=AVX2 2 3 4 ; AVX2-LABEL: test1 5 ; AVX2: Found an estimated cost of 4 {{.*}}.masked 6 define <2 x double> @test1(<2 x i64> %trigger, <2 x double>* %addr, <2 x double> %dst) { 7 %mask = icmp eq <2 x i64> %trigger, zeroinitializer 8 %res = call <2 x double> @llvm.masked.load.v2f64(<2 x double>* %addr, i32 4, <2 x i1>%mask, <2 x double>%dst) 9 ret <2 x double> %res 10 } 11 12 ; AVX2-LABEL: test2 13 ; AVX2: Found an estimated cost of 4 {{.*}}.masked 14 define <4 x i32> @test2(<4 x i32> %trigger, <4 x i32>* %addr, <4 x i32> %dst) { 15 %mask = icmp eq <4 x i32> %trigger, zeroinitializer 16 %res = call <4 x i32> @llvm.masked.load.v4i32(<4 x i32>* %addr, i32 4, <4 x i1>%mask, <4 x i32>%dst) 17 ret <4 x i32> %res 18 } 19 20 ; AVX2-LABEL: test3 21 ; AVX2: Found an estimated cost of 4 {{.*}}.masked 22 define void @test3(<4 x i32> %trigger, <4 x i32>* %addr, <4 x i32> %val) { 23 %mask = icmp eq <4 x i32> %trigger, zeroinitializer 24 call void @llvm.masked.store.v4i32(<4 x i32>%val, <4 x i32>* %addr, i32 4, <4 x i1>%mask) 25 ret void 26 } 27 28 ; AVX2-LABEL: test4 29 ; AVX2: Found an estimated cost of 4 {{.*}}.masked 30 define <8 x float> @test4(<8 x i32> %trigger, <8 x float>* %addr, <8 x float> %dst) { 31 %mask = icmp eq <8 x i32> %trigger, zeroinitializer 32 %res = call <8 x float> @llvm.masked.load.v8f32(<8 x float>* %addr, i32 4, <8 x i1>%mask, <8 x float>%dst) 33 ret <8 x float> %res 34 } 35 36 ; AVX2-LABEL: test5 37 ; AVX2: Found an estimated cost of 5 {{.*}}.masked 38 define void @test5(<2 x i32> %trigger, <2 x float>* %addr, <2 x float> %val) { 39 %mask = icmp eq <2 x i32> %trigger, zeroinitializer 40 call void @llvm.masked.store.v2f32(<2 x float>%val, <2 x float>* %addr, i32 4, <2 x i1>%mask) 41 ret void 42 } 43 44 ; AVX2-LABEL: test6 45 ; AVX2: Found an estimated cost of 6 {{.*}}.masked 46 define void @test6(<2 x i32> %trigger, <2 x i32>* %addr, <2 x i32> %val) { 47 %mask = icmp eq <2 x i32> %trigger, zeroinitializer 48 call void @llvm.masked.store.v2i32(<2 x i32>%val, <2 x i32>* %addr, i32 4, <2 x i1>%mask) 49 ret void 50 } 51 52 ; AVX2-LABEL: test7 53 ; AVX2: Found an estimated cost of 5 {{.*}}.masked 54 define <2 x float> @test7(<2 x i32> %trigger, <2 x float>* %addr, <2 x float> %dst) { 55 %mask = icmp eq <2 x i32> %trigger, zeroinitializer 56 %res = call <2 x float> @llvm.masked.load.v2f32(<2 x float>* %addr, i32 4, <2 x i1>%mask, <2 x float>%dst) 57 ret <2 x float> %res 58 } 59 60 ; AVX2-LABEL: test8 61 ; AVX2: Found an estimated cost of 6 {{.*}}.masked 62 define <2 x i32> @test8(<2 x i32> %trigger, <2 x i32>* %addr, <2 x i32> %dst) { 63 %mask = icmp eq <2 x i32> %trigger, zeroinitializer 64 %res = call <2 x i32> @llvm.masked.load.v2i32(<2 x i32>* %addr, i32 4, <2 x i1>%mask, <2 x i32>%dst) 65 ret <2 x i32> %res 66 } 67 68 69 declare <16 x i32> @llvm.masked.load.v16i32(<16 x i32>*, i32, <16 x i1>, <16 x i32>) 70 declare <4 x i32> @llvm.masked.load.v4i32(<4 x i32>*, i32, <4 x i1>, <4 x i32>) 71 declare <2 x i32> @llvm.masked.load.v2i32(<2 x i32>*, i32, <2 x i1>, <2 x i32>) 72 declare void @llvm.masked.store.v16i32(<16 x i32>, <16 x i32>*, i32, <16 x i1>) 73 declare void @llvm.masked.store.v8i32(<8 x i32>, <8 x i32>*, i32, <8 x i1>) 74 declare void @llvm.masked.store.v4i32(<4 x i32>, <4 x i32>*, i32, <4 x i1>) 75 declare void @llvm.masked.store.v2f32(<2 x float>, <2 x float>*, i32, <2 x i1>) 76 declare void @llvm.masked.store.v2i32(<2 x i32>, <2 x i32>*, i32, <2 x i1>) 77 declare void @llvm.masked.store.v16f32(<16 x float>, <16 x float>*, i32, <16 x i1>) 78 declare void @llvm.masked.store.v16f32p(<16 x float>*, <16 x float>**, i32, <16 x i1>) 79 declare <16 x float> @llvm.masked.load.v16f32(<16 x float>*, i32, <16 x i1>, <16 x float>) 80 declare <8 x float> @llvm.masked.load.v8f32(<8 x float>*, i32, <8 x i1>, <8 x float>) 81 declare <4 x float> @llvm.masked.load.v4f32(<4 x float>*, i32, <4 x i1>, <4 x float>) 82 declare <2 x float> @llvm.masked.load.v2f32(<2 x float>*, i32, <2 x i1>, <2 x float>) 83 declare <8 x double> @llvm.masked.load.v8f64(<8 x double>*, i32, <8 x i1>, <8 x double>) 84 declare <4 x double> @llvm.masked.load.v4f64(<4 x double>*, i32, <4 x i1>, <4 x double>) 85 declare <2 x double> @llvm.masked.load.v2f64(<2 x double>*, i32, <2 x i1>, <2 x double>) 86 declare void @llvm.masked.store.v8f64(<8 x double>, <8 x double>*, i32, <8 x i1>) 87 declare void @llvm.masked.store.v2f64(<2 x double>, <2 x double>*, i32, <2 x i1>) 88 declare void @llvm.masked.store.v2i64(<2 x i64>, <2 x i64>*, i32, <2 x i1>) 89 90
