1 ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -o - < %s | FileCheck %s 2 ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=static -o - < %s | FileCheck --check-prefix=CHECK-STATIC %s 3 ; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s 4 5 declare extern_weak i32 @var() 6 7 define i32()* @foo() { 8 ; The usual ADRP/ADD pair can't be used for a weak reference because it must 9 ; evaluate to 0 if the symbol is undefined. We use a GOT entry for PIC 10 ; otherwise a litpool entry. 11 ret i32()* @var 12 13 ; CHECK: adrp x[[VAR:[0-9]+]], :got:var 14 ; CHECK: ldr x0, [x[[VAR]], :got_lo12:var] 15 16 ; CHECK-STATIC: .LCPI0_0: 17 ; CHECK-STATIC-NEXT: .xword var 18 ; CHECK-STATIC: adrp x[[VAR:[0-9]+]], .LCPI0_0 19 ; CHECK-STATIC: ldr x0, [x[[VAR]], :lo12:.LCPI0_0] 20 21 ; In the large model, the usual relocations are absolute and can 22 ; materialise 0. 23 ; CHECK-LARGE: movz x0, #:abs_g3:var 24 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var 25 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var 26 ; CHECK-LARGE: movk x0, #:abs_g0_nc:var 27 } 28 29 30 @arr_var = extern_weak global [10 x i32] 31 32 define i32* @bar() { 33 %addr = getelementptr [10 x i32], [10 x i32]* @arr_var, i32 0, i32 5 34 ; CHECK: adrp x[[ARR_VAR_HI:[0-9]+]], :got:arr_var 35 ; CHECK: ldr [[ARR_VAR:x[0-9]+]], [x[[ARR_VAR_HI]], :got_lo12:arr_var] 36 ; CHECK: add x0, [[ARR_VAR]], #20 37 ret i32* %addr 38 39 ; CHECK-STATIC: .LCPI1_0: 40 ; CHECK-STATIC-NEXT: .xword arr_var 41 ; CHECK-STATIC: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, :lo12:.LCPI1_0] 42 ; CHECK-STATIC: add x0, [[BASE]], #20 43 44 ; In the large model, the usual relocations are absolute and can 45 ; materialise 0. 46 ; CHECK-LARGE: movz [[ARR_VAR:x[0-9]+]], #:abs_g3:arr_var 47 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g2_nc:arr_var 48 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g1_nc:arr_var 49 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g0_nc:arr_var 50 } 51 52 @defined_weak_var = internal unnamed_addr global i32 0 53 54 define i32* @wibble() { 55 ret i32* @defined_weak_var 56 ; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var 57 ; CHECK: add x0, [[BASE]], :lo12:defined_weak_var 58 59 ; CHECK-STATIC: adrp [[BASE:x[0-9]+]], defined_weak_var 60 ; CHECK-STATIC: add x0, [[BASE]], :lo12:defined_weak_var 61 62 ; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var 63 ; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var 64 ; CHECK-LARGE: movk x0, #:abs_g1_nc:defined_weak_var 65 ; CHECK-LARGE: movk x0, #:abs_g0_nc:defined_weak_var 66 } 67
