1 ; This tests that MC/asm header conversion is smooth and that the 2 ; build attributes are correct 3 4 ; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE 5 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6 6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST 7 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 8 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 9 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 10 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 11 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 12 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S 13 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST 14 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 15 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M 16 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST 17 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 18 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7 19 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 20 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST 21 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8 22 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST 23 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 24 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8 25 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 26 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8 27 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON 28 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON 29 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO 30 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT 31 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST 32 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 33 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON 34 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU 35 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST 36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 37 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST 38 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD 39 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST 40 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 41 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT 42 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 43 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST 44 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU 45 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST 46 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 47 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15 48 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST 49 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 50 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT 51 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST 52 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU 53 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST 54 55 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16 56 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16 57 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD 58 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16 59 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16 60 61 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 62 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0 63 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST 64 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 65 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS 66 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST 67 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 68 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1 69 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST 70 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 71 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000 72 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST 73 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 74 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 75 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST 76 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 77 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 78 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST 79 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 80 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT 81 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST 82 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD 83 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST 84 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 85 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT 86 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST 87 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE 88 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST 89 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE 90 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 91 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 92 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F 93 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 94 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST 95 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 96 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 97 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST 98 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 99 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35 100 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST 101 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 102 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 103 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST 104 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 105 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 106 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST 107 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 108 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 109 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST 110 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 111 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A 112 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST 113 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 114 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK 115 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST 116 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU 117 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST 118 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 119 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 120 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST 121 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 122 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC 123 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER 124 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER 125 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER 126 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER 127 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE 128 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE 129 130 ; ARMv8.1a (AArch32) 131 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 132 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 133 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 134 ; ARMv8a (AArch32) 135 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 136 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 137 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 138 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 139 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 140 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 141 ; ARMv7a 142 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 143 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 144 ; ARMv7r 145 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 146 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 147 ; ARMv7m 148 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 149 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 150 ; ARMv6 151 ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 152 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 153 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 154 ; ARMv6k 155 ; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 156 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 157 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 158 ; ARMv6m 159 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 160 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN 161 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 162 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 163 ; ARMv5 164 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN 165 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 166 167 ; XSCALE: .eabi_attribute 6, 5 168 ; XSCALE: .eabi_attribute 8, 1 169 ; XSCALE: .eabi_attribute 9, 1 170 171 ; DYN-ROUNDING: .eabi_attribute 19, 1 172 173 ; V6: .eabi_attribute 6, 6 174 ; V6: .eabi_attribute 8, 1 175 ;; We assume round-to-nearest by default (matches GCC) 176 ; V6-NOT: .eabi_attribute 19 177 ;; The default choice made by llc is for a V6 CPU without an FPU. 178 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 179 ;; software floating-point support. The choice is not important for targets without 180 ;; FPU support! 181 ; V6: .eabi_attribute 20, 1 182 ; V6: .eabi_attribute 21, 1 183 ; V6-NOT: .eabi_attribute 22 184 ; V6: .eabi_attribute 23, 3 185 ; V6: .eabi_attribute 24, 1 186 ; V6: .eabi_attribute 25, 1 187 ; V6-NOT: .eabi_attribute 27 188 ; V6-NOT: .eabi_attribute 28 189 ; V6-NOT: .eabi_attribute 36 190 ; V6: .eabi_attribute 38, 1 191 ; V6-NOT: .eabi_attribute 42 192 ; V6-NOT: .eabi_attribute 44 193 ; V6-NOT: .eabi_attribute 68 194 195 ; V6-FAST-NOT: .eabi_attribute 19 196 ;; Despite the V6 CPU having no FPU by default, we chose to flush to 197 ;; positive zero here. There's no hardware support doing this, but the 198 ;; fast maths software library might. 199 ; V6-FAST-NOT: .eabi_attribute 20 200 ; V6-FAST-NOT: .eabi_attribute 21 201 ; V6-FAST-NOT: .eabi_attribute 22 202 ; V6-FAST: .eabi_attribute 23, 1 203 204 ;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for 205 ;; V6-M, however we don't model the OS extension so this is fine. 206 ; V6M: .eabi_attribute 6, 12 207 ; V6M-NOT: .eabi_attribute 7 208 ; V6M: .eabi_attribute 8, 0 209 ; V6M: .eabi_attribute 9, 1 210 ; V6M-NOT: .eabi_attribute 19 211 ;; The default choice made by llc is for a V6M CPU without an FPU. 212 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 213 ;; software floating-point support. The choice is not important for targets without 214 ;; FPU support! 215 ; V6M: .eabi_attribute 20, 1 216 ; V6M: .eabi_attribute 21, 1 217 ; V6M-NOT: .eabi_attribute 22 218 ; V6M: .eabi_attribute 23, 3 219 ; V6M: .eabi_attribute 24, 1 220 ; V6M: .eabi_attribute 25, 1 221 ; V6M-NOT: .eabi_attribute 27 222 ; V6M-NOT: .eabi_attribute 28 223 ; V6M-NOT: .eabi_attribute 36 224 ; V6M: .eabi_attribute 38, 1 225 ; V6M-NOT: .eabi_attribute 42 226 ; V6M-NOT: .eabi_attribute 44 227 ; V6M-NOT: .eabi_attribute 68 228 229 ; V6M-FAST-NOT: .eabi_attribute 19 230 ;; Despite the V6M CPU having no FPU by default, we chose to flush to 231 ;; positive zero here. There's no hardware support doing this, but the 232 ;; fast maths software library might. 233 ; V6M-FAST-NOT: .eabi_attribute 20 234 ; V6M-FAST-NOT: .eabi_attribute 21 235 ; V6M-FAST-NOT: .eabi_attribute 22 236 ; V6M-FAST: .eabi_attribute 23, 1 237 238 ; ARM1156T2F-S: .cpu arm1156t2f-s 239 ; ARM1156T2F-S: .eabi_attribute 6, 8 240 ; ARM1156T2F-S: .eabi_attribute 8, 1 241 ; ARM1156T2F-S: .eabi_attribute 9, 2 242 ; ARM1156T2F-S: .fpu vfpv2 243 ; ARM1156T2F-S-NOT: .eabi_attribute 19 244 ;; We default to IEEE 754 compliance 245 ; ARM1156T2F-S: .eabi_attribute 20, 1 246 ; ARM1156T2F-S: .eabi_attribute 21, 1 247 ; ARM1156T2F-S-NOT: .eabi_attribute 22 248 ; ARM1156T2F-S: .eabi_attribute 23, 3 249 ; ARM1156T2F-S: .eabi_attribute 24, 1 250 ; ARM1156T2F-S: .eabi_attribute 25, 1 251 ; ARM1156T2F-S-NOT: .eabi_attribute 27 252 ; ARM1156T2F-S-NOT: .eabi_attribute 28 253 ; ARM1156T2F-S-NOT: .eabi_attribute 36 254 ; ARM1156T2F-S: .eabi_attribute 38, 1 255 ; ARM1156T2F-S-NOT: .eabi_attribute 42 256 ; ARM1156T2F-S-NOT: .eabi_attribute 44 257 ; ARM1156T2F-S-NOT: .eabi_attribute 68 258 259 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19 260 ;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally 261 ;; valid for this core, it's an implementation defined question as to which of 0 and 2 you 262 ;; select. LLVM historically picks 0. 263 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20 264 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21 265 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22 266 ; ARM1156T2F-S-FAST: .eabi_attribute 23, 1 267 268 ; V7M: .eabi_attribute 6, 10 269 ; V7M: .eabi_attribute 7, 77 270 ; V7M: .eabi_attribute 8, 0 271 ; V7M: .eabi_attribute 9, 2 272 ; V7M-NOT: .eabi_attribute 19 273 ;; The default choice made by llc is for a V7M CPU without an FPU. 274 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 275 ;; software floating-point support. The choice is not important for targets without 276 ;; FPU support! 277 ; V7M: .eabi_attribute 20, 1 278 ; V7M: .eabi_attribute 21, 1 279 ; V7M-NOT: .eabi_attribute 22 280 ; V7M: .eabi_attribute 23, 3 281 ; V7M: .eabi_attribute 24, 1 282 ; V7M: .eabi_attribute 25, 1 283 ; V7M-NOT: .eabi_attribute 27 284 ; V7M-NOT: .eabi_attribute 28 285 ; V7M-NOT: .eabi_attribute 36 286 ; V7M: .eabi_attribute 38, 1 287 ; V7M-NOT: .eabi_attribute 42 288 ; V7M-NOT: .eabi_attribute 44 289 ; V7M-NOT: .eabi_attribute 68 290 291 ; V7M-FAST-NOT: .eabi_attribute 19 292 ;; Despite the V7M CPU having no FPU by default, we chose to flush 293 ;; preserving sign. This matches what the hardware would do in the 294 ;; architecture revision were to exist on the current target. 295 ; V7M-FAST: .eabi_attribute 20, 2 296 ; V7M-FAST-NOT: .eabi_attribute 21 297 ; V7M-FAST-NOT: .eabi_attribute 22 298 ; V7M-FAST: .eabi_attribute 23, 1 299 300 ; V7: .syntax unified 301 ; V7: .eabi_attribute 6, 10 302 ; V7-NOT: .eabi_attribute 19 303 ;; In safe-maths mode we default to an IEEE 754 compliant choice. 304 ; V7: .eabi_attribute 20, 1 305 ; V7: .eabi_attribute 21, 1 306 ; V7-NOT: .eabi_attribute 22 307 ; V7: .eabi_attribute 23, 3 308 ; V7: .eabi_attribute 24, 1 309 ; V7: .eabi_attribute 25, 1 310 ; V7-NOT: .eabi_attribute 27 311 ; V7-NOT: .eabi_attribute 28 312 ; V7-NOT: .eabi_attribute 36 313 ; V7: .eabi_attribute 38, 1 314 ; V7-NOT: .eabi_attribute 42 315 ; V7-NOT: .eabi_attribute 44 316 ; V7-NOT: .eabi_attribute 68 317 318 ; V7-FAST-NOT: .eabi_attribute 19 319 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes 320 ;; denormals to zero preserving the sign. 321 ; V7-FAST: .eabi_attribute 20, 2 322 ; V7-FAST-NOT: .eabi_attribute 21 323 ; V7-FAST-NOT: .eabi_attribute 22 324 ; V7-FAST: .eabi_attribute 23, 1 325 326 ; V8: .syntax unified 327 ; V8: .eabi_attribute 67, "2.09" 328 ; V8: .eabi_attribute 6, 14 329 ; V8-NOT: .eabi_attribute 19 330 ; V8: .eabi_attribute 20, 1 331 ; V8: .eabi_attribute 21, 1 332 ; V8-NOT: .eabi_attribute 22 333 ; V8: .eabi_attribute 23, 3 334 ; V8-NOT: .eabi_attribute 44 335 336 ; V8-FAST-NOT: .eabi_attribute 19 337 ;; The default does have an FPU, and for V8-A, it flushes preserving sign. 338 ; V8-FAST: .eabi_attribute 20, 2 339 ; V8-FAST-NOT: .eabi_attribute 21 340 ; V8-FAST-NOT: .eabi_attribute 22 341 ; V8-FAST: .eabi_attribute 23, 1 342 343 ; Vt8: .syntax unified 344 ; Vt8: .eabi_attribute 6, 14 345 ; Vt8-NOT: .eabi_attribute 19 346 ; Vt8: .eabi_attribute 20, 1 347 ; Vt8: .eabi_attribute 21, 1 348 ; Vt8-NOT: .eabi_attribute 22 349 ; Vt8: .eabi_attribute 23, 3 350 351 ; V8-FPARMv8: .syntax unified 352 ; V8-FPARMv8: .eabi_attribute 6, 14 353 ; V8-FPARMv8: .fpu fp-armv8 354 355 ; V8-NEON: .syntax unified 356 ; V8-NEON: .eabi_attribute 6, 14 357 ; V8-NEON: .fpu neon 358 ; V8-NEON: .eabi_attribute 12, 3 359 360 ; V8-FPARMv8-NEON: .syntax unified 361 ; V8-FPARMv8-NEON: .eabi_attribute 6, 14 362 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8 363 ; V8-FPARMv8-NEON: .eabi_attribute 12, 3 364 365 ; V8-FPARMv8-NEON-CRYPTO: .syntax unified 366 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14 367 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8 368 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3 369 370 ; Tag_CPU_unaligned_access 371 ; NO-STRICT-ALIGN: .eabi_attribute 34, 1 372 ; STRICT-ALIGN: .eabi_attribute 34, 0 373 374 ; Tag_CPU_arch 'ARMv7' 375 ; CORTEX-A7-CHECK: .eabi_attribute 6, 10 376 ; CORTEX-A7-NOFPU: .eabi_attribute 6, 10 377 378 ; CORTEX-A7-FPUV4: .eabi_attribute 6, 10 379 380 ; Tag_CPU_arch_profile 'A' 381 ; CORTEX-A7-CHECK: .eabi_attribute 7, 65 382 ; CORTEX-A7-NOFPU: .eabi_attribute 7, 65 383 ; CORTEX-A7-FPUV4: .eabi_attribute 7, 65 384 385 ; Tag_ARM_ISA_use 386 ; CORTEX-A7-CHECK: .eabi_attribute 8, 1 387 ; CORTEX-A7-NOFPU: .eabi_attribute 8, 1 388 ; CORTEX-A7-FPUV4: .eabi_attribute 8, 1 389 390 ; Tag_THUMB_ISA_use 391 ; CORTEX-A7-CHECK: .eabi_attribute 9, 2 392 ; CORTEX-A7-NOFPU: .eabi_attribute 9, 2 393 ; CORTEX-A7-FPUV4: .eabi_attribute 9, 2 394 395 ; CORTEX-A7-CHECK: .fpu neon-vfpv4 396 ; CORTEX-A7-NOFPU-NOT: .fpu 397 ; CORTEX-A7-FPUV4: .fpu vfpv4 398 399 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 19 400 ; Tag_ABI_FP_denormal 401 ;; We default to IEEE 754 compliance 402 ; CORTEX-A7-CHECK: .eabi_attribute 20, 1 403 ;; The A7 has VFPv3 support by default, so flush preserving sign. 404 ; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2 405 ; CORTEX-A7-NOFPU: .eabi_attribute 20, 1 406 ;; Despite there being no FPU, we chose to flush to zero preserving 407 ;; sign. This matches what the hardware would do for this architecture 408 ;; revision. 409 ; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2 410 ; CORTEX-A7-FPUV4: .eabi_attribute 20, 1 411 ;; The VFPv4 FPU flushes preserving sign. 412 ; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2 413 414 ; Tag_ABI_FP_exceptions 415 ; CORTEX-A7-CHECK: .eabi_attribute 21, 1 416 ; CORTEX-A7-NOFPU: .eabi_attribute 21, 1 417 ; CORTEX-A7-FPUV4: .eabi_attribute 21, 1 418 419 ; Tag_ABI_FP_user_exceptions 420 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 22 421 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22 422 ; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22 423 424 ; Tag_ABI_FP_number_model 425 ; CORTEX-A7-CHECK: .eabi_attribute 23, 3 426 ; CORTEX-A7-NOFPU: .eabi_attribute 23, 3 427 ; CORTEX-A7-FPUV4: .eabi_attribute 23, 3 428 429 ; Tag_ABI_align_needed 430 ; CORTEX-A7-CHECK: .eabi_attribute 24, 1 431 ; CORTEX-A7-NOFPU: .eabi_attribute 24, 1 432 ; CORTEX-A7-FPUV4: .eabi_attribute 24, 1 433 434 ; Tag_ABI_align_preserved 435 ; CORTEX-A7-CHECK: .eabi_attribute 25, 1 436 ; CORTEX-A7-NOFPU: .eabi_attribute 25, 1 437 ; CORTEX-A7-FPUV4: .eabi_attribute 25, 1 438 439 ; Tag_FP_HP_extension 440 ; CORTEX-A7-CHECK: .eabi_attribute 36, 1 441 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36 442 ; CORTEX-A7-FPUV4: .eabi_attribute 36, 1 443 444 ; Tag_FP_16bit_format 445 ; CORTEX-A7-CHECK: .eabi_attribute 38, 1 446 ; CORTEX-A7-NOFPU: .eabi_attribute 38, 1 447 ; CORTEX-A7-FPUV4: .eabi_attribute 38, 1 448 449 ; Tag_MPextension_use 450 ; CORTEX-A7-CHECK: .eabi_attribute 42, 1 451 ; CORTEX-A7-NOFPU: .eabi_attribute 42, 1 452 ; CORTEX-A7-FPUV4: .eabi_attribute 42, 1 453 454 ; Tag_DIV_use 455 ; CORTEX-A7-CHECK: .eabi_attribute 44, 2 456 ; CORTEX-A7-NOFPU: .eabi_attribute 44, 2 457 ; CORTEX-A7-FPUV4: .eabi_attribute 44, 2 458 459 ; Tag_Virtualization_use 460 ; CORTEX-A7-CHECK: .eabi_attribute 68, 3 461 ; CORTEX-A7-NOFPU: .eabi_attribute 68, 3 462 ; CORTEX-A7-FPUV4: .eabi_attribute 68, 3 463 464 ; CORTEX-A5-DEFAULT: .cpu cortex-a5 465 ; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10 466 ; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65 467 ; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1 468 ; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2 469 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4 470 ; CORTEX-A5-NOT: .eabi_attribute 19 471 ;; We default to IEEE 754 compliance 472 ; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1 473 ; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1 474 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22 475 ; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3 476 ; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1 477 ; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1 478 ; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1 479 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44 480 ; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1 481 482 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19 483 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 484 ;; is given. 485 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2 486 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21 487 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22 488 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1 489 490 ; CORTEX-A5-NONEON: .cpu cortex-a5 491 ; CORTEX-A5-NONEON: .eabi_attribute 6, 10 492 ; CORTEX-A5-NONEON: .eabi_attribute 7, 65 493 ; CORTEX-A5-NONEON: .eabi_attribute 8, 1 494 ; CORTEX-A5-NONEON: .eabi_attribute 9, 2 495 ; CORTEX-A5-NONEON: .fpu vfpv4-d16 496 ;; We default to IEEE 754 compliance 497 ; CORTEX-A5-NONEON: .eabi_attribute 20, 1 498 ; CORTEX-A5-NONEON: .eabi_attribute 21, 1 499 ; CORTEX-A5-NONEON-NOT: .eabi_attribute 22 500 ; CORTEX-A5-NONEON: .eabi_attribute 23, 3 501 ; CORTEX-A5-NONEON: .eabi_attribute 24, 1 502 ; CORTEX-A5-NONEON: .eabi_attribute 25, 1 503 ; CORTEX-A5-NONEON: .eabi_attribute 42, 1 504 ; CORTEX-A5-NONEON: .eabi_attribute 68, 1 505 506 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19 507 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 508 ;; is given. 509 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2 510 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21 511 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22 512 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1 513 514 ; CORTEX-A5-NOFPU: .cpu cortex-a5 515 ; CORTEX-A5-NOFPU: .eabi_attribute 6, 10 516 ; CORTEX-A5-NOFPU: .eabi_attribute 7, 65 517 ; CORTEX-A5-NOFPU: .eabi_attribute 8, 1 518 ; CORTEX-A5-NOFPU: .eabi_attribute 9, 2 519 ; CORTEX-A5-NOFPU-NOT: .fpu 520 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19 521 ;; We default to IEEE 754 compliance 522 ; CORTEX-A5-NOFPU: .eabi_attribute 20, 1 523 ; CORTEX-A5-NOFPU: .eabi_attribute 21, 1 524 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22 525 ; CORTEX-A5-NOFPU: .eabi_attribute 23, 3 526 ; CORTEX-A5-NOFPU: .eabi_attribute 24, 1 527 ; CORTEX-A5-NOFPU: .eabi_attribute 25, 1 528 ; CORTEX-A5-NOFPU: .eabi_attribute 42, 1 529 ; CORTEX-A5-NOFPU: .eabi_attribute 68, 1 530 531 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19 532 ;; Despite there being no FPU, we chose to flush to zero preserving 533 ;; sign. This matches what the hardware would do for this architecture 534 ;; revision. 535 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2 536 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21 537 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22 538 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1 539 540 ; CORTEX-A9-SOFT: .cpu cortex-a9 541 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10 542 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65 543 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1 544 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2 545 ; CORTEX-A9-SOFT: .fpu neon 546 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 19 547 ;; We default to IEEE 754 compliance 548 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1 549 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1 550 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 22 551 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3 552 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1 553 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1 554 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27 555 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28 556 ; CORTEX-A9-SOFT: .eabi_attribute 36, 1 557 ; CORTEX-A9-SOFT: .eabi_attribute 38, 1 558 ; CORTEX-A9-SOFT: .eabi_attribute 42, 1 559 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 44 560 ; CORTEX-A9-SOFT: .eabi_attribute 68, 1 561 562 ; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19 563 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when 564 ;; -ffast-math is specified. 565 ; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2 566 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21 567 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22 568 ; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1 569 570 ; CORTEX-A9-HARD: .cpu cortex-a9 571 ; CORTEX-A9-HARD: .eabi_attribute 6, 10 572 ; CORTEX-A9-HARD: .eabi_attribute 7, 65 573 ; CORTEX-A9-HARD: .eabi_attribute 8, 1 574 ; CORTEX-A9-HARD: .eabi_attribute 9, 2 575 ; CORTEX-A9-HARD: .fpu neon 576 ; CORTEX-A9-HARD-NOT: .eabi_attribute 19 577 ;; We default to IEEE 754 compliance 578 ; CORTEX-A9-HARD: .eabi_attribute 20, 1 579 ; CORTEX-A9-HARD: .eabi_attribute 21, 1 580 ; CORTEX-A9-HARD-NOT: .eabi_attribute 22 581 ; CORTEX-A9-HARD: .eabi_attribute 23, 3 582 ; CORTEX-A9-HARD: .eabi_attribute 24, 1 583 ; CORTEX-A9-HARD: .eabi_attribute 25, 1 584 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27 585 ; CORTEX-A9-HARD: .eabi_attribute 28, 1 586 ; CORTEX-A9-HARD: .eabi_attribute 36, 1 587 ; CORTEX-A9-HARD: .eabi_attribute 38, 1 588 ; CORTEX-A9-HARD: .eabi_attribute 42, 1 589 ; CORTEX-A9-HARD: .eabi_attribute 68, 1 590 591 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19 592 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when 593 ;; -ffast-math is specified. 594 ; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2 595 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21 596 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22 597 ; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1 598 599 ; CORTEX-A12-DEFAULT: .cpu cortex-a12 600 ; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10 601 ; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65 602 ; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1 603 ; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2 604 ; CORTEX-A12-DEFAULT: .fpu neon-vfpv4 605 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19 606 ;; We default to IEEE 754 compliance 607 ; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1 608 ; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1 609 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22 610 ; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3 611 ; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1 612 ; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1 613 ; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1 614 ; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2 615 ; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3 616 617 ; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19 618 ;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when 619 ;; -ffast-math is specified. 620 ; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2 621 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21 622 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22 623 ; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1 624 625 ; CORTEX-A12-NOFPU: .cpu cortex-a12 626 ; CORTEX-A12-NOFPU: .eabi_attribute 6, 10 627 ; CORTEX-A12-NOFPU: .eabi_attribute 7, 65 628 ; CORTEX-A12-NOFPU: .eabi_attribute 8, 1 629 ; CORTEX-A12-NOFPU: .eabi_attribute 9, 2 630 ; CORTEX-A12-NOFPU-NOT: .fpu 631 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19 632 ;; We default to IEEE 754 compliance 633 ; CORTEX-A12-NOFPU: .eabi_attribute 20, 1 634 ; CORTEX-A12-NOFPU: .eabi_attribute 21, 1 635 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22 636 ; CORTEX-A12-NOFPU: .eabi_attribute 23, 3 637 ; CORTEX-A12-NOFPU: .eabi_attribute 24, 1 638 ; CORTEX-A12-NOFPU: .eabi_attribute 25, 1 639 ; CORTEX-A12-NOFPU: .eabi_attribute 42, 1 640 ; CORTEX-A12-NOFPU: .eabi_attribute 44, 2 641 ; CORTEX-A12-NOFPU: .eabi_attribute 68, 3 642 643 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19 644 ;; Despite there being no FPU, we chose to flush to zero preserving 645 ;; sign. This matches what the hardware would do for this architecture 646 ;; revision. 647 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2 648 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21 649 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22 650 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1 651 652 ; CORTEX-A15: .cpu cortex-a15 653 ; CORTEX-A15: .eabi_attribute 6, 10 654 ; CORTEX-A15: .eabi_attribute 7, 65 655 ; CORTEX-A15: .eabi_attribute 8, 1 656 ; CORTEX-A15: .eabi_attribute 9, 2 657 ; CORTEX-A15: .fpu neon-vfpv4 658 ; CORTEX-A15-NOT: .eabi_attribute 19 659 ;; We default to IEEE 754 compliance 660 ; CORTEX-A15: .eabi_attribute 20, 1 661 ; CORTEX-A15: .eabi_attribute 21, 1 662 ; CORTEX-A15-NOT: .eabi_attribute 22 663 ; CORTEX-A15: .eabi_attribute 23, 3 664 ; CORTEX-A15: .eabi_attribute 24, 1 665 ; CORTEX-A15: .eabi_attribute 25, 1 666 ; CORTEX-A15-NOT: .eabi_attribute 27 667 ; CORTEX-A15-NOT: .eabi_attribute 28 668 ; CORTEX-A15: .eabi_attribute 36, 1 669 ; CORTEX-A15: .eabi_attribute 38, 1 670 ; CORTEX-A15: .eabi_attribute 42, 1 671 ; CORTEX-A15: .eabi_attribute 44, 2 672 ; CORTEX-A15: .eabi_attribute 68, 3 673 674 ; CORTEX-A15-FAST-NOT: .eabi_attribute 19 675 ;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when 676 ;; -ffast-math is specified. 677 ; CORTEX-A15-FAST: .eabi_attribute 20, 2 678 ; CORTEX-A15-FAST-NOT: .eabi_attribute 21 679 ; CORTEX-A15-FAST-NOT: .eabi_attribute 22 680 ; CORTEX-A15-FAST: .eabi_attribute 23, 1 681 682 ; CORTEX-A17-DEFAULT: .cpu cortex-a17 683 ; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10 684 ; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65 685 ; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1 686 ; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2 687 ; CORTEX-A17-DEFAULT: .fpu neon-vfpv4 688 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19 689 ;; We default to IEEE 754 compliance 690 ; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1 691 ; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1 692 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22 693 ; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3 694 ; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1 695 ; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1 696 ; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1 697 ; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2 698 ; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3 699 700 ; CORTEX-A17-FAST-NOT: .eabi_attribute 19 701 ;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when 702 ;; -ffast-math is specified. 703 ; CORTEX-A17-FAST: .eabi_attribute 20, 2 704 ; CORTEX-A17-FAST-NOT: .eabi_attribute 21 705 ; CORTEX-A17-FAST-NOT: .eabi_attribute 22 706 ; CORTEX-A17-FAST: .eabi_attribute 23, 1 707 708 ; CORTEX-A17-NOFPU: .cpu cortex-a17 709 ; CORTEX-A17-NOFPU: .eabi_attribute 6, 10 710 ; CORTEX-A17-NOFPU: .eabi_attribute 7, 65 711 ; CORTEX-A17-NOFPU: .eabi_attribute 8, 1 712 ; CORTEX-A17-NOFPU: .eabi_attribute 9, 2 713 ; CORTEX-A17-NOFPU-NOT: .fpu 714 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 715 ;; We default to IEEE 754 compliance 716 ; CORTEX-A17-NOFPU: .eabi_attribute 20, 1 717 ; CORTEX-A17-NOFPU: .eabi_attribute 21, 1 718 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22 719 ; CORTEX-A17-NOFPU: .eabi_attribute 23, 3 720 ; CORTEX-A17-NOFPU: .eabi_attribute 24, 1 721 ; CORTEX-A17-NOFPU: .eabi_attribute 25, 1 722 ; CORTEX-A17-NOFPU: .eabi_attribute 42, 1 723 ; CORTEX-A17-NOFPU: .eabi_attribute 44, 2 724 ; CORTEX-A17-NOFPU: .eabi_attribute 68, 3 725 726 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 727 ;; Despite there being no FPU, we chose to flush to zero preserving 728 ;; sign. This matches what the hardware would do for this architecture 729 ;; revision. 730 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2 731 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21 732 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22 733 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1 734 735 ; CORTEX-M0: .cpu cortex-m0 736 ; CORTEX-M0: .eabi_attribute 6, 12 737 ; CORTEX-M0-NOT: .eabi_attribute 7 738 ; CORTEX-M0: .eabi_attribute 8, 0 739 ; CORTEX-M0: .eabi_attribute 9, 1 740 ; CORTEX-M0-NOT: .eabi_attribute 19 741 ;; We default to IEEE 754 compliance 742 ; CORTEX-M0: .eabi_attribute 20, 1 743 ; CORTEX-M0: .eabi_attribute 21, 1 744 ; CORTEX-M0-NOT: .eabi_attribute 22 745 ; CORTEX-M0: .eabi_attribute 23, 3 746 ; CORTEX-M0: .eabi_attribute 34, 0 747 ; CORTEX-M0: .eabi_attribute 24, 1 748 ; CORTEX-M0: .eabi_attribute 25, 1 749 ; CORTEX-M0-NOT: .eabi_attribute 27 750 ; CORTEX-M0-NOT: .eabi_attribute 28 751 ; CORTEX-M0-NOT: .eabi_attribute 36 752 ; CORTEX-M0: .eabi_attribute 38, 1 753 ; CORTEX-M0-NOT: .eabi_attribute 42 754 ; CORTEX-M0-NOT: .eabi_attribute 44 755 ; CORTEX-M0-NOT: .eabi_attribute 68 756 757 ; CORTEX-M0-FAST-NOT: .eabi_attribute 19 758 ;; Despite the M0 CPU having no FPU in this scenario, we chose to 759 ;; flush to positive zero here. There's no hardware support doing 760 ;; this, but the fast maths software library might and such behaviour 761 ;; would match hardware support on this architecture revision if it 762 ;; existed. 763 ; CORTEX-M0-FAST-NOT: .eabi_attribute 20 764 ; CORTEX-M0-FAST-NOT: .eabi_attribute 21 765 ; CORTEX-M0-FAST-NOT: .eabi_attribute 22 766 ; CORTEX-M0-FAST: .eabi_attribute 23, 1 767 768 ; CORTEX-M0PLUS: .cpu cortex-m0plus 769 ; CORTEX-M0PLUS: .eabi_attribute 6, 12 770 ; CORTEX-M0PLUS-NOT: .eabi_attribute 7 771 ; CORTEX-M0PLUS: .eabi_attribute 8, 0 772 ; CORTEX-M0PLUS: .eabi_attribute 9, 1 773 ; CORTEX-M0PLUS-NOT: .eabi_attribute 19 774 ;; We default to IEEE 754 compliance 775 ; CORTEX-M0PLUS: .eabi_attribute 20, 1 776 ; CORTEX-M0PLUS: .eabi_attribute 21, 1 777 ; CORTEX-M0PLUS-NOT: .eabi_attribute 22 778 ; CORTEX-M0PLUS: .eabi_attribute 23, 3 779 ; CORTEX-M0PLUS: .eabi_attribute 24, 1 780 ; CORTEX-M0PLUS: .eabi_attribute 25, 1 781 ; CORTEX-M0PLUS-NOT: .eabi_attribute 27 782 ; CORTEX-M0PLUS-NOT: .eabi_attribute 28 783 ; CORTEX-M0PLUS-NOT: .eabi_attribute 36 784 ; CORTEX-M0PLUS: .eabi_attribute 38, 1 785 ; CORTEX-M0PLUS-NOT: .eabi_attribute 42 786 ; CORTEX-M0PLUS-NOT: .eabi_attribute 44 787 ; CORTEX-M0PLUS-NOT: .eabi_attribute 68 788 789 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 790 ;; Despite the M0+ CPU having no FPU in this scenario, we chose to 791 ;; flush to positive zero here. There's no hardware support doing 792 ;; this, but the fast maths software library might and such behaviour 793 ;; would match hardware support on this architecture revision if it 794 ;; existed. 795 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 796 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 797 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 798 ; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 799 800 ; CORTEX-M1: .cpu cortex-m1 801 ; CORTEX-M1: .eabi_attribute 6, 12 802 ; CORTEX-M1-NOT: .eabi_attribute 7 803 ; CORTEX-M1: .eabi_attribute 8, 0 804 ; CORTEX-M1: .eabi_attribute 9, 1 805 ; CORTEX-M1-NOT: .eabi_attribute 19 806 ;; We default to IEEE 754 compliance 807 ; CORTEX-M1: .eabi_attribute 20, 1 808 ; CORTEX-M1: .eabi_attribute 21, 1 809 ; CORTEX-M1-NOT: .eabi_attribute 22 810 ; CORTEX-M1: .eabi_attribute 23, 3 811 ; CORTEX-M1: .eabi_attribute 24, 1 812 ; CORTEX-M1: .eabi_attribute 25, 1 813 ; CORTEX-M1-NOT: .eabi_attribute 27 814 ; CORTEX-M1-NOT: .eabi_attribute 28 815 ; CORTEX-M1-NOT: .eabi_attribute 36 816 ; CORTEX-M1: .eabi_attribute 38, 1 817 ; CORTEX-M1-NOT: .eabi_attribute 42 818 ; CORTEX-M1-NOT: .eabi_attribute 44 819 ; CORTEX-M1-NOT: .eabi_attribute 68 820 821 ; CORTEX-M1-FAST-NOT: .eabi_attribute 19 822 ;; Despite the M1 CPU having no FPU in this scenario, we chose to 823 ;; flush to positive zero here. There's no hardware support doing 824 ;; this, but the fast maths software library might and such behaviour 825 ;; would match hardware support on this architecture revision if it 826 ;; existed. 827 ; CORTEX-M1-FAST-NOT: .eabi_attribute 20 828 ; CORTEX-M1-FAST-NOT: .eabi_attribute 21 829 ; CORTEX-M1-FAST-NOT: .eabi_attribute 22 830 ; CORTEX-M1-FAST: .eabi_attribute 23, 1 831 832 ; SC000: .cpu sc000 833 ; SC000: .eabi_attribute 6, 12 834 ; SC000-NOT: .eabi_attribute 7 835 ; SC000: .eabi_attribute 8, 0 836 ; SC000: .eabi_attribute 9, 1 837 ; SC000-NOT: .eabi_attribute 19 838 ;; We default to IEEE 754 compliance 839 ; SC000: .eabi_attribute 20, 1 840 ; SC000: .eabi_attribute 21, 1 841 ; SC000-NOT: .eabi_attribute 22 842 ; SC000: .eabi_attribute 23, 3 843 ; SC000: .eabi_attribute 24, 1 844 ; SC000: .eabi_attribute 25, 1 845 ; SC000-NOT: .eabi_attribute 27 846 ; SC000-NOT: .eabi_attribute 28 847 ; SC000-NOT: .eabi_attribute 36 848 ; SC000: .eabi_attribute 38, 1 849 ; SC000-NOT: .eabi_attribute 42 850 ; SC000-NOT: .eabi_attribute 44 851 ; SC000-NOT: .eabi_attribute 68 852 853 ; SC000-FAST-NOT: .eabi_attribute 19 854 ;; Despite the SC000 CPU having no FPU in this scenario, we chose to 855 ;; flush to positive zero here. There's no hardware support doing 856 ;; this, but the fast maths software library might and such behaviour 857 ;; would match hardware support on this architecture revision if it 858 ;; existed. 859 ; SC000-FAST-NOT: .eabi_attribute 20 860 ; SC000-FAST-NOT: .eabi_attribute 21 861 ; SC000-FAST-NOT: .eabi_attribute 22 862 ; SC000-FAST: .eabi_attribute 23, 1 863 864 ; CORTEX-M3: .cpu cortex-m3 865 ; CORTEX-M3: .eabi_attribute 6, 10 866 ; CORTEX-M3: .eabi_attribute 7, 77 867 ; CORTEX-M3: .eabi_attribute 8, 0 868 ; CORTEX-M3: .eabi_attribute 9, 2 869 ; CORTEX-M3-NOT: .eabi_attribute 19 870 ;; We default to IEEE 754 compliance 871 ; CORTEX-M3: .eabi_attribute 20, 1 872 ; CORTEX-M3: .eabi_attribute 21, 1 873 ; CORTEX-M3-NOT: .eabi_attribute 22 874 ; CORTEX-M3: .eabi_attribute 23, 3 875 ; CORTEX-M3: .eabi_attribute 24, 1 876 ; CORTEX-M3: .eabi_attribute 25, 1 877 ; CORTEX-M3-NOT: .eabi_attribute 27 878 ; CORTEX-M3-NOT: .eabi_attribute 28 879 ; CORTEX-M3-NOT: .eabi_attribute 36 880 ; CORTEX-M3: .eabi_attribute 38, 1 881 ; CORTEX-M3-NOT: .eabi_attribute 42 882 ; CORTEX-M3-NOT: .eabi_attribute 44 883 ; CORTEX-M3-NOT: .eabi_attribute 68 884 885 ; CORTEX-M3-FAST-NOT: .eabi_attribute 19 886 ;; Despite there being no FPU, we chose to flush to zero preserving 887 ;; sign. This matches what the hardware would do for this architecture 888 ;; revision. 889 ; CORTEX-M3-FAST: .eabi_attribute 20, 2 890 ; CORTEX-M3-FAST-NOT: .eabi_attribute 21 891 ; CORTEX-M3-FAST-NOT: .eabi_attribute 22 892 ; CORTEX-M3-FAST: .eabi_attribute 23, 1 893 894 ; SC300: .cpu sc300 895 ; SC300: .eabi_attribute 6, 10 896 ; SC300: .eabi_attribute 7, 77 897 ; SC300: .eabi_attribute 8, 0 898 ; SC300: .eabi_attribute 9, 2 899 ; SC300-NOT: .eabi_attribute 19 900 ;; We default to IEEE 754 compliance 901 ; SC300: .eabi_attribute 20, 1 902 ; SC300: .eabi_attribute 21, 1 903 ; SC300-NOT: .eabi_attribute 22 904 ; SC300: .eabi_attribute 23, 3 905 ; SC300: .eabi_attribute 24, 1 906 ; SC300: .eabi_attribute 25, 1 907 ; SC300-NOT: .eabi_attribute 27 908 ; SC300-NOT: .eabi_attribute 28 909 ; SC300-NOT: .eabi_attribute 36 910 ; SC300: .eabi_attribute 38, 1 911 ; SC300-NOT: .eabi_attribute 42 912 ; SC300-NOT: .eabi_attribute 44 913 ; SC300-NOT: .eabi_attribute 68 914 915 ; SC300-FAST-NOT: .eabi_attribute 19 916 ;; Despite there being no FPU, we chose to flush to zero preserving 917 ;; sign. This matches what the hardware would do for this architecture 918 ;; revision. 919 ; SC300-FAST: .eabi_attribute 20, 2 920 ; SC300-FAST-NOT: .eabi_attribute 21 921 ; SC300-FAST-NOT: .eabi_attribute 22 922 ; SC300-FAST: .eabi_attribute 23, 1 923 924 ; CORTEX-M4-SOFT: .cpu cortex-m4 925 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13 926 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77 927 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0 928 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2 929 ; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 930 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 931 ;; We default to IEEE 754 compliance 932 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1 933 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1 934 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 935 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3 936 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1 937 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1 938 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1 939 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 940 ; CORTEX-M4-SOFT: .eabi_attribute 36, 1 941 ; CORTEX-M4-SOFT: .eabi_attribute 38, 1 942 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 943 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 944 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 945 946 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 947 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when 948 ;; -ffast-math is specified. 949 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 950 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 951 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 952 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 953 954 ; CORTEX-M4-HARD: .cpu cortex-m4 955 ; CORTEX-M4-HARD: .eabi_attribute 6, 13 956 ; CORTEX-M4-HARD: .eabi_attribute 7, 77 957 ; CORTEX-M4-HARD: .eabi_attribute 8, 0 958 ; CORTEX-M4-HARD: .eabi_attribute 9, 2 959 ; CORTEX-M4-HARD: .fpu fpv4-sp-d16 960 ; CORTEX-M4-HARD-NOT: .eabi_attribute 19 961 ;; We default to IEEE 754 compliance 962 ; CORTEX-M4-HARD: .eabi_attribute 20, 1 963 ; CORTEX-M4-HARD: .eabi_attribute 21, 1 964 ; CORTEX-M4-HARD-NOT: .eabi_attribute 22 965 ; CORTEX-M4-HARD: .eabi_attribute 23, 3 966 ; CORTEX-M4-HARD: .eabi_attribute 24, 1 967 ; CORTEX-M4-HARD: .eabi_attribute 25, 1 968 ; CORTEX-M4-HARD: .eabi_attribute 27, 1 969 ; CORTEX-M4-HARD: .eabi_attribute 28, 1 970 ; CORTEX-M4-HARD: .eabi_attribute 36, 1 971 ; CORTEX-M4-HARD: .eabi_attribute 38, 1 972 ; CORTEX-M4-HARD-NOT: .eabi_attribute 42 973 ; CORTEX-M4-HARD-NOT: .eabi_attribute 44 974 ; CORTEX-M4-HARD-NOT: .eabi_attribute 68 975 976 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 977 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when 978 ;; -ffast-math is specified. 979 ; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 980 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 981 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 982 ; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 983 984 ; CORTEX-M7: .cpu cortex-m7 985 ; CORTEX-M7: .eabi_attribute 6, 13 986 ; CORTEX-M7: .eabi_attribute 7, 77 987 ; CORTEX-M7: .eabi_attribute 8, 0 988 ; CORTEX-M7: .eabi_attribute 9, 2 989 ; CORTEX-M7-SOFT-NOT: .fpu 990 ; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16 991 ; CORTEX-M7-DOUBLE: .fpu fpv5-d16 992 ; CORTEX-M7: .eabi_attribute 17, 1 993 ; CORTEX-M7-NOT: .eabi_attribute 19 994 ;; We default to IEEE 754 compliance 995 ; CORTEX-M7: .eabi_attribute 20, 1 996 ; CORTEX-M7: .eabi_attribute 21, 1 997 ; CORTEX-M7-NOT: .eabi_attribute 22 998 ; CORTEX-M7: .eabi_attribute 23, 3 999 ; CORTEX-M7: .eabi_attribute 24, 1 1000 ; CORTEX-M7: .eabi_attribute 25, 1 1001 ; CORTEX-M7-SOFT-NOT: .eabi_attribute 27 1002 ; CORTEX-M7-SINGLE: .eabi_attribute 27, 1 1003 ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 1004 ; CORTEX-M7: .eabi_attribute 36, 1 1005 ; CORTEX-M7: .eabi_attribute 38, 1 1006 ; CORTEX-M7-NOT: .eabi_attribute 44 1007 ; CORTEX-M7: .eabi_attribute 14, 0 1008 1009 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 1010 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign. 1011 ; CORTEX-M7-FAST: .eabi_attribute 20, 2 1012 ;; Despite there being no FPU, we chose to flush to zero preserving 1013 ;; sign. This matches what the hardware would do for this architecture 1014 ;; revision. 1015 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2 1016 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21 1017 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 1018 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 1019 1020 ; CORTEX-R4: .cpu cortex-r4 1021 ; CORTEX-R4: .eabi_attribute 6, 10 1022 ; CORTEX-R4: .eabi_attribute 7, 82 1023 ; CORTEX-R4: .eabi_attribute 8, 1 1024 ; CORTEX-R4: .eabi_attribute 9, 2 1025 ; CORTEX-R4-NOT: .fpu vfpv3-d16 1026 ; CORTEX-R4-NOT: .eabi_attribute 19 1027 ;; We default to IEEE 754 compliance 1028 ; CORTEX-R4: .eabi_attribute 20, 1 1029 ; CORTEX-R4: .eabi_attribute 21, 1 1030 ; CORTEX-R4-NOT: .eabi_attribute 22 1031 ; CORTEX-R4: .eabi_attribute 23, 3 1032 ; CORTEX-R4: .eabi_attribute 24, 1 1033 ; CORTEX-R4: .eabi_attribute 25, 1 1034 ; CORTEX-R4-NOT: .eabi_attribute 28 1035 ; CORTEX-R4-NOT: .eabi_attribute 36 1036 ; CORTEX-R4: .eabi_attribute 38, 1 1037 ; CORTEX-R4-NOT: .eabi_attribute 42 1038 ; CORTEX-R4-NOT: .eabi_attribute 44 1039 ; CORTEX-R4-NOT: .eabi_attribute 68 1040 1041 ; CORTEX-R4F: .cpu cortex-r4f 1042 ; CORTEX-R4F: .eabi_attribute 6, 10 1043 ; CORTEX-R4F: .eabi_attribute 7, 82 1044 ; CORTEX-R4F: .eabi_attribute 8, 1 1045 ; CORTEX-R4F: .eabi_attribute 9, 2 1046 ; CORTEX-R4F: .fpu vfpv3-d16 1047 ; CORTEX-R4F-NOT: .eabi_attribute 19 1048 ;; We default to IEEE 754 compliance 1049 ; CORTEX-R4F: .eabi_attribute 20, 1 1050 ; CORTEX-R4F: .eabi_attribute 21, 1 1051 ; CORTEX-R4F-NOT: .eabi_attribute 22 1052 ; CORTEX-R4F: .eabi_attribute 23, 3 1053 ; CORTEX-R4F: .eabi_attribute 24, 1 1054 ; CORTEX-R4F: .eabi_attribute 25, 1 1055 ; CORTEX-R4F-NOT: .eabi_attribute 27, 1 1056 ; CORTEX-R4F-NOT: .eabi_attribute 28 1057 ; CORTEX-R4F-NOT: .eabi_attribute 36 1058 ; CORTEX-R4F: .eabi_attribute 38, 1 1059 ; CORTEX-R4F-NOT: .eabi_attribute 42 1060 ; CORTEX-R4F-NOT: .eabi_attribute 44 1061 ; CORTEX-R4F-NOT: .eabi_attribute 68 1062 1063 ; CORTEX-R5: .cpu cortex-r5 1064 ; CORTEX-R5: .eabi_attribute 6, 10 1065 ; CORTEX-R5: .eabi_attribute 7, 82 1066 ; CORTEX-R5: .eabi_attribute 8, 1 1067 ; CORTEX-R5: .eabi_attribute 9, 2 1068 ; CORTEX-R5: .fpu vfpv3-d16 1069 ; CORTEX-R5-NOT: .eabi_attribute 19 1070 ;; We default to IEEE 754 compliance 1071 ; CORTEX-R5: .eabi_attribute 20, 1 1072 ; CORTEX-R5: .eabi_attribute 21, 1 1073 ; CORTEX-R5-NOT: .eabi_attribute 22 1074 ; CORTEX-R5: .eabi_attribute 23, 3 1075 ; CORTEX-R5: .eabi_attribute 24, 1 1076 ; CORTEX-R5: .eabi_attribute 25, 1 1077 ; CORTEX-R5-NOT: .eabi_attribute 27, 1 1078 ; CORTEX-R5-NOT: .eabi_attribute 28 1079 ; CORTEX-R5-NOT: .eabi_attribute 36 1080 ; CORTEX-R5: .eabi_attribute 38, 1 1081 ; CORTEX-R5-NOT: .eabi_attribute 42 1082 ; CORTEX-R5: .eabi_attribute 44, 2 1083 ; CORTEX-R5-NOT: .eabi_attribute 68 1084 1085 ; CORTEX-R5-FAST-NOT: .eabi_attribute 19 1086 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. 1087 ; CORTEX-R5-FAST: .eabi_attribute 20, 2 1088 ; CORTEX-R5-FAST-NOT: .eabi_attribute 21 1089 ; CORTEX-R5-FAST-NOT: .eabi_attribute 22 1090 ; CORTEX-R5-FAST: .eabi_attribute 23, 1 1091 1092 ; CORTEX-R7: .cpu cortex-r7 1093 ; CORTEX-R7: .eabi_attribute 6, 10 1094 ; CORTEX-R7: .eabi_attribute 7, 82 1095 ; CORTEX-R7: .eabi_attribute 8, 1 1096 ; CORTEX-R7: .eabi_attribute 9, 2 1097 ; CORTEX-R7: .fpu vfpv3xd 1098 ; CORTEX-R7-NOT: .eabi_attribute 19 1099 ;; We default to IEEE 754 compliance 1100 ; CORTEX-R7: .eabi_attribute 20, 1 1101 ; CORTEX-R7: .eabi_attribute 21, 1 1102 ; CORTEX-R7-NOT: .eabi_attribute 22 1103 ; CORTEX-R7: .eabi_attribute 23, 3 1104 ; CORTEX-R7: .eabi_attribute 24, 1 1105 ; CORTEX-R7: .eabi_attribute 25, 1 1106 ; CORTEX-R7: .eabi_attribute 27, 1 1107 ; CORTEX-R7-NOT: .eabi_attribute 28 1108 ; CORTEX-R7: .eabi_attribute 36, 1 1109 ; CORTEX-R7: .eabi_attribute 38, 1 1110 ; CORTEX-R7: .eabi_attribute 42, 1 1111 ; CORTEX-R7: .eabi_attribute 44, 2 1112 ; CORTEX-R7-NOT: .eabi_attribute 68 1113 1114 ; CORTEX-R7-FAST-NOT: .eabi_attribute 19 1115 ;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. 1116 ; CORTEX-R7-FAST: .eabi_attribute 20, 2 1117 ; CORTEX-R7-FAST-NOT: .eabi_attribute 21 1118 ; CORTEX-R7-FAST-NOT: .eabi_attribute 22 1119 ; CORTEX-R7-FAST: .eabi_attribute 23, 1 1120 1121 ; CORTEX-A35: .cpu cortex-a35 1122 ; CORTEX-A35: .eabi_attribute 6, 14 1123 ; CORTEX-A35: .eabi_attribute 7, 65 1124 ; CORTEX-A35: .eabi_attribute 8, 1 1125 ; CORTEX-A35: .eabi_attribute 9, 2 1126 ; CORTEX-A35: .fpu crypto-neon-fp-armv8 1127 ; CORTEX-A35: .eabi_attribute 12, 3 1128 ; CORTEX-A35-NOT: .eabi_attribute 19 1129 ;; We default to IEEE 754 compliance 1130 ; CORTEX-A35: .eabi_attribute 20, 1 1131 ; CORTEX-A35: .eabi_attribute 21, 1 1132 ; CORTEX-A35-NOT: .eabi_attribute 22 1133 ; CORTEX-A35: .eabi_attribute 23, 3 1134 ; CORTEX-A35: .eabi_attribute 24, 1 1135 ; CORTEX-A35: .eabi_attribute 25, 1 1136 ; CORTEX-A35-NOT: .eabi_attribute 27 1137 ; CORTEX-A35-NOT: .eabi_attribute 28 1138 ; CORTEX-A35: .eabi_attribute 36, 1 1139 ; CORTEX-A35: .eabi_attribute 38, 1 1140 ; CORTEX-A35: .eabi_attribute 42, 1 1141 ; CORTEX-A35-NOT: .eabi_attribute 44 1142 ; CORTEX-A35: .eabi_attribute 68, 3 1143 1144 ; CORTEX-A35-FAST-NOT: .eabi_attribute 19 1145 ;; The A35 has the ARMv8 FP unit, which always flushes preserving sign. 1146 ; CORTEX-A35-FAST: .eabi_attribute 20, 2 1147 ; CORTEX-A35-FAST-NOT: .eabi_attribute 21 1148 ; CORTEX-A35-FAST-NOT: .eabi_attribute 22 1149 ; CORTEX-A35-FAST: .eabi_attribute 23, 1 1150 1151 ; CORTEX-A53: .cpu cortex-a53 1152 ; CORTEX-A53: .eabi_attribute 6, 14 1153 ; CORTEX-A53: .eabi_attribute 7, 65 1154 ; CORTEX-A53: .eabi_attribute 8, 1 1155 ; CORTEX-A53: .eabi_attribute 9, 2 1156 ; CORTEX-A53: .fpu crypto-neon-fp-armv8 1157 ; CORTEX-A53: .eabi_attribute 12, 3 1158 ; CORTEX-A53-NOT: .eabi_attribute 19 1159 ;; We default to IEEE 754 compliance 1160 ; CORTEX-A53: .eabi_attribute 20, 1 1161 ; CORTEX-A53: .eabi_attribute 21, 1 1162 ; CORTEX-A53-NOT: .eabi_attribute 22 1163 ; CORTEX-A53: .eabi_attribute 23, 3 1164 ; CORTEX-A53: .eabi_attribute 24, 1 1165 ; CORTEX-A53: .eabi_attribute 25, 1 1166 ; CORTEX-A53-NOT: .eabi_attribute 27 1167 ; CORTEX-A53-NOT: .eabi_attribute 28 1168 ; CORTEX-A53: .eabi_attribute 36, 1 1169 ; CORTEX-A53: .eabi_attribute 38, 1 1170 ; CORTEX-A53: .eabi_attribute 42, 1 1171 ; CORTEX-A53-NOT: .eabi_attribute 44 1172 ; CORTEX-A53: .eabi_attribute 68, 3 1173 1174 ; CORTEX-A53-FAST-NOT: .eabi_attribute 19 1175 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign. 1176 ; CORTEX-A53-FAST: .eabi_attribute 20, 2 1177 ; CORTEX-A53-FAST-NOT: .eabi_attribute 21 1178 ; CORTEX-A53-FAST-NOT: .eabi_attribute 22 1179 ; CORTEX-A53-FAST: .eabi_attribute 23, 1 1180 1181 ; CORTEX-A57: .cpu cortex-a57 1182 ; CORTEX-A57: .eabi_attribute 6, 14 1183 ; CORTEX-A57: .eabi_attribute 7, 65 1184 ; CORTEX-A57: .eabi_attribute 8, 1 1185 ; CORTEX-A57: .eabi_attribute 9, 2 1186 ; CORTEX-A57: .fpu crypto-neon-fp-armv8 1187 ; CORTEX-A57: .eabi_attribute 12, 3 1188 ; CORTEX-A57-NOT: .eabi_attribute 19 1189 ;; We default to IEEE 754 compliance 1190 ; CORTEX-A57: .eabi_attribute 20, 1 1191 ; CORTEX-A57: .eabi_attribute 21, 1 1192 ; CORTEX-A57-NOT: .eabi_attribute 22 1193 ; CORTEX-A57: .eabi_attribute 23, 3 1194 ; CORTEX-A57: .eabi_attribute 24, 1 1195 ; CORTEX-A57: .eabi_attribute 25, 1 1196 ; CORTEX-A57-NOT: .eabi_attribute 27 1197 ; CORTEX-A57-NOT: .eabi_attribute 28 1198 ; CORTEX-A57: .eabi_attribute 36, 1 1199 ; CORTEX-A57: .eabi_attribute 38, 1 1200 ; CORTEX-A57: .eabi_attribute 42, 1 1201 ; CORTEX-A57-NOT: .eabi_attribute 44 1202 ; CORTEX-A57: .eabi_attribute 68, 3 1203 1204 ; CORTEX-A57-FAST-NOT: .eabi_attribute 19 1205 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign. 1206 ; CORTEX-A57-FAST: .eabi_attribute 20, 2 1207 ; CORTEX-A57-FAST-NOT: .eabi_attribute 21 1208 ; CORTEX-A57-FAST-NOT: .eabi_attribute 22 1209 ; CORTEX-A57-FAST: .eabi_attribute 23, 1 1210 1211 ; CORTEX-A72: .cpu cortex-a72 1212 ; CORTEX-A72: .eabi_attribute 6, 14 1213 ; CORTEX-A72: .eabi_attribute 7, 65 1214 ; CORTEX-A72: .eabi_attribute 8, 1 1215 ; CORTEX-A72: .eabi_attribute 9, 2 1216 ; CORTEX-A72: .fpu crypto-neon-fp-armv8 1217 ; CORTEX-A72: .eabi_attribute 12, 3 1218 ; CORTEX-A72-NOT: .eabi_attribute 19 1219 ;; We default to IEEE 754 compliance 1220 ; CORTEX-A72: .eabi_attribute 20, 1 1221 ; CORTEX-A72: .eabi_attribute 21, 1 1222 ; CORTEX-A72-NOT: .eabi_attribute 22 1223 ; CORTEX-A72: .eabi_attribute 23, 3 1224 ; CORTEX-A72: .eabi_attribute 24, 1 1225 ; CORTEX-A72: .eabi_attribute 25, 1 1226 ; CORTEX-A72-NOT: .eabi_attribute 27 1227 ; CORTEX-A72-NOT: .eabi_attribute 28 1228 ; CORTEX-A72: .eabi_attribute 36, 1 1229 ; CORTEX-A72: .eabi_attribute 38, 1 1230 ; CORTEX-A72: .eabi_attribute 42, 1 1231 ; CORTEX-A72-NOT: .eabi_attribute 44 1232 ; CORTEX-A72: .eabi_attribute 68, 3 1233 1234 ; CORTEX-A72-FAST-NOT: .eabi_attribute 19 1235 ;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. 1236 ; CORTEX-A72-FAST: .eabi_attribute 20, 2 1237 ; CORTEX-A72-FAST-NOT: .eabi_attribute 21 1238 ; CORTEX-A72-FAST-NOT: .eabi_attribute 22 1239 ; CORTEX-A72-FAST: .eabi_attribute 23, 1 1240 1241 ; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16 1242 ; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16 1243 ; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd 1244 ; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16 1245 ; GENERIC-FPU-NEON-FP16: .fpu neon-fp16 1246 1247 ; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 1248 ; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 1249 ; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 1250 ; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 1251 ; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 1252 ; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 1253 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 1254 ;; We default to IEEE 754 compliance 1255 ; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 1256 ; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 1257 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 1258 ; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 1259 ; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 1260 ; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 1261 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 1262 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 1263 ; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 1264 ; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 1265 ; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 1266 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 1267 ; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 1268 1269 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 1270 ;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. 1271 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 1272 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 1273 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 1274 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 1275 1276 ; RELOC-PIC: .eabi_attribute 15, 1 1277 ; RELOC-PIC: .eabi_attribute 16, 1 1278 ; RELOC-PIC: .eabi_attribute 17, 2 1279 ; RELOC-OTHER: .eabi_attribute 17, 1 1280 1281 ; PCS-R9-USE: .eabi_attribute 14, 0 1282 ; PCS-R9-RESERVE: .eabi_attribute 14, 3 1283 1284 define i32 @f(i64 %z) { 1285 ret i32 0 1286 } 1287
