1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG 5 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG 6 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=THUMB-LONG 7 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP 8 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP 9 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP 10 11 ; Note that some of these tests assume that relocations are either 12 ; movw/movt or constant pool loads. Different platforms will select 13 ; different approaches. 14 15 define i32 @t0(i1 zeroext %a) nounwind { 16 %1 = zext i1 %a to i32 17 ret i32 %1 18 } 19 20 define i32 @t1(i8 signext %a) nounwind { 21 %1 = sext i8 %a to i32 22 ret i32 %1 23 } 24 25 define i32 @t2(i8 zeroext %a) nounwind { 26 %1 = zext i8 %a to i32 27 ret i32 %1 28 } 29 30 define i32 @t3(i16 signext %a) nounwind { 31 %1 = sext i16 %a to i32 32 ret i32 %1 33 } 34 35 define i32 @t4(i16 zeroext %a) nounwind { 36 %1 = zext i16 %a to i32 37 ret i32 %1 38 } 39 40 define void @foo(i8 %a, i16 %b) nounwind { 41 ; ARM: foo 42 ; THUMB: foo 43 ;; Materialize i1 1 44 ; ARM: movw r2, #1 45 ;; zero-ext 46 ; ARM: and r2, r2, #1 47 ; THUMB: and r2, r2, #1 48 %1 = call i32 @t0(i1 zeroext 1) 49 ; ARM: sxtb r2, r1 50 ; ARM: mov r0, r2 51 ; THUMB: sxtb r2, r1 52 ; THUMB: mov r0, r2 53 %2 = call i32 @t1(i8 signext %a) 54 ; ARM: and r2, r1, #255 55 ; ARM: mov r0, r2 56 ; THUMB: and r2, r1, #255 57 ; THUMB: mov r0, r2 58 %3 = call i32 @t2(i8 zeroext %a) 59 ; ARM: sxth r2, r1 60 ; ARM: mov r0, r2 61 ; THUMB: sxth r2, r1 62 ; THUMB: mov r0, r2 63 %4 = call i32 @t3(i16 signext %b) 64 ; ARM: uxth r2, r1 65 ; ARM: mov r0, r2 66 ; THUMB: uxth r2, r1 67 ; THUMB: mov r0, r2 68 %5 = call i32 @t4(i16 zeroext %b) 69 70 ;; A few test to check materialization 71 ;; Note: i1 1 was materialized with t1 call 72 ; ARM: movw r1, #255 73 %6 = call i32 @t2(i8 zeroext 255) 74 ; ARM: movw r1, #65535 75 ; THUMB: movw r1, #65535 76 %7 = call i32 @t4(i16 zeroext 65535) 77 ret void 78 } 79 80 define void @foo2() nounwind { 81 %1 = call signext i16 @t5() 82 %2 = call zeroext i16 @t6() 83 %3 = call signext i8 @t7() 84 %4 = call zeroext i8 @t8() 85 %5 = call zeroext i1 @t9() 86 ret void 87 } 88 89 declare signext i16 @t5(); 90 declare zeroext i16 @t6(); 91 declare signext i8 @t7(); 92 declare zeroext i8 @t8(); 93 declare zeroext i1 @t9(); 94 95 define i32 @t10() { 96 entry: 97 ; ARM: @t10 98 ; ARM: movw [[R0:l?r[0-9]*]], #0 99 ; ARM: movw [[R1:l?r[0-9]*]], #248 100 ; ARM: movw [[R2:l?r[0-9]*]], #187 101 ; ARM: movw [[R3:l?r[0-9]*]], #28 102 ; ARM: movw [[R4:l?r[0-9]*]], #40 103 ; ARM: movw [[R5:l?r[0-9]*]], #186 104 ; ARM: and [[R0]], [[R0]], #255 105 ; ARM: and [[R1]], [[R1]], #255 106 ; ARM: and [[R2]], [[R2]], #255 107 ; ARM: and [[R3]], [[R3]], #255 108 ; ARM: and [[R4]], [[R4]], #255 109 ; ARM: str [[R4]], [sp] 110 ; ARM: and [[R4]], [[R5]], #255 111 ; ARM: str [[R4]], [sp, #4] 112 ; ARM: bl {{_?}}bar 113 ; ARM-LONG: @t10 114 ; ARM-LONG: {{(movw)|(ldr)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 115 ; ARM-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 116 ; ARM-LONG: ldr [[R]], {{\[}}[[R]]{{\]}} 117 ; ARM-LONG: blx [[R]] 118 ; THUMB: @t10 119 ; THUMB: movs [[R0:l?r[0-9]*]], #0 120 ; THUMB: movs [[R1:l?r[0-9]*]], #248 121 ; THUMB: movs [[R2:l?r[0-9]*]], #187 122 ; THUMB: movs [[R3:l?r[0-9]*]], #28 123 ; THUMB: movw [[R4:l?r[0-9]*]], #40 124 ; THUMB: movw [[R5:l?r[0-9]*]], #186 125 ; THUMB: and [[R0]], [[R0]], #255 126 ; THUMB: and [[R1]], [[R1]], #255 127 ; THUMB: and [[R2]], [[R2]], #255 128 ; THUMB: and [[R3]], [[R3]], #255 129 ; THUMB: and [[R4]], [[R4]], #255 130 ; THUMB: str.w [[R4]], [sp] 131 ; THUMB: and [[R4]], [[R5]], #255 132 ; THUMB: str.w [[R4]], [sp, #4] 133 ; THUMB: bl {{_?}}bar 134 ; THUMB-LONG: @t10 135 ; THUMB-LONG: {{(movw)|(ldr.n)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 136 ; THUMB-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 137 ; THUMB-LONG: ldr{{(.w)?}} [[R]], {{\[}}[[R]]{{\]}} 138 ; THUMB-LONG: blx [[R]] 139 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70) 140 ret i32 0 141 } 142 143 declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) 144 145 define i32 @bar0(i32 %i) nounwind { 146 ret i32 0 147 } 148 149 define void @foo3() uwtable { 150 ; ARM: movw r0, #0 151 ; ARM: {{(movw r1, :lower16:_?bar0)|(ldr r1, .LCPI)}} 152 ; ARM: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}} 153 ; ARM: blx r1 154 ; THUMB: movs r0, #0 155 ; THUMB: {{(movw r1, :lower16:_?bar0)|(ldr.n r1, .LCPI)}} 156 ; THUMB: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}} 157 ; THUMB: blx r1 158 %fptr = alloca i32 (i32)*, align 8 159 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8 160 %1 = load i32 (i32)*, i32 (i32)** %fptr, align 8 161 %call = call i32 %1(i32 0) 162 ret void 163 } 164 165 define i32 @LibCall(i32 %a, i32 %b) { 166 entry: 167 ; ARM: LibCall 168 ; ARM: bl {{___udivsi3|__aeabi_uidiv}} 169 ; ARM-LONG: LibCall 170 ; ARM-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}} 171 ; ARM-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 172 ; ARM-LONG: ldr r2, [r2] 173 ; ARM-LONG: blx r2 174 ; THUMB: LibCall 175 ; THUMB: bl {{___udivsi3|__aeabi_uidiv}} 176 ; THUMB-LONG: LibCall 177 ; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}} 178 ; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 179 ; THUMB-LONG: ldr r2, [r2] 180 ; THUMB-LONG: blx r2 181 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] 182 ret i32 %tmp1 183 } 184 185 ; Test fastcc 186 187 define fastcc void @fast_callee(float %i) ssp { 188 entry: 189 ; ARM: fast_callee 190 ; ARM: vmov r0, s0 191 ; THUMB: fast_callee 192 ; THUMB: vmov r0, s0 193 ; ARM-NOVFP: fast_callee 194 ; ARM-NOVFP-NOT: s0 195 ; THUMB-NOVFP: fast_callee 196 ; THUMB-NOVFP-NOT: s0 197 call void @print(float %i) 198 ret void 199 } 200 201 define void @fast_caller() ssp { 202 entry: 203 ; ARM: fast_caller 204 ; ARM: vldr s0, 205 ; THUMB: fast_caller 206 ; THUMB: vldr s0, 207 ; ARM-NOVFP: fast_caller 208 ; ARM-NOVFP: movw r0, #13107 209 ; ARM-NOVFP: movt r0, #16611 210 ; THUMB-NOVFP: fast_caller 211 ; THUMB-NOVFP: movw r0, #13107 212 ; THUMB-NOVFP: movt r0, #16611 213 call fastcc void @fast_callee(float 0x401C666660000000) 214 ret void 215 } 216 217 define void @no_fast_callee(float %i) ssp { 218 entry: 219 ; ARM: no_fast_callee 220 ; ARM: vmov s0, r0 221 ; THUMB: no_fast_callee 222 ; THUMB: vmov s0, r0 223 ; ARM-NOVFP: no_fast_callee 224 ; ARM-NOVFP-NOT: s0 225 ; THUMB-NOVFP: no_fast_callee 226 ; THUMB-NOVFP-NOT: s0 227 call void @print(float %i) 228 ret void 229 } 230 231 define void @no_fast_caller() ssp { 232 entry: 233 ; ARM: no_fast_caller 234 ; ARM: vmov r0, s0 235 ; THUMB: no_fast_caller 236 ; THUMB: vmov r0, s0 237 ; ARM-NOVFP: no_fast_caller 238 ; ARM-NOVFP: movw r0, #13107 239 ; ARM-NOVFP: movt r0, #16611 240 ; THUMB-NOVFP: no_fast_caller 241 ; THUMB-NOVFP: movw r0, #13107 242 ; THUMB-NOVFP: movt r0, #16611 243 call void @no_fast_callee(float 0x401C666660000000) 244 ret void 245 } 246 247 declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) 248 249 define void @call_undef_args() { 250 ; ARM-LABEL: call_undef_args 251 ; ARM: movw r0, #1 252 ; ARM-NEXT: movw r1, #2 253 ; ARM-NEXT: movw r2, #3 254 ; ARM-NEXT: movw r3, #4 255 ; ARM-NOT: str {{r[0-9]+}}, [sp] 256 ; ARM: movw [[REG:l?r[0-9]*]], #6 257 ; ARM-NEXT: str [[REG]], [sp, #4] 258 call void @bar2(i32 1, i32 2, i32 3, i32 4, i32 undef, i32 6) 259 ret void 260 } 261 262 declare void @print(float) 263
