Home | History | Annotate | Download | only in ARM
      1 ; RUN: llc -O0 -verify-machineinstrs -mtriple=armv7-apple-darwin < %s
      2 ; RUN: llc -O0 -verify-machineinstrs -mtriple=armv7-linux-gnueabi < %s
      3 
      4 define i32 @main() nounwind ssp {
      5 entry:
      6   %retval = alloca i32, align 4
      7   %X = alloca <4 x i32>, align 16
      8   %Y = alloca <4 x float>, align 16
      9   store i32 0, i32* %retval
     10   %tmp = load <4 x i32>, <4 x i32>* %X, align 16
     11   call void @__aa(<4 x i32> %tmp, i8* null, i32 3, <4 x float>* %Y)
     12   %0 = load i32, i32* %retval
     13   ret i32 %0
     14 }
     15 
     16 define internal void @__aa(<4 x i32> %v, i8* %p, i32 %offset, <4 x float>* %constants) nounwind inlinehint ssp {
     17 entry:
     18   %__a.addr.i = alloca <4 x i32>, align 16
     19   %v.addr = alloca <4 x i32>, align 16
     20   %p.addr = alloca i8*, align 4
     21   %offset.addr = alloca i32, align 4
     22   %constants.addr = alloca <4 x float>*, align 4
     23   store <4 x i32> %v, <4 x i32>* %v.addr, align 16
     24   store i8* %p, i8** %p.addr, align 4
     25   store i32 %offset, i32* %offset.addr, align 4
     26   store <4 x float>* %constants, <4 x float>** %constants.addr, align 4
     27   %tmp = load <4 x i32>, <4 x i32>* %v.addr, align 16
     28   store <4 x i32> %tmp, <4 x i32>* %__a.addr.i, align 16
     29   %tmp.i = load <4 x i32>, <4 x i32>* %__a.addr.i, align 16
     30   %0 = bitcast <4 x i32> %tmp.i to <16 x i8>
     31   %1 = bitcast <16 x i8> %0 to <4 x i32>
     32   %vcvt.i = sitofp <4 x i32> %1 to <4 x float>
     33   %tmp1 = load i8*, i8** %p.addr, align 4
     34   %tmp2 = load i32, i32* %offset.addr, align 4
     35   %tmp3 = load <4 x float>*, <4 x float>** %constants.addr, align 4
     36   call void @__bb(<4 x float> %vcvt.i, i8* %tmp1, i32 %tmp2, <4 x float>* %tmp3)
     37   ret void
     38 }
     39 
     40 define internal void @__bb(<4 x float> %v, i8* %p, i32 %offset, <4 x float>* %constants) nounwind inlinehint ssp {
     41 entry:
     42   %v.addr = alloca <4 x float>, align 16
     43   %p.addr = alloca i8*, align 4
     44   %offset.addr = alloca i32, align 4
     45   %constants.addr = alloca <4 x float>*, align 4
     46   %data = alloca i64, align 4
     47   store <4 x float> %v, <4 x float>* %v.addr, align 16
     48   store i8* %p, i8** %p.addr, align 4
     49   store i32 %offset, i32* %offset.addr, align 4
     50   store <4 x float>* %constants, <4 x float>** %constants.addr, align 4
     51   %tmp = load i64, i64* %data, align 4
     52   %tmp1 = load i8*, i8** %p.addr, align 4
     53   %tmp2 = load i32, i32* %offset.addr, align 4
     54   %add.ptr = getelementptr i8, i8* %tmp1, i32 %tmp2
     55   %0 = bitcast i8* %add.ptr to i64*
     56   %arrayidx = getelementptr inbounds i64, i64* %0, i32 0
     57   store i64 %tmp, i64* %arrayidx
     58   ret void
     59 }
     60