1 ; RUN: llc < %s -mtriple=armv4t--linux-androideabi -print-machineinstrs=if-converter -o /dev/null 2>&1 | FileCheck %s 2 ; Fix a bug triggered in IfConverterTriangle when CvtBB has multiple 3 ; predecessors. 4 ; PR18752 5 6 %classK = type { i8, %classF } 7 %classF = type { i8 } 8 %classL = type { %classG, i32, i32 } 9 %classG = type { %classL* } 10 %classM2 = type { %classL } 11 12 define zeroext i1 @test(%classK* %this, %classM2* nocapture readnone %p1, %classM2* nocapture readnone %p2) align 2 { 13 entry: 14 br i1 undef, label %for.end, label %for.body 15 16 ; Before if conversion, we have 17 ; for.body -> lor.lhs.false.i (50%) 18 ; -> for.cond.backedge (50%) 19 ; lor.lhs.false.i -> for.cond.backedge (100%) 20 ; -> cond.false.i (0%) 21 ; Afer if conversion, we have 22 ; for.body -> for.cond.backedge (100%) 23 ; -> cond.false.i (0%) 24 ; CHECK: BB#1: derived from LLVM BB %for.body 25 ; CHECK: Successors according to CFG: BB#2(0x7ffffc00 / 0x80000000 = 100.00%) BB#4(0x00000400 / 0x80000000 = 0.00%) 26 for.body: 27 br i1 undef, label %for.cond.backedge, label %lor.lhs.false.i, !prof !1 28 29 for.cond.backedge: 30 %tobool = icmp eq %classL* undef, null 31 br i1 %tobool, label %for.end, label %for.body 32 33 lor.lhs.false.i: 34 %tobool.i.i7 = icmp eq i32 undef, 0 35 br i1 %tobool.i.i7, label %for.cond.backedge, label %cond.false.i 36 37 cond.false.i: 38 call void @_Z3fn1v() 39 unreachable 40 41 for.end: 42 br i1 undef, label %if.else.i.i, label %if.then.i.i 43 44 if.then.i.i: 45 store %classL* null, %classL** undef, align 4 46 br label %_ZN1M6spliceEv.exit 47 48 if.else.i.i: 49 store %classL* null, %classL** null, align 4 50 br label %_ZN1M6spliceEv.exit 51 52 _ZN1M6spliceEv.exit: 53 %LIS = getelementptr inbounds %classK, %classK* %this, i32 0, i32 1 54 call void @_ZN1F10handleMoveEb(%classF* %LIS, i1 zeroext false) 55 unreachable 56 } 57 58 declare %classL* @_ZN1M1JI1LS1_EcvPS1_Ev(%classM2*) 59 declare void @_ZN1F10handleMoveEb(%classF*, i1 zeroext) 60 declare void @_Z3fn1v() 61 62 !0 = !{!"clang version 3.5"} 63 !1 = !{!"branch_weights", i32 62, i32 62} 64
