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      1 ; RUN: llc < %s -relocation-model=pic -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=ARM
      2 ; RUN: llc < %s -relocation-model=pic -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=THUMB
      3 ; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2
      4 ; RUN: llc < %s -relocation-model=static -mtriple=thumbv8-apple-darwin | FileCheck %s -check-prefix=THUMB2
      5 
      6 @nextaddr = global i8* null                       ; <i8**> [#uses=2]
      7 @C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
      8 
      9 define internal i32 @foo(i32 %i) nounwind {
     10 ; ARM-LABEL: foo:
     11 ; THUMB-LABEL: foo:
     12 ; THUMB2-LABEL: foo:
     13 entry:
     14   ; _nextaddr gets CSEed for use later on.
     15 ; THUMB: ldr r[[NEXTADDR_REG:[0-9]+]], [[NEXTADDR_CPI:LCPI0_[0-9]+]]
     16 ; THUMB: [[NEXTADDR_PCBASE:LPC0_[0-9]]]:
     17 ; THUMB: add r[[NEXTADDR_REG]], pc
     18 
     19   %0 = load i8*, i8** @nextaddr, align 4               ; <i8*> [#uses=2]
     20   %1 = icmp eq i8* %0, null                       ; <i1> [#uses=1]
     21 ; indirect branch gets duplicated here
     22 ; ARM: bx
     23 ; THUMB: mov pc,
     24 ; THUMB2: mov pc,
     25   br i1 %1, label %bb3, label %bb2
     26 
     27 bb2:                                              ; preds = %entry, %bb3
     28   %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
     29 ; ARM: bx
     30 ; THUMB: mov pc,
     31   indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
     32 
     33 bb3:                                              ; preds = %entry
     34   %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
     35   %gotovar.4.0.pre = load i8*, i8** %2, align 4        ; <i8*> [#uses=1]
     36   br label %bb2
     37 
     38 L5:                                               ; preds = %bb2
     39   br label %L4
     40 
     41 L4:                                               ; preds = %L5, %bb2
     42   %res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ]     ; <i32> [#uses=1]
     43   br label %L3
     44 
     45 L3:                                               ; preds = %L4, %bb2
     46   %res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ]   ; <i32> [#uses=1]
     47   br label %L2
     48 
     49 L2:                                               ; preds = %L3, %bb2
     50 ; THUMB: muls
     51   %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ]   ; <i32> [#uses=1]
     52   %phitmp = mul i32 %res.2, 6                     ; <i32> [#uses=1]
     53   br label %L1
     54 
     55 L1:                                               ; preds = %L2, %bb2
     56   %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ]  ; <i32> [#uses=1]
     57 ; ARM-LABEL: %L1
     58 ; ARM: ldr [[R1:r[0-9]+]], LCPI
     59 ; ARM: add [[R1b:r[0-9]+]], pc, [[R1]]
     60 ; ARM: str [[R1b]]
     61 
     62 ; THUMB-LABEL: %L1
     63 ; THUMB: ldr [[R2:r[0-9]+]], LCPI
     64 ; THUMB: add [[R2]], pc
     65 ; THUMB: str [[R2]], [r[[NEXTADDR_REG]]]
     66 ; THUMB2-LABEL: %L1
     67 ; THUMB2: ldr [[R2:r[0-9]+]], LCPI
     68 ; THUMB2-NEXT: str{{(.w)?}} [[R2]]
     69   store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
     70   ret i32 %res.3
     71 }
     72 ; ARM: .long Ltmp0-(LPC{{.*}}+8)
     73 ; THUMB: .long Ltmp0-(LPC{{.*}}+4)
     74 ; THUMB: .long _nextaddr-([[NEXTADDR_PCBASE]]+4)
     75 ; THUMB2: .long Ltmp0
     76