1 ; RUN: llc -regalloc=greedy -arm-atomic-cfg-tidy=0 < %s | FileCheck %s 2 3 ; LSR shouldn't introduce more induction variables than needed, increasing 4 ; register pressure and therefore spilling. There is more room for improvement 5 ; here. 6 7 ; CHECK: sub sp, #{{40|36|32|28|24}} 8 9 ; CHECK: %for.inc 10 ; CHECK-NOT: ldr 11 ; CHECK: add 12 13 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" 14 target triple = "thumbv7-apple-ios" 15 16 %struct.partition_entry = type { i32, i32, i64, i64 } 17 18 define i32 @partition_overlap_check(%struct.partition_entry* nocapture %part, i32 %num_entries) nounwind readonly optsize ssp { 19 entry: 20 %cmp79 = icmp sgt i32 %num_entries, 0 21 br i1 %cmp79, label %outer.loop, label %for.end72 22 23 outer.loop: ; preds = %for.inc69, %entry 24 %overlap.081 = phi i32 [ %overlap.4, %for.inc69 ], [ 0, %entry ] 25 %0 = phi i32 [ %inc71, %for.inc69 ], [ 0, %entry ] 26 %offset = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %0, i32 2 27 %len = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %0, i32 3 28 %tmp5 = load i64, i64* %offset, align 4 29 %tmp15 = load i64, i64* %len, align 4 30 %add = add nsw i64 %tmp15, %tmp5 31 br label %inner.loop 32 33 inner.loop: ; preds = %for.inc, %outer.loop 34 %overlap.178 = phi i32 [ %overlap.081, %outer.loop ], [ %overlap.4, %for.inc ] 35 %1 = phi i32 [ 0, %outer.loop ], [ %inc, %for.inc ] 36 %cmp23 = icmp eq i32 %0, %1 37 br i1 %cmp23, label %for.inc, label %if.end 38 39 if.end: ; preds = %inner.loop 40 %len39 = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %1, i32 3 41 %offset28 = getelementptr %struct.partition_entry, %struct.partition_entry* %part, i32 %1, i32 2 42 %tmp29 = load i64, i64* %offset28, align 4 43 %tmp40 = load i64, i64* %len39, align 4 44 %add41 = add nsw i64 %tmp40, %tmp29 45 %cmp44 = icmp sge i64 %tmp29, %tmp5 46 %cmp47 = icmp slt i64 %tmp29, %add 47 %or.cond = and i1 %cmp44, %cmp47 48 %overlap.2 = select i1 %or.cond, i32 1, i32 %overlap.178 49 %cmp52 = icmp sle i64 %add41, %add 50 %cmp56 = icmp sgt i64 %add41, %tmp5 51 %or.cond74 = and i1 %cmp52, %cmp56 52 %overlap.3 = select i1 %or.cond74, i32 1, i32 %overlap.2 53 %cmp61 = icmp sgt i64 %tmp29, %tmp5 54 %cmp65 = icmp slt i64 %add41, %add 55 %or.cond75 = or i1 %cmp61, %cmp65 56 br i1 %or.cond75, label %for.inc, label %if.then66 57 58 if.then66: ; preds = %if.end 59 br label %for.inc 60 61 for.inc: ; preds = %if.end, %if.then66, %inner.loop 62 %overlap.4 = phi i32 [ %overlap.178, %inner.loop ], [ 1, %if.then66 ], [ %overlap.3, %if.end ] 63 %inc = add nsw i32 %1, 1 64 %exitcond = icmp eq i32 %inc, %num_entries 65 br i1 %exitcond, label %for.inc69, label %inner.loop 66 67 for.inc69: ; preds = %for.inc 68 %inc71 = add nsw i32 %0, 1 69 %exitcond83 = icmp eq i32 %inc71, %num_entries 70 br i1 %exitcond83, label %for.end72, label %outer.loop 71 72 for.end72: ; preds = %for.inc69, %entry 73 %overlap.0.lcssa = phi i32 [ 0, %entry ], [ %overlap.4, %for.inc69 ] 74 ret i32 %overlap.0.lcssa 75 } 76
