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      1 ; RUN: llc -mtriple=thumbv7m-macho -o - -show-mc-encoding %s | FileCheck %s
      2 ; RUN: llc -mtriple=thumbv6m-macho -o - -show-mc-encoding %s | FileCheck %s --check-prefix=CHECK-V6M
      3 ; RUN: llc -mtriple=armv6-macho -o - -show-mc-encoding %s | FileCheck %s --check-prefix=CHECK-ARM
      4 define i32 @test_mov() minsize {
      5 ; CHECK-LABEL: test_mov:
      6 ; CHECK: movs r0, #255 @ encoding: [0xff,0x20]
      7 
      8   ret i32 255
      9 }
     10 
     11 define i32 @test_mov_mvn() minsize {
     12 ; CHECK-LABEL: test_mov_mvn:
     13 ; CHECK: mvn r0, #203 @ encoding: [0x6f,0xf0,0xcb,0x00]
     14 
     15 ; CHECK-V6M-LABEL: test_mov_mvn:
     16 ; CHECK-V6M: movs [[TMP:r[0-7]]], #203 @ encoding: [0xcb,0x20]
     17 ; CHECK-V6M: mvns r0, [[TMP]] @ encoding: [0xc0,0x43]
     18 
     19 ; CHECK-ARM-LABEL: test_mov_mvn:
     20 ; CHECK-ARM: mvn r0, #203 @ encoding: [0xcb,0x00,0xe0,0xe3]
     21   ret i32 4294967092
     22 }
     23 
     24 define i32 @test_mov_lsl() minsize {
     25 ; CHECK-LABEL: test_mov_lsl:
     26 ; CHECK: mov.w r0, #589824 @ encoding: [0x4f,0xf4,0x10,0x20]
     27 
     28 ; CHECK-V6M-LABEL: test_mov_lsl:
     29 ; CHECK-V6M: movs [[TMP:r[0-7]]], #9 @ encoding: [0x09,0x20]
     30 ; CHECK-V6M: lsls r0, [[TMP]], #16 @ encoding: [0x00,0x04]
     31 
     32 ; CHECK-ARM-LABEL: test_mov_lsl:
     33 ; CHECK-ARM: mov r0, #589824 @ encoding: [0x09,0x08,0xa0,0xe3]
     34   ret i32 589824
     35 }
     36 
     37 define i32 @test_movw() minsize {
     38 ; CHECK-LABEL: test_movw:
     39 ; CHECK: movw r0, #65535
     40 
     41 ; CHECK-V6M-LABEL: test_movw:
     42 ; CHECK-V6M: ldr r0, [[CONSTPOOL:LCPI[0-9]+_[0-9]+]] @ encoding: [A,0x48]
     43 ; CHECK-V6M: [[CONSTPOOL]]:
     44 ; CHECK-V6M-NEXT: .long 65535
     45 
     46 ; CHECK-ARM-LABEL: test_movw:
     47 ; CHECK-ARM: mov r0, #255 @ encoding: [0xff,0x00,0xa0,0xe3]
     48 ; CHECK-ARM: orr r0, r0, #65280 @ encoding: [0xff,0x0c,0x80,0xe3]
     49  ret i32 65535
     50 }
     51 
     52 define i32 @test_regress1() {
     53 ; CHECK-ARM-LABEL: test_regress1:
     54 ; CHECK-ARM: mov r0, #248 @ encoding: [0xf8,0x00,0xa0,0xe3]
     55 ; CHECK-ARM: orr r0, r0, #16252928 @ encoding: [0x3e,0x07,0x80,0xe3]
     56   ret i32 16253176
     57 }
     58