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      1 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s --check-prefix=ARM
      2 
      3 ; RUN: llc -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
      4 ; RUN:  | FileCheck %s --check-prefix=ARMT2
      5 
      6 ; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
      7 ; RUN:  | FileCheck %s --check-prefix=THUMB2
      8 
      9 define i32 @t1(i32 %c) nounwind readnone {
     10 entry:
     11 ; ARM-LABEL: t1:
     12 ; ARM: mov [[R1:r[0-9]+]], #101
     13 ; ARM: orr [[R1b:r[0-9]+]], [[R1]], #256
     14 ; ARM: movgt {{r[0-1]}}, #123
     15 
     16 ; ARMT2-LABEL: t1:
     17 ; ARMT2: movw [[R:r[0-1]]], #357
     18 ; ARMT2: movwgt [[R]], #123
     19 
     20 ; THUMB2-LABEL: t1:
     21 ; THUMB2: movw [[R:r[0-1]]], #357
     22 ; THUMB2: movgt [[R]], #123
     23 
     24   %0 = icmp sgt i32 %c, 1
     25   %1 = select i1 %0, i32 123, i32 357
     26   ret i32 %1
     27 }
     28 
     29 define i32 @t2(i32 %c) nounwind readnone {
     30 entry:
     31 ; ARM-LABEL: t2:
     32 ; ARM: mov [[R:r[0-9]+]], #101
     33 ; ARM: orr [[R]], [[R]], #256
     34 ; ARM: movle [[R]], #123
     35 
     36 ; ARMT2-LABEL: t2:
     37 ; ARMT2: mov [[R:r[0-1]]], #123
     38 ; ARMT2: movwgt [[R]], #357
     39 
     40 ; THUMB2-LABEL: t2:
     41 ; THUMB2: mov{{(s|\.w)}} [[R:r[0-1]]], #123
     42 ; THUMB2: movwgt [[R]], #357
     43 
     44   %0 = icmp sgt i32 %c, 1
     45   %1 = select i1 %0, i32 357, i32 123
     46   ret i32 %1
     47 }
     48 
     49 define i32 @t3(i32 %a) nounwind readnone {
     50 entry:
     51 ; ARM-LABEL: t3:
     52 ; ARM: mov [[R:r[0-1]]], #0
     53 ; ARM: moveq [[R]], #1
     54 
     55 ; ARMT2-LABEL: t3:
     56 ; ARMT2: mov [[R:r[0-1]]], #0
     57 ; ARMT2: movweq [[R]], #1
     58 
     59 ; THUMB2-LABEL: t3:
     60 ; THUMB2: mov{{(s|\.w)}} [[R:r[0-1]]], #0
     61 ; THUMB2: moveq [[R]], #1
     62   %0 = icmp eq i32 %a, 160
     63   %1 = zext i1 %0 to i32
     64   ret i32 %1
     65 }
     66 
     67 define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind {
     68 entry:
     69 ; ARM-LABEL: t4:
     70 ; ARM: ldr
     71 ; ARM: mov{{lt|ge}}
     72 
     73 ; ARMT2-LABEL: t4:
     74 ; ARMT2: movwlt [[R0:r[0-9]+]], #65365
     75 ; ARMT2: movtlt [[R0]], #65365
     76 
     77 ; THUMB2-LABEL: t4:
     78 ; THUMB2: mvnlt [[R0:r[0-9]+]], #11141290
     79   %0 = icmp slt i32 %a, %b
     80   %1 = select i1 %0, i32 4283826005, i32 %x
     81   ret i32 %1
     82 }
     83 
     84 ; rdar://9758317
     85 define i32 @t5(i32 %a) nounwind {
     86 entry:
     87 ; ARM-LABEL: t5:
     88 ; ARM-NOT: mov
     89 ; ARM: cmp r0, #1
     90 ; ARM-NOT: mov
     91 ; ARM: movne r0, #0
     92 
     93 ; THUMB2-LABEL: t5:
     94 ; THUMB2-NOT: mov
     95 ; THUMB2: cmp r0, #1
     96 ; THUMB2: it ne
     97 ; THUMB2: movne r0, #0
     98   %cmp = icmp eq i32 %a, 1
     99   %conv = zext i1 %cmp to i32
    100   ret i32 %conv
    101 }
    102 
    103 define i32 @t6(i32 %a) nounwind {
    104 entry:
    105 ; ARM-LABEL: t6:
    106 ; ARM-NOT: mov
    107 ; ARM: cmp r0, #0
    108 ; ARM: movne r0, #1
    109 
    110 ; THUMB2-LABEL: t6:
    111 ; THUMB2-NOT: mov
    112 ; THUMB2: cmp r0, #0
    113 ; THUMB2: it ne
    114 ; THUMB2: movne r0, #1
    115   %tobool = icmp ne i32 %a, 0
    116   %lnot.ext = zext i1 %tobool to i32
    117   ret i32 %lnot.ext
    118 }
    119