1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon -fast-isel=0 -O0 %s -o - | FileCheck %s 2 3 define void @vst3i8(i8* %A, <8 x i8>* %B) nounwind { 4 ;CHECK-LABEL: vst3i8: 5 ;Check the alignment value. Max for this instruction is 64 bits: 6 ;This test runs at -O0 so do not check for specific register numbers. 7 ;CHECK: vst3.8 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}:64] 8 %tmp1 = load <8 x i8>, <8 x i8>* %B 9 call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 32) 10 ret void 11 } 12 13 define void @vst3i16(i16* %A, <4 x i16>* %B) nounwind { 14 ;CHECK-LABEL: vst3i16: 15 ;CHECK: vst3.16 16 %tmp0 = bitcast i16* %A to i8* 17 %tmp1 = load <4 x i16>, <4 x i16>* %B 18 call void @llvm.arm.neon.vst3.p0i8.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) 19 ret void 20 } 21 22 define void @vst3i32(i32* %A, <2 x i32>* %B) nounwind { 23 ;CHECK-LABEL: vst3i32: 24 ;CHECK: vst3.32 25 %tmp0 = bitcast i32* %A to i8* 26 %tmp1 = load <2 x i32>, <2 x i32>* %B 27 call void @llvm.arm.neon.vst3.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) 28 ret void 29 } 30 31 ;Check for a post-increment updating store. 32 define void @vst3i32_update(i32** %ptr, <2 x i32>* %B) nounwind { 33 ;CHECK-LABEL: vst3i32_update: 34 ;CHECK: vst3.32 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! 35 %A = load i32*, i32** %ptr 36 %tmp0 = bitcast i32* %A to i8* 37 %tmp1 = load <2 x i32>, <2 x i32>* %B 38 call void @llvm.arm.neon.vst3.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) 39 %tmp2 = getelementptr i32, i32* %A, i32 6 40 store i32* %tmp2, i32** %ptr 41 ret void 42 } 43 44 define void @vst3f(float* %A, <2 x float>* %B) nounwind { 45 ;CHECK-LABEL: vst3f: 46 ;CHECK: vst3.32 47 %tmp0 = bitcast float* %A to i8* 48 %tmp1 = load <2 x float>, <2 x float>* %B 49 call void @llvm.arm.neon.vst3.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) 50 ret void 51 } 52 53 define void @vst3i64(i64* %A, <1 x i64>* %B) nounwind { 54 ;CHECK-LABEL: vst3i64: 55 ;Check the alignment value. Max for this instruction is 64 bits: 56 ;This test runs at -O0 so do not check for specific register numbers. 57 ;CHECK: vst1.64 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}:64] 58 %tmp0 = bitcast i64* %A to i8* 59 %tmp1 = load <1 x i64>, <1 x i64>* %B 60 call void @llvm.arm.neon.vst3.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 16) 61 ret void 62 } 63 64 define void @vst3i64_update(i64** %ptr, <1 x i64>* %B) nounwind { 65 ;CHECK-LABEL: vst3i64_update 66 ;CHECK: vst1.64 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! 67 %A = load i64*, i64** %ptr 68 %tmp0 = bitcast i64* %A to i8* 69 %tmp1 = load <1 x i64>, <1 x i64>* %B 70 call void @llvm.arm.neon.vst3.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) 71 %tmp2 = getelementptr i64, i64* %A, i32 3 72 store i64* %tmp2, i64** %ptr 73 ret void 74 } 75 76 define void @vst3Qi8(i8* %A, <16 x i8>* %B) nounwind { 77 ;CHECK-LABEL: vst3Qi8: 78 ;Check the alignment value. Max for this instruction is 64 bits: 79 ;This test runs at -O0 so do not check for specific register numbers. 80 ;CHECK: vst3.8 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}:64]! 81 ;CHECK: vst3.8 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}:64] 82 %tmp1 = load <16 x i8>, <16 x i8>* %B 83 call void @llvm.arm.neon.vst3.p0i8.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 32) 84 ret void 85 } 86 87 define void @vst3Qi16(i16* %A, <8 x i16>* %B) nounwind { 88 ;CHECK-LABEL: vst3Qi16: 89 ;CHECK: vst3.16 90 ;CHECK: vst3.16 91 %tmp0 = bitcast i16* %A to i8* 92 %tmp1 = load <8 x i16>, <8 x i16>* %B 93 call void @llvm.arm.neon.vst3.p0i8.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) 94 ret void 95 } 96 97 ;Check for a post-increment updating store. 98 define void @vst3Qi16_update(i16** %ptr, <8 x i16>* %B) nounwind { 99 ;CHECK-LABEL: vst3Qi16_update: 100 ;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! 101 ;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! 102 %A = load i16*, i16** %ptr 103 %tmp0 = bitcast i16* %A to i8* 104 %tmp1 = load <8 x i16>, <8 x i16>* %B 105 call void @llvm.arm.neon.vst3.p0i8.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) 106 %tmp2 = getelementptr i16, i16* %A, i32 24 107 store i16* %tmp2, i16** %ptr 108 ret void 109 } 110 111 define void @vst3Qi32(i32* %A, <4 x i32>* %B) nounwind { 112 ;CHECK-LABEL: vst3Qi32: 113 ;CHECK: vst3.32 114 ;CHECK: vst3.32 115 %tmp0 = bitcast i32* %A to i8* 116 %tmp1 = load <4 x i32>, <4 x i32>* %B 117 call void @llvm.arm.neon.vst3.p0i8.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) 118 ret void 119 } 120 121 define void @vst3Qf(float* %A, <4 x float>* %B) nounwind { 122 ;CHECK-LABEL: vst3Qf: 123 ;CHECK: vst3.32 124 ;CHECK: vst3.32 125 %tmp0 = bitcast float* %A to i8* 126 %tmp1 = load <4 x float>, <4 x float>* %B 127 call void @llvm.arm.neon.vst3.p0i8.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) 128 ret void 129 } 130 131 declare void @llvm.arm.neon.vst3.p0i8.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind 132 declare void @llvm.arm.neon.vst3.p0i8.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind 133 declare void @llvm.arm.neon.vst3.p0i8.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind 134 declare void @llvm.arm.neon.vst3.p0i8.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind 135 declare void @llvm.arm.neon.vst3.p0i8.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind 136 137 declare void @llvm.arm.neon.vst3.p0i8.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind 138 declare void @llvm.arm.neon.vst3.p0i8.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind 139 declare void @llvm.arm.neon.vst3.p0i8.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind 140 declare void @llvm.arm.neon.vst3.p0i8.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind 141
