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      1 # RUN: not llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s
      2 
      3 --- |
      4 
      5   %struct.foo = type { float, [5 x i32] }
      6 
      7   @float_gv = internal unnamed_addr addrspace(2) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4
      8 
      9   define void @float(float addrspace(1)* %out, i32 %index) #0 {
     10   entry:
     11     %0 = getelementptr inbounds [5 x float], [5 x float] addrspace(2)* @float_gv, i32 0, i32 %index
     12     %1 = load float, float addrspace(2)* %0
     13     store float %1, float addrspace(1)* %out
     14     ret void
     15   }
     16 
     17   declare { i1, i64 } @llvm.SI.if(i1)
     18 
     19   declare { i1, i64 } @llvm.SI.else(i64)
     20 
     21   declare i64 @llvm.SI.break(i64)
     22 
     23   declare i64 @llvm.SI.if.break(i1, i64)
     24 
     25   declare i64 @llvm.SI.else.break(i64, i64)
     26 
     27   declare i1 @llvm.SI.loop(i64)
     28 
     29   declare void @llvm.SI.end.cf(i64)
     30 
     31   attributes #0 = { "target-cpu"="SI" }
     32 
     33 ...
     34 ---
     35 name:            float
     36 tracksSubRegLiveness: true
     37 liveins:
     38   - { reg: '%sgpr0_sgpr1' }
     39 frameInfo:
     40   maxAlignment:  8
     41 body: |
     42   bb.0.entry:
     43     liveins: %sgpr0_sgpr1
     44 
     45     %sgpr2_sgpr3 = S_GETPC_B64
     46   ; CHECK: [[@LINE+1]]:45: expected the name of the target index
     47     %sgpr2 = S_ADD_U32 %sgpr2, target-index(0), implicit-def %scc, implicit-def %scc
     48     %sgpr3 = S_ADDC_U32 %sgpr3, 0, implicit-def %scc, implicit %scc, implicit-def %scc, implicit %scc
     49     %sgpr4_sgpr5 = S_LSHR_B64 %sgpr2_sgpr3, 32, implicit-def dead %scc
     50     %sgpr6 = S_LOAD_DWORD_IMM %sgpr0_sgpr1, 11
     51     %sgpr7 = S_ASHR_I32 %sgpr6, 31, implicit-def dead %scc
     52     %sgpr6_sgpr7 = S_LSHL_B64 %sgpr6_sgpr7, 2, implicit-def dead %scc
     53     %sgpr2 = S_ADD_U32 %sgpr2, @float_gv, implicit-def %scc
     54     %sgpr3 = S_ADDC_U32 %sgpr4, 0, implicit-def dead %scc, implicit %scc
     55     %sgpr4 = S_ADD_U32 %sgpr2, %sgpr6, implicit-def %scc
     56     %sgpr5 = S_ADDC_U32 %sgpr3, %sgpr7, implicit-def dead %scc, implicit %scc
     57     %sgpr2 = S_LOAD_DWORD_IMM %sgpr4_sgpr5, 0
     58     %sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed %sgpr0_sgpr1, 9
     59     %sgpr7 = S_MOV_B32 61440
     60     %sgpr6 = S_MOV_B32 -1
     61     %vgpr0 = V_MOV_B32_e32 killed %sgpr2, implicit %exec
     62     BUFFER_STORE_DWORD_OFFSET killed %vgpr0, %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec
     63     S_ENDPGM
     64 ...
     65