1 ; RUN: llc -march=mips -mattr=-fp64 < %s | FileCheck -check-prefix=CHECK-FP32 %s 2 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck -check-prefix=CHECK-FP64 %s 3 4 ; This test case is a simplified version of an llvm-stress generated test with 5 ; seed=3718491962. 6 ; It originally failed on MIPS32 with FP64 with the following error: 7 ; LLVM ERROR: ran out of registers during register allocation 8 ; This was caused by impossible register class restrictions caused by the use 9 ; of BuildPairF64 instead of BuildPairF64_64. 10 11 define void @autogen_SD3718491962() { 12 BB: 13 ; CHECK-FP32: mtc1 $zero, $f{{[0-3]*[02468]}} 14 ; CHECK-FP32: mtc1 $zero, $f{{[0-3]*[13579]}} 15 16 ; CHECK-FP64: mtc1 $zero, $f{{[0-9]+}} 17 ; CHECK-FP64-NOT: mtc1 $zero, 18 ; FIXME: A redundant mthc1 is currently emitted. Add a -NOT when it is 19 ; eliminated 20 21 %Cmp = fcmp ule double 0.000000e+00, undef 22 %Cmp11 = fcmp ueq double 0xFDBD965CF1BB7FDA, undef 23 br label %CF88 24 25 CF88: ; preds = %CF86 26 %Sl18 = select i1 %Cmp, i1 %Cmp11, i1 %Cmp 27 br i1 %Sl18, label %CF88, label %CF85 28 29 CF85: ; preds = %CF88 30 ret void 31 } 32
