1 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ 2 ; RUN: -fast-isel-abort=1 | FileCheck %s \ 3 ; RUN: -check-prefix=ALL -check-prefix=32R1 4 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ 5 ; RUN: -fast-isel-abort=1 | FileCheck %s \ 6 ; RUN: -check-prefix=ALL -check-prefix=32R2 7 8 @a = global i16 -21829, align 2 9 @b = global i32 -1430532899, align 4 10 @a1 = common global i16 0, align 2 11 @b1 = common global i32 0, align 4 12 13 declare i16 @llvm.bswap.i16(i16) 14 declare i32 @llvm.bswap.i32(i32) 15 16 define void @b16() { 17 ; ALL-LABEL: b16: 18 19 ; ALL: lw $[[A_ADDR:[0-9]+]], %got(a)($[[GOT_ADDR:[0-9]+]]) 20 ; ALL: lhu $[[A_VAL:[0-9]+]], 0($[[A_ADDR]]) 21 22 ; 32R1: sll $[[TMP1:[0-9]+]], $[[A_VAL]], 8 23 ; 32R1: srl $[[TMP2:[0-9]+]], $[[A_VAL]], 8 24 ; 32R1: or $[[TMP3:[0-9]+]], $[[TMP1]], $[[TMP2]] 25 ; 32R1: andi $[[TMP4:[0-9]+]], $[[TMP3]], 65535 26 27 ; 32R2: wsbh $[[RESULT:[0-9]+]], $[[A_VAL]] 28 29 %1 = load i16, i16* @a, align 2 30 %2 = call i16 @llvm.bswap.i16(i16 %1) 31 store i16 %2, i16* @a1, align 2 32 ret void 33 } 34 35 define void @b32() { 36 ; ALL-LABEL: b32: 37 38 ; ALL: lw $[[B_ADDR:[0-9]+]], %got(b)($[[GOT_ADDR:[0-9]+]]) 39 ; ALL: lw $[[B_VAL:[0-9]+]], 0($[[B_ADDR]]) 40 41 ; 32R1: srl $[[TMP1:[0-9]+]], $[[B_VAL]], 8 42 ; 32R1: srl $[[TMP2:[0-9]+]], $[[B_VAL]], 24 43 ; 32R1: andi $[[TMP3:[0-9]+]], $[[TMP1]], 65280 44 ; 32R1: or $[[TMP4:[0-9]+]], $[[TMP2]], $[[TMP3]] 45 ; 32R1: andi $[[TMP5:[0-9]+]], $[[B_VAL]], 65280 46 ; 32R1: sll $[[TMP6:[0-9]+]], $[[TMP5]], 8 47 ; 32R1: sll $[[TMP7:[0-9]+]], $[[B_VAL]], 24 48 ; 32R1: or $[[TMP8:[0-9]+]], $[[TMP4]], $[[TMP6]] 49 ; 32R1: or $[[RESULT:[0-9]+]], $[[TMP7]], $[[TMP8]] 50 51 ; 32R2: wsbh $[[TMP:[0-9]+]], $[[B_VAL]] 52 ; 32R2: rotr $[[RESULT:[0-9]+]], $[[TMP]], 16 53 54 %1 = load i32, i32* @b, align 4 55 %2 = call i32 @llvm.bswap.i32(i32 %1) 56 store i32 %2, i32* @b1, align 4 57 ret void 58 } 59
