1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O2 -relocation-model=pic \ 2 ; RUN: -fast-isel -fast-isel-abort=1 | FileCheck %s 3 4 define i1 @sel_i1(i1 %j, i1 %k, i1 %l) { 5 entry: 6 ; CHECK-LABEL: sel_i1: 7 8 ; FIXME: The following instruction is redundant. 9 ; CHECK: xor $[[T0:[0-9]+]], $4, $zero 10 ; CHECK-NEXT: sltu $[[T1:[0-9]+]], $zero, $[[T0]] 11 ; CHECK-NEXT: andi $[[T2:[0-9]+]], $[[T1]], 1 12 ; CHECK-NEXT: movn $6, $5, $[[T2]] 13 ; CHECK: move $2, $6 14 %cond = icmp ne i1 %j, 0 15 %res = select i1 %cond, i1 %k, i1 %l 16 ret i1 %res 17 } 18 19 define i8 @sel_i8(i8 %j, i8 %k, i8 %l) { 20 entry: 21 ; CHECK-LABEL: sel_i8: 22 23 ; CHECK-DAG: seb $[[T0:[0-9]+]], $4 24 ; FIXME: The following 2 instructions are redundant. 25 ; CHECK-DAG: seb $[[T1:[0-9]+]], $zero 26 ; CHECK: xor $[[T2:[0-9]+]], $[[T0]], $[[T1]] 27 ; CHECK-NEXT: sltu $[[T3:[0-9]+]], $zero, $[[T2]] 28 ; CHECK-NEXT: andi $[[T4:[0-9]+]], $[[T3]], 1 29 ; CHECK-NEXT: movn $6, $5, $[[T4]] 30 ; CHECK: move $2, $6 31 %cond = icmp ne i8 %j, 0 32 %res = select i1 %cond, i8 %k, i8 %l 33 ret i8 %res 34 } 35 36 define i16 @sel_i16(i16 %j, i16 %k, i16 %l) { 37 entry: 38 ; CHECK-LABEL: sel_i16: 39 40 ; CHECK-DAG: seh $[[T0:[0-9]+]], $4 41 ; FIXME: The following 2 instructions are redundant. 42 ; CHECK-DAG: seh $[[T1:[0-9]+]], $zero 43 ; CHECK: xor $[[T2:[0-9]+]], $[[T0]], $[[T1]] 44 ; CHECK-NEXT: sltu $[[T3:[0-9]+]], $zero, $[[T2]] 45 ; CHECK-NEXT: andi $[[T4:[0-9]+]], $[[T3]], 1 46 ; CHECK-NEXT: movn $6, $5, $[[T4]] 47 ; CHECK: move $2, $6 48 %cond = icmp ne i16 %j, 0 49 %res = select i1 %cond, i16 %k, i16 %l 50 ret i16 %res 51 } 52 53 define i32 @sel_i32(i32 %j, i32 %k, i32 %l) { 54 entry: 55 ; CHECK-LABEL: sel_i32: 56 57 ; FIXME: The following instruction is redundant. 58 ; CHECK: xor $[[T0:[0-9]+]], $4, $zero 59 ; CHECK-NEXT: sltu $[[T1:[0-9]+]], $zero, $[[T0]] 60 ; CHECK-NEXT: andi $[[T2:[0-9]+]], $[[T1]], 1 61 ; CHECK-NEXT: movn $6, $5, $[[T2]] 62 ; CHECK: move $2, $6 63 %cond = icmp ne i32 %j, 0 64 %res = select i1 %cond, i32 %k, i32 %l 65 ret i32 %res 66 } 67 68 define float @sel_float(i32 %j, float %k, float %l) { 69 entry: 70 ; CHECK-LABEL: sel_float: 71 72 ; CHECK-DAG: mtc1 $6, $f0 73 ; CHECK-DAG: mtc1 $5, $f1 74 ; CHECK-DAG: xor $[[T0:[0-9]+]], $4, $zero 75 ; CHECK: sltu $[[T1:[0-9]+]], $zero, $[[T0]] 76 ; CHECK-NEXT: andi $[[T2:[0-9]+]], $[[T1]], 1 77 ; CHECK: movn.s $f0, $f1, $[[T2]] 78 %cond = icmp ne i32 %j, 0 79 %res = select i1 %cond, float %k, float %l 80 ret float %res 81 } 82 83 define double @sel_double(i32 %j, double %k, double %l) { 84 entry: 85 ; CHECK-LABEL: sel_double: 86 87 ; CHECK-DAG: mtc1 $6, $f2 88 ; CHECK-DAG: mthc1 $7, $f2 89 ; CHECK-DAG: ldc1 $f0, 16($sp) 90 ; CHECK-DAG: xor $[[T0:[0-9]+]], $4, $zero 91 ; CHECK: sltu $[[T1:[0-9]+]], $zero, $[[T0]] 92 ; CHECK-NEXT: andi $[[T2:[0-9]+]], $[[T1]], 1 93 ; CHECK: movn.d $f0, $f2, $[[T2]] 94 %cond = icmp ne i32 %j, 0 95 %res = select i1 %cond, double %k, double %l 96 ret double %res 97 } 98
