Home | History | Annotate | Download | only in Mips
      1 ; RUN: llc  < %s -march=mips64el -mcpu=mips4 -target-abi n64 | FileCheck %s -check-prefix=CHECK-N64
      2 ; RUN: llc  < %s -march=mips64el -mcpu=mips4 -target-abi n32 | FileCheck %s -check-prefix=CHECK-N32
      3 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -target-abi n64 | FileCheck %s -check-prefix=CHECK-N64
      4 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -target-abi n32 | FileCheck %s -check-prefix=CHECK-N32
      5 
      6 @c = common global i8 0, align 4
      7 @s = common global i16 0, align 4
      8 @i = common global i32 0, align 4
      9 @l = common global i64 0, align 8
     10 @uc = common global i8 0, align 4
     11 @us = common global i16 0, align 4
     12 @ui = common global i32 0, align 4
     13 @l1 = common global i64 0, align 8
     14 
     15 define i64 @func1() nounwind readonly {
     16 entry:
     17 ; CHECK-N64: func1
     18 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c)
     19 ; CHECK-N64: lb ${{[0-9]+}}, 0($[[R0]])
     20 ; CHECK-N32: func1
     21 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c)
     22 ; CHECK-N32: lb ${{[0-9]+}}, 0($[[R0]])
     23   %0 = load i8, i8* @c, align 4
     24   %conv = sext i8 %0 to i64
     25   ret i64 %conv
     26 }
     27 
     28 define i64 @func2() nounwind readonly {
     29 entry:
     30 ; CHECK-N64: func2
     31 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s)
     32 ; CHECK-N64: lh ${{[0-9]+}}, 0($[[R0]])
     33 ; CHECK-N32: func2
     34 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s)
     35 ; CHECK-N32: lh ${{[0-9]+}}, 0($[[R0]])
     36   %0 = load i16, i16* @s, align 4
     37   %conv = sext i16 %0 to i64
     38   ret i64 %conv
     39 }
     40 
     41 define i64 @func3() nounwind readonly {
     42 entry:
     43 ; CHECK-N64: func3
     44 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i)
     45 ; CHECK-N64: lw ${{[0-9]+}}, 0($[[R0]])
     46 ; CHECK-N32: func3
     47 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i)
     48 ; CHECK-N32: lw ${{[0-9]+}}, 0($[[R0]])
     49   %0 = load i32, i32* @i, align 4
     50   %conv = sext i32 %0 to i64
     51   ret i64 %conv
     52 }
     53 
     54 define i64 @func4() nounwind readonly {
     55 entry:
     56 ; CHECK-N64: func4
     57 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l)
     58 ; CHECK-N64: ld ${{[0-9]+}}, 0($[[R0]])
     59 ; CHECK-N32: func4
     60 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l)
     61 ; CHECK-N32: ld ${{[0-9]+}}, 0($[[R0]])
     62   %0 = load i64, i64* @l, align 8
     63   ret i64 %0
     64 }
     65 
     66 define i64 @ufunc1() nounwind readonly {
     67 entry:
     68 ; CHECK-N64: ufunc1
     69 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(uc)
     70 ; CHECK-N64: lbu ${{[0-9]+}}, 0($[[R0]])
     71 ; CHECK-N32: ufunc1
     72 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(uc)
     73 ; CHECK-N32: lbu ${{[0-9]+}}, 0($[[R0]])
     74   %0 = load i8, i8* @uc, align 4
     75   %conv = zext i8 %0 to i64
     76   ret i64 %conv
     77 }
     78 
     79 define i64 @ufunc2() nounwind readonly {
     80 entry:
     81 ; CHECK-N64: ufunc2
     82 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(us)
     83 ; CHECK-N64: lhu ${{[0-9]+}}, 0($[[R0]])
     84 ; CHECK-N32: ufunc2
     85 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(us)
     86 ; CHECK-N32: lhu ${{[0-9]+}}, 0($[[R0]])
     87   %0 = load i16, i16* @us, align 4
     88   %conv = zext i16 %0 to i64
     89   ret i64 %conv
     90 }
     91 
     92 define i64 @ufunc3() nounwind readonly {
     93 entry:
     94 ; CHECK-N64: ufunc3
     95 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(ui)
     96 ; CHECK-N64: lwu ${{[0-9]+}}, 0($[[R0]])
     97 ; CHECK-N32: ufunc3
     98 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(ui)
     99 ; CHECK-N32: lwu ${{[0-9]+}}, 0($[[R0]])
    100   %0 = load i32, i32* @ui, align 4
    101   %conv = zext i32 %0 to i64
    102   ret i64 %conv
    103 }
    104 
    105 define void @sfunc1() nounwind {
    106 entry:
    107 ; CHECK-N64: sfunc1
    108 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c)
    109 ; CHECK-N64: sb ${{[0-9]+}}, 0($[[R0]])
    110 ; CHECK-N32: sfunc1
    111 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c)
    112 ; CHECK-N32: sb ${{[0-9]+}}, 0($[[R0]])
    113   %0 = load i64, i64* @l1, align 8
    114   %conv = trunc i64 %0 to i8
    115   store i8 %conv, i8* @c, align 4
    116   ret void
    117 }
    118 
    119 define void @sfunc2() nounwind {
    120 entry:
    121 ; CHECK-N64: sfunc2
    122 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s)
    123 ; CHECK-N64: sh ${{[0-9]+}}, 0($[[R0]])
    124 ; CHECK-N32: sfunc2
    125 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s)
    126 ; CHECK-N32: sh ${{[0-9]+}}, 0($[[R0]])
    127   %0 = load i64, i64* @l1, align 8
    128   %conv = trunc i64 %0 to i16
    129   store i16 %conv, i16* @s, align 4
    130   ret void
    131 }
    132 
    133 define void @sfunc3() nounwind {
    134 entry:
    135 ; CHECK-N64: sfunc3
    136 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i)
    137 ; CHECK-N64: sw ${{[0-9]+}}, 0($[[R0]])
    138 ; CHECK-N32: sfunc3
    139 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i)
    140 ; CHECK-N32: sw ${{[0-9]+}}, 0($[[R0]])
    141   %0 = load i64, i64* @l1, align 8
    142   %conv = trunc i64 %0 to i32
    143   store i32 %conv, i32* @i, align 4
    144   ret void
    145 }
    146 
    147 define void @sfunc4() nounwind {
    148 entry:
    149 ; CHECK-N64: sfunc4
    150 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l)
    151 ; CHECK-N64: sd ${{[0-9]+}}, 0($[[R0]])
    152 ; CHECK-N32: sfunc4
    153 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l)
    154 ; CHECK-N32: sd ${{[0-9]+}}, 0($[[R0]])
    155   %0 = load i64, i64* @l1, align 8
    156   store i64 %0, i64* @l, align 8
    157   ret void
    158 }
    159 
    160