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      1 ; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s
      2 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s \
      3 ; RUN:  --check-prefix=CHECK-P7
      4 
      5 define signext i32 @f32toi32(float %a) {
      6 entry:
      7   %0 = bitcast float %a to i32
      8   ret i32 %0
      9 ; CHECK-P7: stfs 1,
     10 ; CHECK-P7: lwa 3,
     11 ; CHECK: xscvdpspn [[CONVREG:[0-9]+]], 1
     12 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[CONVREG]], [[CONVREG]], 3
     13 ; CHECK: mfvsrwz 3, [[SHIFTREG]]
     14 }
     15 
     16 define i64 @f64toi64(double %a) {
     17 entry:
     18   %0 = bitcast double %a to i64
     19   ret i64 %0
     20 ; CHECK-P7: stxsdx 1,
     21 ; CHECK-P7: ld 3,
     22 ; CHECK: mfvsrd 3, 1
     23 }
     24 
     25 define float @i32tof32(i32 signext %a) {
     26 entry:
     27   %0 = bitcast i32 %a to float
     28   ret float %0
     29 ; CHECK-P7: stw 3,
     30 ; CHECK-P7: lfs 1,
     31 ; CHECK: mtvsrd [[MOVEREG:[0-9]+]], 3
     32 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[MOVEREG]], [[MOVEREG]], 1
     33 ; CHECK: xscvspdpn 1, [[SHIFTREG]]
     34 }
     35 
     36 define double @i64tof64(i64 %a) {
     37 entry:
     38   %0 = bitcast i64 %a to double
     39   ret double %0
     40 ; CHECK-P7: std 3,
     41 ; CHECK-P7: lxsdx 1,
     42 ; CHECK: mtvsrd 1, 3
     43 }
     44 
     45 define zeroext i32 @f32toi32u(float %a) {
     46 entry:
     47   %0 = bitcast float %a to i32
     48   ret i32 %0
     49 ; CHECK-P7: stfs 1,
     50 ; CHECK-P7: lwz 3,
     51 ; CHECK: xscvdpspn [[CONVREG:[0-9]+]], 1
     52 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[CONVREG]], [[CONVREG]], 3
     53 ; CHECK: mfvsrwz 3, [[SHIFTREG]]
     54 }
     55 
     56 define i64 @f64toi64u(double %a) {
     57 entry:
     58   %0 = bitcast double %a to i64
     59   ret i64 %0
     60 ; CHECK-P7: stxsdx 1,
     61 ; CHECK-P7: ld 3,
     62 ; CHECK: mfvsrd 3, 1
     63 }
     64 
     65 define float @i32utof32(i32 zeroext %a) {
     66 entry:
     67   %0 = bitcast i32 %a to float
     68   ret float %0
     69 ; CHECK-P7: stw 3,
     70 ; CHECK-P7: lfs 1,
     71 ; CHECK: mtvsrd [[MOVEREG:[0-9]+]], 3
     72 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[MOVEREG]], [[MOVEREG]], 1
     73 ; CHECK: xscvspdpn 1, [[SHIFTREG]]
     74 }
     75 
     76 define double @i64utof64(i64 %a) {
     77 entry:
     78   %0 = bitcast i64 %a to double
     79   ret double %0
     80 ; CHECK-P7: std 3,
     81 ; CHECK-P7: lxsdx 1,
     82 ; CHECK: mtvsrd 1, 3
     83 }
     84