1 ; RUN: llc -O0 -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 2 ; Function Attrs: nounwind 3 define void @test() { 4 entry: 5 %__a.addr.i = alloca i32, align 4 6 %__b.addr.i = alloca <4 x i32>*, align 8 7 %i = alloca <4 x i32>, align 16 8 %j = alloca <4 x i32>, align 16 9 store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32>* %i, align 16 10 store i32 0, i32* %__a.addr.i, align 4 11 store <4 x i32>* %i, <4 x i32>** %__b.addr.i, align 8 12 %0 = load i32, i32* %__a.addr.i, align 4 13 %1 = load <4 x i32>*, <4 x i32>** %__b.addr.i, align 8 14 %2 = bitcast <4 x i32>* %1 to i8* 15 %3 = getelementptr i8, i8* %2, i32 %0 16 %4 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %3) 17 ; CHECK: lwa [[REG0:[0-9]+]], 18 ; CHECK: lxvd2x [[REG1:[0-9]+]], {{[0-9]+}}, [[REG0]] 19 ; CHECK: xxswapd [[REG1]], [[REG1]] 20 store <4 x i32> %4, <4 x i32>* %j, align 16 21 ret void 22 } 23 24 ; Function Attrs: nounwind readonly 25 declare <4 x i32> @llvm.ppc.vsx.lxvw4x(i8*) 26
