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      1 ; RUN: llc < %s -mcpu=g5 | FileCheck %s
      2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
      3 target triple = "powerpc64-unknown-linux-gnu"
      4 
      5 define void @foo(float* noalias nocapture %a, float* noalias nocapture %b) #0 {
      6 vector.ph:
      7   br label %vector.body
      8 
      9 vector.body:                                      ; preds = %vector.body, %vector.ph
     10   %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
     11   %0 = getelementptr inbounds float, float* %b, i64 %index
     12   %1 = bitcast float* %0 to <4 x float>*
     13   %wide.load = load <4 x float>, <4 x float>* %1, align 4
     14   %.sum11 = or i64 %index, 4
     15   %2 = getelementptr float, float* %b, i64 %.sum11
     16   %3 = bitcast float* %2 to <4 x float>*
     17   %wide.load8 = load <4 x float>, <4 x float>* %3, align 4
     18   %4 = fadd <4 x float> %wide.load, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
     19   %5 = fadd <4 x float> %wide.load8, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
     20   %6 = getelementptr inbounds float, float* %a, i64 %index
     21   %7 = bitcast float* %6 to <4 x float>*
     22   store <4 x float> %4, <4 x float>* %7, align 4
     23   %.sum12 = or i64 %index, 4
     24   %8 = getelementptr float, float* %a, i64 %.sum12
     25   %9 = bitcast float* %8 to <4 x float>*
     26   store <4 x float> %5, <4 x float>* %9, align 4
     27   %index.next = add i64 %index, 8
     28   %10 = icmp eq i64 %index.next, 16000
     29   br i1 %10, label %for.end, label %vector.body
     30 
     31 ; CHECK: @foo
     32 ; CHECK-DAG: li [[C0:[0-9]+]], 0
     33 ; CHECK-DAG: li [[C16:[0-9]+]], 16
     34 ; CHECK-DAG: li [[C31:[0-9]+]], 31
     35 ; CHECK-DAG: lvx [[CNST:[0-9]+]],
     36 ; CHECK: .LBB0_1:
     37 ; CHECK-DAG: lvsl [[PC:[0-9]+]], [[B1:[0-9]+]], [[C0]]
     38 ; CHECK-DAG: lvx [[LD1:[0-9]+]], [[B1]], [[C0]]
     39 ; CHECK-DAG: add [[B3:[0-9]+]], [[B1]], [[C0]]
     40 ; CHECK-DAG: lvx [[LD2:[0-9]+]], [[B3]], [[C16]]
     41 ; CHECK-DAG: lvx [[LD3:[0-9]+]], [[B3]], [[C31]]
     42 ; CHECK-DAG: vperm [[R1:[0-9]+]], [[LD1]], [[LD2]], [[PC]]
     43 ; CHECK-DAG: vperm [[R2:[0-9]+]], [[LD2]], [[LD3]], [[PC]]
     44 ; CHECK-DAG: vaddfp {{[0-9]+}}, [[R1]], [[CNST]]
     45 ; CHECK-DAG: vaddfp {{[0-9]+}}, [[R2]], [[CNST]]
     46 ; CHECK: blr
     47 
     48 for.end:                                          ; preds = %vector.body
     49   ret void
     50 }
     51 
     52 attributes #0 = { nounwind }
     53