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      1 ; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s | FileCheck %s
      2 ; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-REG %s
      3 ; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s | FileCheck %s
      4 ; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s | FileCheck -check-prefix=CHECK-FISL %s
      5 target datalayout = "E-m:e-i64:64-n32:64"
      6 target triple = "powerpc64-unknown-linux-gnu"
      7 
      8 define double @foo1(double %a) nounwind {
      9 entry:
     10   call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
     11   br label %return
     12 
     13 ; CHECK-REG: @foo1
     14 ; CHECK-REG: xxlor [[R1:[0-9]+]], 1, 1
     15 ; CHECK-REG: xxlor 1, [[R1]], [[R1]]
     16 ; CHECK-REG: blr
     17 
     18 ; CHECK-FISL: @foo1
     19 ; CHECK-FISL: lis 0, -1
     20 ; CHECK-FISL: ori 0, 0, 65384
     21 ; CHECK-FISL: stxsdx 1, 1, 0
     22 ; CHECK-FISL: blr
     23 
     24 return:                                           ; preds = %entry
     25   ret double %a
     26 }
     27 
     28 define double @foo2(double %a) nounwind {
     29 entry:
     30   %b = fadd double %a, %a
     31   call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
     32   br label %return
     33 
     34 ; CHECK-REG: @foo2
     35 ; CHECK-REG: {{xxlor|xsadddp}} [[R1:[0-9]+]], 1, 1
     36 ; CHECK-REG: {{xxlor|xsadddp}} 1, [[R1]], [[R1]]
     37 ; CHECK-REG: blr
     38 
     39 ; CHECK-FISL: @foo2
     40 ; CHECK-FISL: xsadddp [[R1:[0-9]+]], 1, 1
     41 ; CHECK-FISL: stxsdx [[R1]], [[R1]], 0
     42 ; CHECK-FISL: lxsdx [[R1]], [[R1]], 0
     43 ; CHECK-FISL: blr
     44 
     45 return:                                           ; preds = %entry
     46   ret double %b
     47 }
     48 
     49 define double @foo3(double %a) nounwind {
     50 entry:
     51   call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"() nounwind
     52   br label %return
     53 
     54 ; CHECK: @foo3
     55 ; CHECK: stxsdx 1,
     56 ; CHECK: lxsdx [[R1:[0-9]+]],
     57 ; CHECK: xsadddp 1, [[R1]], [[R1]]
     58 ; CHECK: blr
     59 
     60 return:                                           ; preds = %entry
     61   %b = fadd double %a, %a
     62   ret double %b
     63 }
     64 
     65