1 ; RUN: llc -march=sparc <%s | FileCheck %s 2 3 ; CHECK-LABEL: test_constraint_r 4 ; CHECK: add %o1, %o0, %o0 5 define i32 @test_constraint_r(i32 %a, i32 %b) { 6 entry: 7 %0 = tail call i32 asm sideeffect "add $2, $1, $0", "=r,r,r"(i32 %a, i32 %b) 8 ret i32 %0 9 } 10 11 ; CHECK-LABEL: test_constraint_I: 12 ; CHECK: add %o0, 1023, %o0 13 define i32 @test_constraint_I(i32 %a) { 14 entry: 15 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 1023) 16 ret i32 %0 17 } 18 19 ; CHECK-LABEL: test_constraint_I_neg: 20 ; CHECK: add %o0, -4096, %o0 21 define i32 @test_constraint_I_neg(i32 %a) { 22 entry: 23 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 -4096) 24 ret i32 %0 25 } 26 27 ; CHECK-LABEL: test_constraint_I_largeimm: 28 ; CHECK: sethi 9, [[R0:%[gilo][0-7]]] 29 ; CHECK: or [[R0]], 784, [[R1:%[gilo][0-7]]] 30 ; CHECK: add %o0, [[R1]], %o0 31 define i32 @test_constraint_I_largeimm(i32 %a) { 32 entry: 33 %0 = tail call i32 asm sideeffect "add $1, $2, $0", "=r,r,rI"(i32 %a, i32 10000) 34 ret i32 %0 35 } 36 37 ; CHECK-LABEL: test_constraint_reg: 38 ; CHECK: ldda [%o1] 43, %g2 39 ; CHECK: ldda [%o1] 43, %g4 40 define void @test_constraint_reg(i32 %s, i32* %ptr) { 41 entry: 42 %0 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={r2},r,n"(i32* %ptr, i32 43) 43 %1 = tail call i64 asm sideeffect "ldda [$1] $2, $0", "={g4},r,n"(i32* %ptr, i32 43) 44 ret void 45 } 46 47 ;; Ensure that i64 args to asm are allocated to the IntPair register class. 48 ;; Also checks that register renaming for leaf proc works. 49 ; CHECK-LABEL: test_constraint_r_i64: 50 ; CHECK: mov %o0, %o5 51 ; CHECK: sra %o5, 31, %o4 52 ; CHECK: std %o4, [%o1] 53 define i32 @test_constraint_r_i64(i32 %foo, i64* %out, i32 %o) { 54 entry: 55 %conv = sext i32 %foo to i64 56 tail call void asm sideeffect "std $0, [$1]", "r,r,~{memory}"(i64 %conv, i64* %out) 57 ret i32 %o 58 } 59 60 ;; Same test without leaf-proc opt 61 ; CHECK-LABEL: test_constraint_r_i64_noleaf: 62 ; CHECK: mov %i0, %i5 63 ; CHECK: sra %i5, 31, %i4 64 ; CHECK: std %i4, [%i1] 65 define i32 @test_constraint_r_i64_noleaf(i32 %foo, i64* %out, i32 %o) #0 { 66 entry: 67 %conv = sext i32 %foo to i64 68 tail call void asm sideeffect "std $0, [$1]", "r,r,~{memory}"(i64 %conv, i64* %out) 69 ret i32 %o 70 } 71 attributes #0 = { "no-frame-pointer-elim"="true" } 72 73 ;; Ensures that tied in and out gets allocated properly. 74 ; CHECK-LABEL: test_i64_inout: 75 ; CHECK: sethi 0, %o2 76 ; CHECK: mov 5, %o3 77 ; CHECK: xor %o2, %g0, %o2 78 ; CHECK: mov %o2, %o0 79 ; CHECK: ret 80 define i64 @test_i64_inout() { 81 entry: 82 %0 = call i64 asm sideeffect "xor $1, %g0, $0", "=r,0,~{i1}"(i64 5); 83 ret i64 %0 84 } 85
