1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s 2 3 @x = common global <8 x float> zeroinitializer, align 32 4 @y = common global <4 x double> zeroinitializer, align 32 5 @z = common global <4 x float> zeroinitializer, align 16 6 7 define void @zero128() nounwind ssp { 8 entry: 9 ; CHECK: vxorps 10 ; CHECK: vmovaps 11 store <4 x float> zeroinitializer, <4 x float>* @z, align 16 12 ret void 13 } 14 15 define void @zero256() nounwind ssp { 16 entry: 17 ; CHECK: vxorps 18 ; CHECK: vmovaps 19 ; CHECK: vmovaps 20 store <8 x float> zeroinitializer, <8 x float>* @x, align 32 21 store <4 x double> zeroinitializer, <4 x double>* @y, align 32 22 ret void 23 } 24 25 ; CHECK: vpcmpeqd 26 ; CHECK: vinsertf128 $1 27 define void @ones([0 x float]* nocapture %RET, [0 x float]* nocapture %aFOO) nounwind { 28 allocas: 29 %ptr2vec615 = bitcast [0 x float]* %RET to <8 x float>* 30 store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 31 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 32 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <8 x 33 float>* %ptr2vec615, align 32 34 ret void 35 } 36 37 ; CHECK: vpcmpeqd 38 ; CHECK: vinsertf128 $1 39 define void @ones2([0 x i32]* nocapture %RET, [0 x i32]* nocapture %aFOO) nounwind { 40 allocas: 41 %ptr2vec615 = bitcast [0 x i32]* %RET to <8 x i32>* 42 store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32>* %ptr2vec615, align 32 43 ret void 44 } 45 46 ;;; Just make sure this doesn't crash 47 ; CHECK: _ISelCrash 48 define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp { 49 entry: 50 %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4> 51 ret <4 x i64> %shuffle 52 } 53 54 ;;; Don't crash on movd 55 ; CHECK: _VMOVZQI2PQI 56 ; CHECK: vmovd (% 57 define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind { 58 allocas: 59 %ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32* 60 %val.i34.i = load i32, i32* %ptrcast.i33.i, align 4 61 %ptroffset.i22.i992 = getelementptr [0 x float], [0 x float]* %aFOO, i64 0, i64 1 62 %ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32* 63 %val.i24.i = load i32, i32* %ptrcast.i23.i, align 4 64 %updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1 65 ret <8 x i32> %updatedret.i30.i 66 } 67 68 ;;;; Don't crash on fneg 69 ; rdar://10566486 70 ; CHECK: fneg 71 ; CHECK: vxorps 72 define <16 x float> @fneg(<16 x float> %a) nounwind { 73 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a 74 ret <16 x float> %1 75 } 76 77 ;;; Don't crash on build vector 78 ; CHECK: @build_vec_16x16 79 ; CHECK: vmovd 80 define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly { 81 %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0 82 ret <16 x i16> %res 83 } 84 85 ;;; Check that VMOVPQIto64rr generates the assembly string "vmovq". Previously 86 ;;; an incorrect mnemonic of "movd" was printed for this instruction. 87 ; CHECK: VMOVPQIto64rr 88 ; CHECK: vmovq 89 define i64 @VMOVPQIto64rr(<2 x i64> %a) { 90 entry: 91 %vecext.i = extractelement <2 x i64> %a, i32 0 92 ret i64 %vecext.i 93 } 94 95 ; PR22685 96 ; CHECK: mov00 97 ; CHECK: vmovss 98 define <8 x float> @mov00_8f32(float* %ptr) { 99 %val = load float, float* %ptr 100 %vec = insertelement <8 x float> zeroinitializer, float %val, i32 0 101 ret <8 x float> %vec 102 } 103
