1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=X32 3 ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=X64 4 5 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse4a-builtins.c 6 7 define <2 x i64> @test_mm_extracti_si64(<2 x i64> %x) { 8 ; X32-LABEL: test_mm_extracti_si64: 9 ; X32: # BB#0: 10 ; X32-NEXT: extrq $2, $3, %xmm0 11 ; X32-NEXT: retl 12 ; 13 ; X64-LABEL: test_mm_extracti_si64: 14 ; X64: # BB#0: 15 ; X64-NEXT: extrq $2, $3, %xmm0 16 ; X64-NEXT: retq 17 %res = call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2) 18 ret <2 x i64> %res 19 } 20 declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind readnone 21 22 define <2 x i64> @test_mm_extract_si64(<2 x i64> %x, <2 x i64> %y) { 23 ; X32-LABEL: test_mm_extract_si64: 24 ; X32: # BB#0: 25 ; X32-NEXT: extrq %xmm1, %xmm0 26 ; X32-NEXT: retl 27 ; 28 ; X64-LABEL: test_mm_extract_si64: 29 ; X64: # BB#0: 30 ; X64-NEXT: extrq %xmm1, %xmm0 31 ; X64-NEXT: retq 32 %bc = bitcast <2 x i64> %y to <16 x i8> 33 %res = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %bc) 34 ret <2 x i64> %res 35 } 36 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind readnone 37 38 define <2 x i64> @test_mm_inserti_si64(<2 x i64> %x, <2 x i64> %y) { 39 ; X32-LABEL: test_mm_inserti_si64: 40 ; X32: # BB#0: 41 ; X32-NEXT: insertq $6, $5, %xmm1, %xmm0 42 ; X32-NEXT: retl 43 ; 44 ; X64-LABEL: test_mm_inserti_si64: 45 ; X64: # BB#0: 46 ; X64-NEXT: insertq $6, $5, %xmm1, %xmm0 47 ; X64-NEXT: retq 48 %res = call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6) 49 ret <2 x i64> %res 50 } 51 declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind readnone 52 53 define <2 x i64> @test_mm_insert_si64(<2 x i64> %x, <2 x i64> %y) { 54 ; X32-LABEL: test_mm_insert_si64: 55 ; X32: # BB#0: 56 ; X32-NEXT: insertq %xmm1, %xmm0 57 ; X32-NEXT: retl 58 ; 59 ; X64-LABEL: test_mm_insert_si64: 60 ; X64: # BB#0: 61 ; X64-NEXT: insertq %xmm1, %xmm0 62 ; X64-NEXT: retq 63 %res = call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) 64 ret <2 x i64> %res 65 } 66 declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind readnone 67 68 define void @test_stream_sd(i8* %p, <2 x double> %a) { 69 ; X32-LABEL: test_stream_sd: 70 ; X32: # BB#0: 71 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 72 ; X32-NEXT: movntsd %xmm0, (%eax) 73 ; X32-NEXT: retl 74 ; 75 ; X64-LABEL: test_stream_sd: 76 ; X64: # BB#0: 77 ; X64-NEXT: movntsd %xmm0, (%rdi) 78 ; X64-NEXT: retq 79 call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) 80 ret void 81 } 82 declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>) nounwind readnone 83 84 define void @test_mm_stream_ss(i8* %p, <4 x float> %a) { 85 ; X32-LABEL: test_mm_stream_ss: 86 ; X32: # BB#0: 87 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 88 ; X32-NEXT: movntss %xmm0, (%eax) 89 ; X32-NEXT: retl 90 ; 91 ; X64-LABEL: test_mm_stream_ss: 92 ; X64: # BB#0: 93 ; X64-NEXT: movntss %xmm0, (%rdi) 94 ; X64-NEXT: retq 95 call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) 96 ret void 97 } 98 declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>) nounwind readnone 99
