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      1 @ RUN: not llvm-mc -triple thumbv8 -mattr=+neon,+crypto -show-encoding < %s 2>&1 | FileCheck %s
      2 
      3 iteee lo
      4 aesdlo.8  q0, q1
      5 @ CHECK: error: instruction 'aesd' is not predicable, but condition code specified
      6 aesimchs.8  q0, q1
      7 @ CHECK: error: instruction 'aesimc' is not predicable, but condition code specified
      8 aesmchs.8  q0, q1
      9 @ CHECK: error: instruction 'aesmc' is not predicable, but condition code specified
     10 aesehs.8 q0, q1
     11 @ CHECK: error: instruction 'aese' is not predicable, but condition code specified
     12 
     13 itee hs
     14 sha1hhs.32  q0, q1
     15 @ CHECK: error: instruction 'sha1h' is not predicable, but condition code specified
     16 sha1su1lo.32  q0, q1
     17 @ CHECK: error: instruction 'sha1su1' is not predicable, but condition code specified
     18 sha256su0lo.32  q0, q1
     19 @ CHECK: error: instruction 'sha256su0' is not predicable, but condition code specified
     20 
     21 iteee lo
     22 sha1clo.32  s0, d1, q2
     23 @ CHECK: error: instruction 'sha1c' is not predicable, but condition code specified
     24 sha1mhs.32  q0, s1, q2
     25 @ CHECK: error: instruction 'sha1m' is not predicable, but condition code specified
     26 sha1phs.32  s0, q1, q2
     27 @ CHECK: error: instruction 'sha1p' is not predicable, but condition code specified
     28 sha1su0hs.32  d0, q1, q2
     29 @ CHECK: error: instruction 'sha1su0' is not predicable, but condition code specified
     30 itee hs
     31 sha256hhs.32  q0, s1, q2
     32 @ CHECK: error: instruction 'sha256h' is not predicable, but condition code specified
     33 sha256h2lo.32  q0, q1, s2
     34 @ CHECK: error: instruction 'sha256h2' is not predicable, but condition code specified
     35 sha256su1lo.32  s0, d1, q2
     36 @ CHECK: error: instruction 'sha256su1' is not predicable, but condition code specified
     37 
     38 ite lo
     39 vmulllo.p64 q0, s1, s3
     40 @ CHECK: error: instruction 'vmull' is not predicable, but condition code specified
     41 vmullhs.p64 q0, d16, d17
     42 @ CHECK: error: instruction 'vmull' is not predicable, but condition code specified
     43