1 // Copyright 2013 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #include "src/base/cpu.h" 6 7 #if V8_LIBC_MSVCRT 8 #include <intrin.h> // __cpuid() 9 #endif 10 #if V8_OS_LINUX 11 #include <linux/auxvec.h> // AT_HWCAP 12 #endif 13 #if V8_GLIBC_PREREQ(2, 16) 14 #include <sys/auxv.h> // getauxval() 15 #endif 16 #if V8_OS_QNX 17 #include <sys/syspage.h> // cpuinfo 18 #endif 19 #if V8_OS_LINUX && V8_HOST_ARCH_PPC 20 #include <elf.h> 21 #endif 22 #if V8_OS_AIX 23 #include <sys/systemcfg.h> // _system_configuration 24 #ifndef POWER_8 25 #define POWER_8 0x10000 26 #endif 27 #endif 28 #if V8_OS_POSIX 29 #include <unistd.h> // sysconf() 30 #endif 31 32 #include <ctype.h> 33 #include <limits.h> 34 #include <stdio.h> 35 #include <stdlib.h> 36 #include <string.h> 37 #include <algorithm> 38 39 #include "src/base/logging.h" 40 #if V8_OS_WIN 41 #include "src/base/win32-headers.h" // NOLINT 42 #endif 43 44 namespace v8 { 45 namespace base { 46 47 #if defined(__pnacl__) 48 // Portable host shouldn't do feature detection. 49 #elif V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 50 51 // Define __cpuid() for non-MSVC libraries. 52 #if !V8_LIBC_MSVCRT 53 54 static V8_INLINE void __cpuid(int cpu_info[4], int info_type) { 55 // Clear ecx to align with __cpuid() of MSVC: 56 // https://msdn.microsoft.com/en-us/library/hskdteyh.aspx 57 #if defined(__i386__) && defined(__pic__) 58 // Make sure to preserve ebx, which contains the pointer 59 // to the GOT in case we're generating PIC. 60 __asm__ volatile( 61 "mov %%ebx, %%edi\n\t" 62 "cpuid\n\t" 63 "xchg %%edi, %%ebx\n\t" 64 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), 65 "=d"(cpu_info[3]) 66 : "a"(info_type), "c"(0)); 67 #else 68 __asm__ volatile("cpuid \n\t" 69 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), 70 "=d"(cpu_info[3]) 71 : "a"(info_type), "c"(0)); 72 #endif // defined(__i386__) && defined(__pic__) 73 } 74 75 #endif // !V8_LIBC_MSVCRT 76 77 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \ 78 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 79 80 #if V8_OS_LINUX 81 82 #if V8_HOST_ARCH_ARM 83 84 // See <uapi/asm/hwcap.h> kernel header. 85 /* 86 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP 87 */ 88 #define HWCAP_SWP (1 << 0) 89 #define HWCAP_HALF (1 << 1) 90 #define HWCAP_THUMB (1 << 2) 91 #define HWCAP_26BIT (1 << 3) /* Play it safe */ 92 #define HWCAP_FAST_MULT (1 << 4) 93 #define HWCAP_FPA (1 << 5) 94 #define HWCAP_VFP (1 << 6) 95 #define HWCAP_EDSP (1 << 7) 96 #define HWCAP_JAVA (1 << 8) 97 #define HWCAP_IWMMXT (1 << 9) 98 #define HWCAP_CRUNCH (1 << 10) 99 #define HWCAP_THUMBEE (1 << 11) 100 #define HWCAP_NEON (1 << 12) 101 #define HWCAP_VFPv3 (1 << 13) 102 #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ 103 #define HWCAP_TLS (1 << 15) 104 #define HWCAP_VFPv4 (1 << 16) 105 #define HWCAP_IDIVA (1 << 17) 106 #define HWCAP_IDIVT (1 << 18) 107 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ 108 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 109 #define HWCAP_LPAE (1 << 20) 110 111 static uint32_t ReadELFHWCaps() { 112 uint32_t result = 0; 113 #if V8_GLIBC_PREREQ(2, 16) 114 result = static_cast<uint32_t>(getauxval(AT_HWCAP)); 115 #else 116 // Read the ELF HWCAP flags by parsing /proc/self/auxv. 117 FILE* fp = fopen("/proc/self/auxv", "r"); 118 if (fp != NULL) { 119 struct { uint32_t tag; uint32_t value; } entry; 120 for (;;) { 121 size_t n = fread(&entry, sizeof(entry), 1, fp); 122 if (n == 0 || (entry.tag == 0 && entry.value == 0)) { 123 break; 124 } 125 if (entry.tag == AT_HWCAP) { 126 result = entry.value; 127 break; 128 } 129 } 130 fclose(fp); 131 } 132 #endif 133 return result; 134 } 135 136 #endif // V8_HOST_ARCH_ARM 137 138 #if V8_HOST_ARCH_MIPS 139 int __detect_fp64_mode(void) { 140 double result = 0; 141 // Bit representation of (double)1 is 0x3FF0000000000000. 142 __asm__ volatile( 143 ".set push\n\t" 144 ".set noreorder\n\t" 145 ".set oddspreg\n\t" 146 "lui $t0, 0x3FF0\n\t" 147 "ldc1 $f0, %0\n\t" 148 "mtc1 $t0, $f1\n\t" 149 "sdc1 $f0, %0\n\t" 150 ".set pop\n\t" 151 : "+m"(result) 152 : 153 : "t0", "$f0", "$f1", "memory"); 154 155 return !(result == 1); 156 } 157 158 159 int __detect_mips_arch_revision(void) { 160 // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips 161 // kernel. 162 uint32_t result = 0; 163 __asm__ volatile( 164 "move $v0, $zero\n\t" 165 // Encoding for "addi $v0, $v0, 1" on non-r6, 166 // which is encoding for "bovc $v0, %v0, 1" on r6. 167 // Use machine code directly to avoid compilation errors with different 168 // toolchains and maintain compatibility. 169 ".word 0x20420001\n\t" 170 "sw $v0, %0\n\t" 171 : "=m"(result) 172 : 173 : "v0", "memory"); 174 // Result is 0 on r6 architectures, 1 on other architecture revisions. 175 // Fall-back to the least common denominator which is mips32 revision 1. 176 return result ? 1 : 6; 177 } 178 #endif 179 180 // Extract the information exposed by the kernel via /proc/cpuinfo. 181 class CPUInfo final { 182 public: 183 CPUInfo() : datalen_(0) { 184 // Get the size of the cpuinfo file by reading it until the end. This is 185 // required because files under /proc do not always return a valid size 186 // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed. 187 static const char PATHNAME[] = "/proc/cpuinfo"; 188 FILE* fp = fopen(PATHNAME, "r"); 189 if (fp != NULL) { 190 for (;;) { 191 char buffer[256]; 192 size_t n = fread(buffer, 1, sizeof(buffer), fp); 193 if (n == 0) { 194 break; 195 } 196 datalen_ += n; 197 } 198 fclose(fp); 199 } 200 201 // Read the contents of the cpuinfo file. 202 data_ = new char[datalen_ + 1]; 203 fp = fopen(PATHNAME, "r"); 204 if (fp != NULL) { 205 for (size_t offset = 0; offset < datalen_; ) { 206 size_t n = fread(data_ + offset, 1, datalen_ - offset, fp); 207 if (n == 0) { 208 break; 209 } 210 offset += n; 211 } 212 fclose(fp); 213 } 214 215 // Zero-terminate the data. 216 data_[datalen_] = '\0'; 217 } 218 219 ~CPUInfo() { 220 delete[] data_; 221 } 222 223 // Extract the content of a the first occurence of a given field in 224 // the content of the cpuinfo file and return it as a heap-allocated 225 // string that must be freed by the caller using delete[]. 226 // Return NULL if not found. 227 char* ExtractField(const char* field) const { 228 DCHECK(field != NULL); 229 230 // Look for first field occurence, and ensure it starts the line. 231 size_t fieldlen = strlen(field); 232 char* p = data_; 233 for (;;) { 234 p = strstr(p, field); 235 if (p == NULL) { 236 return NULL; 237 } 238 if (p == data_ || p[-1] == '\n') { 239 break; 240 } 241 p += fieldlen; 242 } 243 244 // Skip to the first colon followed by a space. 245 p = strchr(p + fieldlen, ':'); 246 if (p == NULL || !isspace(p[1])) { 247 return NULL; 248 } 249 p += 2; 250 251 // Find the end of the line. 252 char* q = strchr(p, '\n'); 253 if (q == NULL) { 254 q = data_ + datalen_; 255 } 256 257 // Copy the line into a heap-allocated buffer. 258 size_t len = q - p; 259 char* result = new char[len + 1]; 260 if (result != NULL) { 261 memcpy(result, p, len); 262 result[len] = '\0'; 263 } 264 return result; 265 } 266 267 private: 268 char* data_; 269 size_t datalen_; 270 }; 271 272 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 273 274 // Checks that a space-separated list of items contains one given 'item'. 275 static bool HasListItem(const char* list, const char* item) { 276 ssize_t item_len = strlen(item); 277 const char* p = list; 278 if (p != NULL) { 279 while (*p != '\0') { 280 // Skip whitespace. 281 while (isspace(*p)) ++p; 282 283 // Find end of current list item. 284 const char* q = p; 285 while (*q != '\0' && !isspace(*q)) ++q; 286 287 if (item_len == q - p && memcmp(p, item, item_len) == 0) { 288 return true; 289 } 290 291 // Skip to next item. 292 p = q; 293 } 294 } 295 return false; 296 } 297 298 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 299 300 #endif // V8_OS_LINUX 301 302 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 303 304 CPU::CPU() 305 : stepping_(0), 306 model_(0), 307 ext_model_(0), 308 family_(0), 309 ext_family_(0), 310 type_(0), 311 implementer_(0), 312 architecture_(0), 313 variant_(-1), 314 part_(0), 315 has_fpu_(false), 316 has_cmov_(false), 317 has_sahf_(false), 318 has_mmx_(false), 319 has_sse_(false), 320 has_sse2_(false), 321 has_sse3_(false), 322 has_ssse3_(false), 323 has_sse41_(false), 324 has_sse42_(false), 325 is_atom_(false), 326 has_osxsave_(false), 327 has_avx_(false), 328 has_fma3_(false), 329 has_bmi1_(false), 330 has_bmi2_(false), 331 has_lzcnt_(false), 332 has_popcnt_(false), 333 has_idiva_(false), 334 has_neon_(false), 335 has_thumb2_(false), 336 has_vfp_(false), 337 has_vfp3_(false), 338 has_vfp3_d32_(false), 339 is_fp64_mode_(false) { 340 memcpy(vendor_, "Unknown", 8); 341 #if V8_OS_NACL 342 // Portable host shouldn't do feature detection. 343 // TODO(jfb): Remove the hardcoded ARM simulator flags in the build, and 344 // hardcode them here instead. 345 #elif V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 346 int cpu_info[4]; 347 348 // __cpuid with an InfoType argument of 0 returns the number of 349 // valid Ids in CPUInfo[0] and the CPU identification string in 350 // the other three array elements. The CPU identification string is 351 // not in linear order. The code below arranges the information 352 // in a human readable form. The human readable order is CPUInfo[1] | 353 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped 354 // before using memcpy to copy these three array elements to cpu_string. 355 __cpuid(cpu_info, 0); 356 unsigned num_ids = cpu_info[0]; 357 std::swap(cpu_info[2], cpu_info[3]); 358 memcpy(vendor_, cpu_info + 1, 12); 359 vendor_[12] = '\0'; 360 361 // Interpret CPU feature information. 362 if (num_ids > 0) { 363 __cpuid(cpu_info, 1); 364 stepping_ = cpu_info[0] & 0xf; 365 model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0); 366 family_ = (cpu_info[0] >> 8) & 0xf; 367 type_ = (cpu_info[0] >> 12) & 0x3; 368 ext_model_ = (cpu_info[0] >> 16) & 0xf; 369 ext_family_ = (cpu_info[0] >> 20) & 0xff; 370 has_fpu_ = (cpu_info[3] & 0x00000001) != 0; 371 has_cmov_ = (cpu_info[3] & 0x00008000) != 0; 372 has_mmx_ = (cpu_info[3] & 0x00800000) != 0; 373 has_sse_ = (cpu_info[3] & 0x02000000) != 0; 374 has_sse2_ = (cpu_info[3] & 0x04000000) != 0; 375 has_sse3_ = (cpu_info[2] & 0x00000001) != 0; 376 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0; 377 has_sse41_ = (cpu_info[2] & 0x00080000) != 0; 378 has_sse42_ = (cpu_info[2] & 0x00100000) != 0; 379 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0; 380 has_osxsave_ = (cpu_info[2] & 0x08000000) != 0; 381 has_avx_ = (cpu_info[2] & 0x10000000) != 0; 382 has_fma3_ = (cpu_info[2] & 0x00001000) != 0; 383 384 if (family_ == 0x6) { 385 switch (model_) { 386 case 0x1c: // SLT 387 case 0x26: 388 case 0x36: 389 case 0x27: 390 case 0x35: 391 case 0x37: // SLM 392 case 0x4a: 393 case 0x4d: 394 case 0x4c: // AMT 395 case 0x6e: 396 is_atom_ = true; 397 } 398 } 399 } 400 401 // There are separate feature flags for VEX-encoded GPR instructions. 402 if (num_ids >= 7) { 403 __cpuid(cpu_info, 7); 404 has_bmi1_ = (cpu_info[1] & 0x00000008) != 0; 405 has_bmi2_ = (cpu_info[1] & 0x00000100) != 0; 406 } 407 408 // Query extended IDs. 409 __cpuid(cpu_info, 0x80000000); 410 unsigned num_ext_ids = cpu_info[0]; 411 412 // Interpret extended CPU feature information. 413 if (num_ext_ids > 0x80000000) { 414 __cpuid(cpu_info, 0x80000001); 415 has_lzcnt_ = (cpu_info[2] & 0x00000020) != 0; 416 // SAHF must be probed in long mode. 417 has_sahf_ = (cpu_info[2] & 0x00000001) != 0; 418 } 419 420 #elif V8_HOST_ARCH_ARM 421 422 #if V8_OS_LINUX 423 424 CPUInfo cpu_info; 425 426 // Extract implementor from the "CPU implementer" field. 427 char* implementer = cpu_info.ExtractField("CPU implementer"); 428 if (implementer != NULL) { 429 char* end; 430 implementer_ = strtol(implementer, &end, 0); 431 if (end == implementer) { 432 implementer_ = 0; 433 } 434 delete[] implementer; 435 } 436 437 char* variant = cpu_info.ExtractField("CPU variant"); 438 if (variant != NULL) { 439 char* end; 440 variant_ = strtol(variant, &end, 0); 441 if (end == variant) { 442 variant_ = -1; 443 } 444 delete[] variant; 445 } 446 447 // Extract part number from the "CPU part" field. 448 char* part = cpu_info.ExtractField("CPU part"); 449 if (part != NULL) { 450 char* end; 451 part_ = strtol(part, &end, 0); 452 if (end == part) { 453 part_ = 0; 454 } 455 delete[] part; 456 } 457 458 // Extract architecture from the "CPU Architecture" field. 459 // The list is well-known, unlike the the output of 460 // the 'Processor' field which can vary greatly. 461 // See the definition of the 'proc_arch' array in 462 // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in 463 // same file. 464 char* architecture = cpu_info.ExtractField("CPU architecture"); 465 if (architecture != NULL) { 466 char* end; 467 architecture_ = strtol(architecture, &end, 10); 468 if (end == architecture) { 469 architecture_ = 0; 470 } 471 delete[] architecture; 472 473 // Unfortunately, it seems that certain ARMv6-based CPUs 474 // report an incorrect architecture number of 7! 475 // 476 // See http://code.google.com/p/android/issues/detail?id=10812 477 // 478 // We try to correct this by looking at the 'elf_platform' 479 // field reported by the 'Processor' field, which is of the 480 // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for 481 // an ARMv6-one. For example, the Raspberry Pi is one popular 482 // ARMv6 device that reports architecture 7. 483 if (architecture_ == 7) { 484 char* processor = cpu_info.ExtractField("Processor"); 485 if (HasListItem(processor, "(v6l)")) { 486 architecture_ = 6; 487 } 488 delete[] processor; 489 } 490 491 // elf_platform moved to the model name field in Linux v3.8. 492 if (architecture_ == 7) { 493 char* processor = cpu_info.ExtractField("model name"); 494 if (HasListItem(processor, "(v6l)")) { 495 architecture_ = 6; 496 } 497 delete[] processor; 498 } 499 } 500 501 // Try to extract the list of CPU features from ELF hwcaps. 502 uint32_t hwcaps = ReadELFHWCaps(); 503 if (hwcaps != 0) { 504 has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0; 505 has_neon_ = (hwcaps & HWCAP_NEON) != 0; 506 has_vfp_ = (hwcaps & HWCAP_VFP) != 0; 507 has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0; 508 has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 || 509 (hwcaps & HWCAP_VFPD32) != 0)); 510 } else { 511 // Try to fallback to "Features" CPUInfo field. 512 char* features = cpu_info.ExtractField("Features"); 513 has_idiva_ = HasListItem(features, "idiva"); 514 has_neon_ = HasListItem(features, "neon"); 515 has_thumb2_ = HasListItem(features, "thumb2"); 516 has_vfp_ = HasListItem(features, "vfp"); 517 if (HasListItem(features, "vfpv3d16")) { 518 has_vfp3_ = true; 519 } else if (HasListItem(features, "vfpv3")) { 520 has_vfp3_ = true; 521 has_vfp3_d32_ = true; 522 } 523 delete[] features; 524 } 525 526 // Some old kernels will report vfp not vfpv3. Here we make an attempt 527 // to detect vfpv3 by checking for vfp *and* neon, since neon is only 528 // available on architectures with vfpv3. Checking neon on its own is 529 // not enough as it is possible to have neon without vfp. 530 if (has_vfp_ && has_neon_) { 531 has_vfp3_ = true; 532 } 533 534 // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6. 535 if (architecture_ < 7 && has_vfp3_) { 536 architecture_ = 7; 537 } 538 539 // ARMv7 implies Thumb2. 540 if (architecture_ >= 7) { 541 has_thumb2_ = true; 542 } 543 544 // The earliest architecture with Thumb2 is ARMv6T2. 545 if (has_thumb2_ && architecture_ < 6) { 546 architecture_ = 6; 547 } 548 549 // We don't support any FPUs other than VFP. 550 has_fpu_ = has_vfp_; 551 552 #elif V8_OS_QNX 553 554 uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags; 555 if (cpu_flags & ARM_CPU_FLAG_V7) { 556 architecture_ = 7; 557 has_thumb2_ = true; 558 } else if (cpu_flags & ARM_CPU_FLAG_V6) { 559 architecture_ = 6; 560 // QNX doesn't say if Thumb2 is available. 561 // Assume false for the architectures older than ARMv7. 562 } 563 DCHECK(architecture_ >= 6); 564 has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0; 565 has_vfp_ = has_fpu_; 566 if (cpu_flags & ARM_CPU_FLAG_NEON) { 567 has_neon_ = true; 568 has_vfp3_ = has_vfp_; 569 #ifdef ARM_CPU_FLAG_VFP_D32 570 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0; 571 #endif 572 } 573 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0; 574 575 #endif // V8_OS_LINUX 576 577 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 578 579 // Simple detection of FPU at runtime for Linux. 580 // It is based on /proc/cpuinfo, which reveals hardware configuration 581 // to user-space applications. According to MIPS (early 2010), no similar 582 // facility is universally available on the MIPS architectures, 583 // so it's up to individual OSes to provide such. 584 CPUInfo cpu_info; 585 char* cpu_model = cpu_info.ExtractField("cpu model"); 586 has_fpu_ = HasListItem(cpu_model, "FPU"); 587 delete[] cpu_model; 588 #ifdef V8_HOST_ARCH_MIPS 589 is_fp64_mode_ = __detect_fp64_mode(); 590 architecture_ = __detect_mips_arch_revision(); 591 #endif 592 593 #elif V8_HOST_ARCH_ARM64 594 595 CPUInfo cpu_info; 596 597 // Extract implementor from the "CPU implementer" field. 598 char* implementer = cpu_info.ExtractField("CPU implementer"); 599 if (implementer != NULL) { 600 char* end; 601 implementer_ = strtol(implementer, &end, 0); 602 if (end == implementer) { 603 implementer_ = 0; 604 } 605 delete[] implementer; 606 } 607 608 char* variant = cpu_info.ExtractField("CPU variant"); 609 if (variant != NULL) { 610 char* end; 611 variant_ = strtol(variant, &end, 0); 612 if (end == variant) { 613 variant_ = -1; 614 } 615 delete[] variant; 616 } 617 618 // Extract part number from the "CPU part" field. 619 char* part = cpu_info.ExtractField("CPU part"); 620 if (part != NULL) { 621 char* end; 622 part_ = strtol(part, &end, 0); 623 if (end == part) { 624 part_ = 0; 625 } 626 delete[] part; 627 } 628 629 #elif V8_HOST_ARCH_PPC 630 631 #ifndef USE_SIMULATOR 632 #if V8_OS_LINUX 633 // Read processor info from /proc/self/auxv. 634 char* auxv_cpu_type = NULL; 635 FILE* fp = fopen("/proc/self/auxv", "r"); 636 if (fp != NULL) { 637 #if V8_TARGET_ARCH_PPC64 638 Elf64_auxv_t entry; 639 #else 640 Elf32_auxv_t entry; 641 #endif 642 for (;;) { 643 size_t n = fread(&entry, sizeof(entry), 1, fp); 644 if (n == 0 || entry.a_type == AT_NULL) { 645 break; 646 } 647 if (entry.a_type == AT_PLATFORM) { 648 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val); 649 break; 650 } 651 } 652 fclose(fp); 653 } 654 655 part_ = -1; 656 if (auxv_cpu_type) { 657 if (strcmp(auxv_cpu_type, "power8") == 0) { 658 part_ = PPC_POWER8; 659 } else if (strcmp(auxv_cpu_type, "power7") == 0) { 660 part_ = PPC_POWER7; 661 } else if (strcmp(auxv_cpu_type, "power6") == 0) { 662 part_ = PPC_POWER6; 663 } else if (strcmp(auxv_cpu_type, "power5") == 0) { 664 part_ = PPC_POWER5; 665 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) { 666 part_ = PPC_G5; 667 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) { 668 part_ = PPC_G4; 669 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) { 670 part_ = PPC_PA6T; 671 } 672 } 673 674 #elif V8_OS_AIX 675 switch (_system_configuration.implementation) { 676 case POWER_8: 677 part_ = PPC_POWER8; 678 break; 679 case POWER_7: 680 part_ = PPC_POWER7; 681 break; 682 case POWER_6: 683 part_ = PPC_POWER6; 684 break; 685 case POWER_5: 686 part_ = PPC_POWER5; 687 break; 688 } 689 #endif // V8_OS_AIX 690 #endif // !USE_SIMULATOR 691 #endif // V8_HOST_ARCH_PPC 692 } 693 694 } // namespace base 695 } // namespace v8 696
