1 // Copyright 2015, ARM Limited 2 // All rights reserved. 3 // 4 // Redistribution and use in source and binary forms, with or without 5 // modification, are permitted provided that the following conditions are met: 6 // 7 // * Redistributions of source code must retain the above copyright notice, 8 // this list of conditions and the following disclaimer. 9 // * Redistributions in binary form must reproduce the above copyright notice, 10 // this list of conditions and the following disclaimer in the documentation 11 // and/or other materials provided with the distribution. 12 // * Neither the name of ARM Limited nor the names of its contributors may be 13 // used to endorse or promote products derived from this software without 14 // specific prior written permission. 15 // 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28 // --------------------------------------------------------------------- 29 // This file is auto generated using tools/generate_simulator_traces.py. 30 // 31 // PLEASE DO NOT EDIT. 32 // --------------------------------------------------------------------- 33 34 #ifndef VIXL_SIM_FCVTL2_4S_TRACE_A64_H_ 35 #define VIXL_SIM_FCVTL2_4S_TRACE_A64_H_ 36 37 const uint32_t kExpected_NEON_fcvtl2_4S[] = { 38 0xb4000000, 0xb9ffe000, 0xffffe000, 0x3f800000, 39 0xb9ffe000, 0xffffe000, 0x3f800000, 0x3f802000, 40 0xffffe000, 0x3f800000, 0x3f802000, 0xc0000000, 41 0x3f800000, 0x3f802000, 0xc0000000, 0x477fe000, 42 0x3f802000, 0xc0000000, 0x477fe000, 0x38800000, 43 0xc0000000, 0x477fe000, 0x38800000, 0x387fc000, 44 0x477fe000, 0x38800000, 0x387fc000, 0x33800000, 45 0x38800000, 0x387fc000, 0x33800000, 0x00000000, 46 0x387fc000, 0x33800000, 0x00000000, 0x80000000, 47 0x33800000, 0x00000000, 0x80000000, 0x7f800000, 48 0x00000000, 0x80000000, 0x7f800000, 0xff800000, 49 0x80000000, 0x7f800000, 0xff800000, 0x3eaaa000, 50 0x7f800000, 0xff800000, 0x3eaaa000, 0x3fc00000, 51 0xff800000, 0x3eaaa000, 0x3fc00000, 0x41200000, 52 0x3eaaa000, 0x3fc00000, 0x41200000, 0xbfc00000, 53 0x3fc00000, 0x41200000, 0xbfc00000, 0xc1200000, 54 0x41200000, 0xbfc00000, 0xc1200000, 0x3effe000, 55 0xbfc00000, 0xc1200000, 0x3effe000, 0x3f000000, 56 0xc1200000, 0x3effe000, 0x3f000000, 0x3f002000, 57 0x3effe000, 0x3f000000, 0x3f002000, 0x3f7fe000, 58 0x3f000000, 0x3f002000, 0x3f7fe000, 0x7fcfe000, 59 0x3f002000, 0x3f7fe000, 0x7fcfe000, 0x7fd22000, 60 0x3f7fe000, 0x7fcfe000, 0x7fd22000, 0x7fc00000, 61 0x7fcfe000, 0x7fd22000, 0x7fc00000, 0x7fd22000, 62 0x7fd22000, 0x7fc00000, 0x7fd22000, 0xb3800000, 63 0x7fc00000, 0x7fd22000, 0xb3800000, 0xbeffe000, 64 0x7fd22000, 0xb3800000, 0xbeffe000, 0xbf000000, 65 0xb3800000, 0xbeffe000, 0xbf000000, 0xbf002000, 66 0xbeffe000, 0xbf000000, 0xbf002000, 0xbf7fe000, 67 0xbf000000, 0xbf002000, 0xbf7fe000, 0xbf800000, 68 0xbf002000, 0xbf7fe000, 0xbf800000, 0xbf802000, 69 0xbf7fe000, 0xbf800000, 0xbf802000, 0xffcfe000, 70 0xbf800000, 0xbf802000, 0xffcfe000, 0xffd22000, 71 0xbf802000, 0xffcfe000, 0xffd22000, 0xffc00000, 72 0xffcfe000, 0xffd22000, 0xffc00000, 0xffd22000, 73 0xffd22000, 0xffc00000, 0xffd22000, 0xc77fe000, 74 0xffc00000, 0xffd22000, 0xc77fe000, 0x34000000, 75 0xffd22000, 0xc77fe000, 0x34000000, 0xb4000000, 76 0xc77fe000, 0x34000000, 0xb4000000, 0xb9ffe000, 77 0x34000000, 0xb4000000, 0xb9ffe000, 0xffffe000, 78 }; 79 const unsigned kExpectedCount_NEON_fcvtl2_4S = 40; 80 81 #endif // VIXL_SIM_FCVTL2_4S_TRACE_A64_H_ 82