1 /* Copyright (c) 2009-2012, 2014-2015 The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 */ 13 #ifndef __UAPI_MSM_CAMERA_H 14 #define __UAPI_MSM_CAMERA_H 15 16 #ifdef MSM_CAMERA_BIONIC 17 #include <sys/types.h> 18 #endif 19 #include <linux/videodev2.h> 20 #include <linux/types.h> 21 #include <linux/ioctl.h> 22 #ifdef MSM_CAMERA_GCC 23 #include <time.h> 24 #else 25 #include <linux/time.h> 26 #endif 27 28 #include <linux/msm_ion.h> 29 30 #define BIT(nr) (1UL << (nr)) 31 32 #define MSM_CAM_IOCTL_MAGIC 'm' 33 34 #define MAX_SERVER_PAYLOAD_LENGTH 8192 35 36 #define MSM_CAM_IOCTL_GET_SENSOR_INFO \ 37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *) 38 39 #define MSM_CAM_IOCTL_REGISTER_PMEM \ 40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *) 41 42 #define MSM_CAM_IOCTL_UNREGISTER_PMEM \ 43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned) 44 45 #define MSM_CAM_IOCTL_CTRL_COMMAND \ 46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *) 47 48 #define MSM_CAM_IOCTL_CONFIG_VFE \ 49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *) 50 51 #define MSM_CAM_IOCTL_GET_STATS \ 52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *) 53 54 #define MSM_CAM_IOCTL_GETFRAME \ 55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *) 56 57 #define MSM_CAM_IOCTL_ENABLE_VFE \ 58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *) 59 60 #define MSM_CAM_IOCTL_CTRL_CMD_DONE \ 61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *) 62 63 #define MSM_CAM_IOCTL_CONFIG_CMD \ 64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *) 65 66 #define MSM_CAM_IOCTL_DISABLE_VFE \ 67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *) 68 69 #define MSM_CAM_IOCTL_PAD_REG_RESET2 \ 70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *) 71 72 #define MSM_CAM_IOCTL_VFE_APPS_RESET \ 73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *) 74 75 #define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \ 76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *) 77 78 #define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \ 79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *) 80 81 #define MSM_CAM_IOCTL_AXI_CONFIG \ 82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *) 83 84 #define MSM_CAM_IOCTL_GET_PICTURE \ 85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *) 86 87 #define MSM_CAM_IOCTL_SET_CROP \ 88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *) 89 90 #define MSM_CAM_IOCTL_PICT_PP \ 91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *) 92 93 #define MSM_CAM_IOCTL_PICT_PP_DONE \ 94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *) 95 96 #define MSM_CAM_IOCTL_SENSOR_IO_CFG \ 97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *) 98 99 #define MSM_CAM_IOCTL_FLASH_LED_CFG \ 100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *) 101 102 #define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \ 103 _IO(MSM_CAM_IOCTL_MAGIC, 23) 104 105 #define MSM_CAM_IOCTL_CTRL_COMMAND_2 \ 106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *) 107 108 #define MSM_CAM_IOCTL_AF_CTRL \ 109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *) 110 111 #define MSM_CAM_IOCTL_AF_CTRL_DONE \ 112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *) 113 114 #define MSM_CAM_IOCTL_CONFIG_VPE \ 115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *) 116 117 #define MSM_CAM_IOCTL_AXI_VPE_CONFIG \ 118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *) 119 120 #define MSM_CAM_IOCTL_STROBE_FLASH_CFG \ 121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *) 122 123 #define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \ 124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *) 125 126 #define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \ 127 _IO(MSM_CAM_IOCTL_MAGIC, 31) 128 129 #define MSM_CAM_IOCTL_FLASH_CTRL \ 130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *) 131 132 #define MSM_CAM_IOCTL_ERROR_CONFIG \ 133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *) 134 135 #define MSM_CAM_IOCTL_ABORT_CAPTURE \ 136 _IO(MSM_CAM_IOCTL_MAGIC, 34) 137 138 #define MSM_CAM_IOCTL_SET_FD_ROI \ 139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *) 140 141 #define MSM_CAM_IOCTL_GET_CAMERA_INFO \ 142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *) 143 144 #define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \ 145 _IO(MSM_CAM_IOCTL_MAGIC, 37) 146 147 #define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \ 148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *) 149 150 #define MSM_CAM_IOCTL_PUT_ST_FRAME \ 151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *) 152 153 #define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \ 154 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload) 155 156 #define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \ 157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *) 158 159 #define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \ 160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *) 161 162 #define MSM_CAM_IOCTL_MCTL_POST_PROC \ 163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *) 164 165 #define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \ 166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *) 167 168 #define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \ 169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *) 170 171 #define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \ 172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *) 173 174 #define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \ 175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control) 176 177 #define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \ 178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl) 179 180 #define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \ 181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *) 182 183 #define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \ 184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *) 185 186 #define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \ 187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *) 188 189 #define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \ 190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *) 191 192 #define MSM_CAM_IOCTL_EEPROM_IO_CFG \ 193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *) 194 195 #define MSM_CAM_IOCTL_ISPIF_IO_CFG \ 196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *) 197 198 #define MSM_CAM_IOCTL_STATS_REQBUF \ 199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *) 200 201 #define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \ 202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *) 203 204 #define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \ 205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *) 206 207 #define MSM_CAM_IOCTL_SET_MCTL_SDEV \ 208 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *) 209 210 #define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \ 211 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *) 212 213 #define MSM_CAM_IOCTL_GET_INST_HANDLE \ 214 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *) 215 216 #define MSM_CAM_IOCTL_STATS_UNREG_BUF \ 217 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *) 218 219 #define MSM_CAM_IOCTL_CSIC_IO_CFG \ 220 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *) 221 222 #define MSM_CAM_IOCTL_CSID_IO_CFG \ 223 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *) 224 225 #define MSM_CAM_IOCTL_CSIPHY_IO_CFG \ 226 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *) 227 228 #define MSM_CAM_IOCTL_OEM \ 229 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *) 230 231 #define MSM_CAM_IOCTL_AXI_INIT \ 232 _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *) 233 234 #define MSM_CAM_IOCTL_AXI_RELEASE \ 235 _IO(MSM_CAM_IOCTL_MAGIC, 67) 236 237 struct v4l2_event_and_payload { 238 struct v4l2_event evt; 239 uint32_t payload_length; 240 uint32_t transaction_id; 241 void *payload; 242 }; 243 244 struct msm_stats_reqbuf { 245 int num_buf; /* how many buffers requested */ 246 int stats_type; /* stats type */ 247 }; 248 249 struct msm_stats_flush_bufq { 250 int stats_type; /* enum msm_stats_enum_type */ 251 }; 252 253 struct msm_mctl_pp_cmd { 254 int32_t id; 255 uint16_t length; 256 void *value; 257 }; 258 259 struct msm_mctl_post_proc_cmd { 260 int32_t type; 261 struct msm_mctl_pp_cmd cmd; 262 }; 263 264 #define MSM_CAMERA_LED_OFF 0 265 #define MSM_CAMERA_LED_LOW 1 266 #define MSM_CAMERA_LED_HIGH 2 267 #define MSM_CAMERA_LED_INIT 3 268 #define MSM_CAMERA_LED_RELEASE 4 269 270 #define MSM_CAMERA_STROBE_FLASH_NONE 0 271 #define MSM_CAMERA_STROBE_FLASH_XENON 1 272 273 #define MSM_MAX_CAMERA_SENSORS 5 274 #define MAX_SENSOR_NAME 32 275 #define MAX_CAM_NAME_SIZE 32 276 #define MAX_ACT_MOD_NAME_SIZE 32 277 #define MAX_ACT_NAME_SIZE 32 278 #define NUM_ACTUATOR_DIR 2 279 #define MAX_ACTUATOR_SCENARIO 8 280 #define MAX_ACTUATOR_REGION 5 281 #define MAX_ACTUATOR_INIT_SET 12 282 #define MAX_ACTUATOR_TYPE_SIZE 32 283 #define MAX_ACTUATOR_REG_TBL_SIZE 8 284 285 286 #define MSM_MAX_CAMERA_CONFIGS 2 287 288 #define PP_SNAP 0x01 289 #define PP_RAW_SNAP ((0x01)<<1) 290 #define PP_PREV ((0x01)<<2) 291 #define PP_THUMB ((0x01)<<3) 292 #define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB) 293 294 #define MSM_CAM_CTRL_CMD_DONE 0 295 #define MSM_CAM_SENSOR_VFE_CMD 1 296 297 /* Should be same as VIDEO_MAX_PLANES in videodev2.h */ 298 #define MAX_PLANES 8 299 300 /***************************************************** 301 * structure 302 *****************************************************/ 303 304 /* define five type of structures for userspace <==> kernel 305 * space communication: 306 * command 1 - 2 are from userspace ==> kernel 307 * command 3 - 4 are from kernel ==> userspace 308 * 309 * 1. control command: control command(from control thread), 310 * control status (from config thread); 311 */ 312 struct msm_ctrl_cmd { 313 uint16_t type; 314 uint16_t length; 315 void *value; 316 uint16_t status; 317 uint32_t timeout_ms; 318 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */ 319 int vnode_id; /* video dev id. Can we overload resp_fd? */ 320 int queue_idx; 321 uint32_t evt_id; 322 uint32_t stream_type; /* used to pass value to qcamera server */ 323 int config_ident; /*used as identifier for config node*/ 324 }; 325 326 struct msm_cam_evt_msg { 327 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */ 328 unsigned short msg_id; 329 unsigned int len; /* size in, number of bytes out */ 330 uint32_t frame_id; 331 void *data; 332 struct timespec timestamp; 333 }; 334 335 struct msm_pp_frame_sp { 336 /* phy addr of the buffer */ 337 unsigned long phy_addr; 338 uint32_t y_off; 339 uint32_t cbcr_off; 340 /* buffer length */ 341 uint32_t length; 342 int32_t fd; 343 uint32_t addr_offset; 344 /* mapped addr */ 345 unsigned long vaddr; 346 }; 347 348 struct msm_pp_frame_mp { 349 /* phy addr of the plane */ 350 unsigned long phy_addr; 351 /* offset of plane data */ 352 uint32_t data_offset; 353 /* plane length */ 354 uint32_t length; 355 int32_t fd; 356 uint32_t addr_offset; 357 /* mapped addr */ 358 unsigned long vaddr; 359 }; 360 361 struct msm_pp_frame { 362 uint32_t handle; /* stores vb cookie */ 363 uint32_t frame_id; 364 unsigned short buf_idx; 365 int path; 366 unsigned short image_type; 367 unsigned short num_planes; /* 1 for sp */ 368 struct timeval timestamp; 369 union { 370 struct msm_pp_frame_sp sp; 371 struct msm_pp_frame_mp mp[MAX_PLANES]; 372 }; 373 int node_type; 374 uint32_t inst_handle; 375 }; 376 377 struct msm_pp_crop { 378 uint32_t src_x; 379 uint32_t src_y; 380 uint32_t src_w; 381 uint32_t src_h; 382 uint32_t dst_x; 383 uint32_t dst_y; 384 uint32_t dst_w; 385 uint32_t dst_h; 386 uint8_t update_flag; 387 }; 388 389 struct msm_mctl_pp_frame_cmd { 390 uint32_t cookie; 391 uint8_t vpe_output_action; 392 struct msm_pp_frame src_frame; 393 struct msm_pp_frame dest_frame; 394 struct msm_pp_crop crop; 395 int path; 396 }; 397 398 struct msm_cam_evt_divert_frame { 399 unsigned short image_mode; 400 unsigned short op_mode; 401 unsigned short inst_idx; 402 unsigned short node_idx; 403 struct msm_pp_frame frame; 404 int do_pp; 405 }; 406 407 struct msm_mctl_pp_cmd_ack_event { 408 uint32_t cmd; /* VPE_CMD_ZOOM? */ 409 int status; /* 0 done, < 0 err */ 410 uint32_t cookie; /* daemon's cookie */ 411 }; 412 413 struct msm_mctl_pp_event_info { 414 int32_t event; 415 union { 416 struct msm_mctl_pp_cmd_ack_event ack; 417 }; 418 }; 419 420 struct msm_isp_event_ctrl { 421 unsigned short resptype; 422 union { 423 struct msm_cam_evt_msg isp_msg; 424 struct msm_ctrl_cmd ctrl; 425 struct msm_cam_evt_divert_frame div_frame; 426 struct msm_mctl_pp_event_info pp_event_info; 427 } isp_data; 428 }; 429 430 #define MSM_CAM_RESP_CTRL 0 431 #define MSM_CAM_RESP_STAT_EVT_MSG 1 432 #define MSM_CAM_RESP_STEREO_OP_1 2 433 #define MSM_CAM_RESP_STEREO_OP_2 3 434 #define MSM_CAM_RESP_V4L2 4 435 #define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5 436 #define MSM_CAM_RESP_DONE_EVENT 6 437 #define MSM_CAM_RESP_MCTL_PP_EVENT 7 438 #define MSM_CAM_RESP_MAX 8 439 440 #define MSM_CAM_APP_NOTIFY_EVENT 0 441 #define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1 442 443 /* this one is used to send ctrl/status up to config thread */ 444 445 struct msm_stats_event_ctrl { 446 /* 0 - ctrl_cmd from control thread, 447 * 1 - stats/event kernel, 448 * 2 - V4L control or read request */ 449 int resptype; 450 int timeout_ms; 451 struct msm_ctrl_cmd ctrl_cmd; 452 /* struct vfe_event_t stats_event; */ 453 struct msm_cam_evt_msg stats_event; 454 }; 455 456 /* 2. config command: config command(from config thread); */ 457 struct msm_camera_cfg_cmd { 458 /* what to config: 459 * 1 - sensor config, 2 - vfe config */ 460 uint16_t cfg_type; 461 462 /* sensor config type */ 463 uint16_t cmd_type; 464 uint16_t queue; 465 uint16_t length; 466 void *value; 467 }; 468 469 #define CMD_GENERAL 0 470 #define CMD_AXI_CFG_OUT1 1 471 #define CMD_AXI_CFG_SNAP_O1_AND_O2 2 472 #define CMD_AXI_CFG_OUT2 3 473 #define CMD_PICT_T_AXI_CFG 4 474 #define CMD_PICT_M_AXI_CFG 5 475 #define CMD_RAW_PICT_AXI_CFG 6 476 477 #define CMD_FRAME_BUF_RELEASE 7 478 #define CMD_PREV_BUF_CFG 8 479 #define CMD_SNAP_BUF_RELEASE 9 480 #define CMD_SNAP_BUF_CFG 10 481 #define CMD_STATS_DISABLE 11 482 #define CMD_STATS_AEC_AWB_ENABLE 12 483 #define CMD_STATS_AF_ENABLE 13 484 #define CMD_STATS_AEC_ENABLE 14 485 #define CMD_STATS_AWB_ENABLE 15 486 #define CMD_STATS_ENABLE 16 487 488 #define CMD_STATS_AXI_CFG 17 489 #define CMD_STATS_AEC_AXI_CFG 18 490 #define CMD_STATS_AF_AXI_CFG 19 491 #define CMD_STATS_AWB_AXI_CFG 20 492 #define CMD_STATS_RS_AXI_CFG 21 493 #define CMD_STATS_CS_AXI_CFG 22 494 #define CMD_STATS_IHIST_AXI_CFG 23 495 #define CMD_STATS_SKIN_AXI_CFG 24 496 497 #define CMD_STATS_BUF_RELEASE 25 498 #define CMD_STATS_AEC_BUF_RELEASE 26 499 #define CMD_STATS_AF_BUF_RELEASE 27 500 #define CMD_STATS_AWB_BUF_RELEASE 28 501 #define CMD_STATS_RS_BUF_RELEASE 29 502 #define CMD_STATS_CS_BUF_RELEASE 30 503 #define CMD_STATS_IHIST_BUF_RELEASE 31 504 #define CMD_STATS_SKIN_BUF_RELEASE 32 505 506 #define UPDATE_STATS_INVALID 33 507 #define CMD_AXI_CFG_SNAP_GEMINI 34 508 #define CMD_AXI_CFG_SNAP 35 509 #define CMD_AXI_CFG_PREVIEW 36 510 #define CMD_AXI_CFG_VIDEO 37 511 512 #define CMD_STATS_IHIST_ENABLE 38 513 #define CMD_STATS_RS_ENABLE 39 514 #define CMD_STATS_CS_ENABLE 40 515 #define CMD_VPE 41 516 #define CMD_AXI_CFG_VPE 42 517 #define CMD_AXI_CFG_ZSL 43 518 #define CMD_AXI_CFG_SNAP_VPE 44 519 #define CMD_AXI_CFG_SNAP_THUMB_VPE 45 520 521 #define CMD_CONFIG_PING_ADDR 46 522 #define CMD_CONFIG_PONG_ADDR 47 523 #define CMD_CONFIG_FREE_BUF_ADDR 48 524 #define CMD_AXI_CFG_ZSL_ALL_CHNLS 49 525 #define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50 526 #define CMD_VFE_BUFFER_RELEASE 51 527 #define CMD_VFE_PROCESS_IRQ 52 528 #define CMD_STATS_BG_ENABLE 53 529 #define CMD_STATS_BF_ENABLE 54 530 #define CMD_STATS_BHIST_ENABLE 55 531 #define CMD_STATS_BG_BUF_RELEASE 56 532 #define CMD_STATS_BF_BUF_RELEASE 57 533 #define CMD_STATS_BHIST_BUF_RELEASE 58 534 #define CMD_VFE_PIX_SOF_COUNT_UPDATE 59 535 #define CMD_VFE_COUNT_PIX_SOF_ENABLE 60 536 #define CMD_STATS_BE_ENABLE 61 537 #define CMD_STATS_BE_BUF_RELEASE 62 538 539 #define CMD_AXI_CFG_PRIM BIT(8) 540 #define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9) 541 #define CMD_AXI_CFG_SEC BIT(10) 542 #define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11) 543 #define CMD_AXI_CFG_TERT1 BIT(12) 544 #define CMD_AXI_CFG_TERT2 BIT(13) 545 546 #define CMD_AXI_START 0xE1 547 #define CMD_AXI_STOP 0xE2 548 #define CMD_AXI_RESET 0xE3 549 #define CMD_AXI_ABORT 0xE4 550 551 552 553 #define AXI_CMD_PREVIEW BIT(0) 554 #define AXI_CMD_CAPTURE BIT(1) 555 #define AXI_CMD_RECORD BIT(2) 556 #define AXI_CMD_ZSL BIT(3) 557 #define AXI_CMD_RAW_CAPTURE BIT(4) 558 #define AXI_CMD_LIVESHOT BIT(5) 559 560 /* vfe config command: config command(from config thread)*/ 561 struct msm_vfe_cfg_cmd { 562 int cmd_type; 563 uint16_t length; 564 void *value; 565 }; 566 567 struct msm_vpe_cfg_cmd { 568 int cmd_type; 569 uint16_t length; 570 void *value; 571 }; 572 573 #define MAX_CAMERA_ENABLE_NAME_LEN 32 574 struct camera_enable_cmd { 575 char name[MAX_CAMERA_ENABLE_NAME_LEN]; 576 }; 577 578 #define MSM_PMEM_OUTPUT1 0 579 #define MSM_PMEM_OUTPUT2 1 580 #define MSM_PMEM_OUTPUT1_OUTPUT2 2 581 #define MSM_PMEM_THUMBNAIL 3 582 #define MSM_PMEM_MAINIMG 4 583 #define MSM_PMEM_RAW_MAINIMG 5 584 #define MSM_PMEM_AEC_AWB 6 585 #define MSM_PMEM_AF 7 586 #define MSM_PMEM_AEC 8 587 #define MSM_PMEM_AWB 9 588 #define MSM_PMEM_RS 10 589 #define MSM_PMEM_CS 11 590 #define MSM_PMEM_IHIST 12 591 #define MSM_PMEM_SKIN 13 592 #define MSM_PMEM_VIDEO 14 593 #define MSM_PMEM_PREVIEW 15 594 #define MSM_PMEM_VIDEO_VPE 16 595 #define MSM_PMEM_C2D 17 596 #define MSM_PMEM_MAINIMG_VPE 18 597 #define MSM_PMEM_THUMBNAIL_VPE 19 598 #define MSM_PMEM_BAYER_GRID 20 599 #define MSM_PMEM_BAYER_FOCUS 21 600 #define MSM_PMEM_BAYER_HIST 22 601 #define MSM_PMEM_BAYER_EXPOSURE 23 602 #define MSM_PMEM_MAX 24 603 604 #define STAT_AEAW 0 605 #define STAT_AEC 1 606 #define STAT_AF 2 607 #define STAT_AWB 3 608 #define STAT_RS 4 609 #define STAT_CS 5 610 #define STAT_IHIST 6 611 #define STAT_SKIN 7 612 #define STAT_BG 8 613 #define STAT_BF 9 614 #define STAT_BE 10 615 #define STAT_BHIST 11 616 #define STAT_MAX 12 617 618 #define FRAME_PREVIEW_OUTPUT1 0 619 #define FRAME_PREVIEW_OUTPUT2 1 620 #define FRAME_SNAPSHOT 2 621 #define FRAME_THUMBNAIL 3 622 #define FRAME_RAW_SNAPSHOT 4 623 #define FRAME_MAX 5 624 625 enum msm_stats_enum_type { 626 MSM_STATS_TYPE_AEC, /* legacy based AEC */ 627 MSM_STATS_TYPE_AF, /* legacy based AF */ 628 MSM_STATS_TYPE_AWB, /* legacy based AWB */ 629 MSM_STATS_TYPE_RS, /* legacy based RS */ 630 MSM_STATS_TYPE_CS, /* legacy based CS */ 631 MSM_STATS_TYPE_IHIST, /* legacy based HIST */ 632 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */ 633 MSM_STATS_TYPE_BG, /* Bayer Grids */ 634 MSM_STATS_TYPE_BF, /* Bayer Focus */ 635 MSM_STATS_TYPE_BE, /* Bayer Exposure*/ 636 MSM_STATS_TYPE_BHIST, /* Bayer Hist */ 637 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/ 638 MSM_STATS_TYPE_COMP, /* Composite stats */ 639 MSM_STATS_TYPE_MAX /* MAX */ 640 }; 641 642 struct msm_stats_buf_info { 643 int type; /* msm_stats_enum_type */ 644 int fd; 645 void *vaddr; 646 uint32_t offset; 647 uint32_t len; 648 uint32_t y_off; 649 uint32_t cbcr_off; 650 uint32_t planar0_off; 651 uint32_t planar1_off; 652 uint32_t planar2_off; 653 uint8_t active; 654 int buf_idx; 655 }; 656 657 struct msm_pmem_info { 658 int type; 659 int fd; 660 void *vaddr; 661 uint32_t offset; 662 uint32_t len; 663 uint32_t y_off; 664 uint32_t cbcr_off; 665 uint32_t planar0_off; 666 uint32_t planar1_off; 667 uint32_t planar2_off; 668 uint8_t active; 669 }; 670 671 struct outputCfg { 672 uint32_t height; 673 uint32_t width; 674 675 uint32_t window_height_firstline; 676 uint32_t window_height_lastline; 677 }; 678 679 #define VIDEO_NODE 0 680 #define MCTL_NODE 1 681 682 #define OUTPUT_1 0 683 #define OUTPUT_2 1 684 #define OUTPUT_1_AND_2 2 /* snapshot only */ 685 #define OUTPUT_1_AND_3 3 /* video */ 686 #define CAMIF_TO_AXI_VIA_OUTPUT_2 4 687 #define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5 688 #define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6 689 #define OUTPUT_1_2_AND_3 7 690 #define OUTPUT_ALL_CHNLS 8 691 #define OUTPUT_VIDEO_ALL_CHNLS 9 692 #define OUTPUT_ZSL_ALL_CHNLS 10 693 #define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS 694 695 #define OUTPUT_PRIM BIT(8) 696 #define OUTPUT_PRIM_ALL_CHNLS BIT(9) 697 #define OUTPUT_SEC BIT(10) 698 #define OUTPUT_SEC_ALL_CHNLS BIT(11) 699 #define OUTPUT_TERT1 BIT(12) 700 #define OUTPUT_TERT2 BIT(13) 701 702 703 704 #define MSM_FRAME_PREV_1 0 705 #define MSM_FRAME_PREV_2 1 706 #define MSM_FRAME_ENC 2 707 708 #define OUTPUT_TYPE_P BIT(0) 709 #define OUTPUT_TYPE_T BIT(1) 710 #define OUTPUT_TYPE_S BIT(2) 711 #define OUTPUT_TYPE_V BIT(3) 712 #define OUTPUT_TYPE_L BIT(4) 713 #define OUTPUT_TYPE_ST_L BIT(5) 714 #define OUTPUT_TYPE_ST_R BIT(6) 715 #define OUTPUT_TYPE_ST_D BIT(7) 716 #define OUTPUT_TYPE_R BIT(8) 717 #define OUTPUT_TYPE_R1 BIT(9) 718 #define OUTPUT_TYPE_SAEC BIT(10) 719 #define OUTPUT_TYPE_SAFC BIT(11) 720 #define OUTPUT_TYPE_SAWB BIT(12) 721 #define OUTPUT_TYPE_IHST BIT(13) 722 #define OUTPUT_TYPE_CSTA BIT(14) 723 724 struct fd_roi_info { 725 void *info; 726 int info_len; 727 }; 728 729 struct msm_mem_map_info { 730 uint32_t cookie; 731 uint32_t length; 732 uint32_t mem_type; 733 }; 734 735 #define MSM_MEM_MMAP 0 736 #define MSM_MEM_USERPTR 1 737 #define MSM_PLANE_MAX 8 738 #define MSM_PLANE_Y 0 739 #define MSM_PLANE_UV 1 740 741 struct msm_frame { 742 struct timespec ts; 743 int path; 744 int type; 745 unsigned long buffer; 746 uint32_t phy_offset; 747 uint32_t y_off; 748 uint32_t cbcr_off; 749 uint32_t planar0_off; 750 uint32_t planar1_off; 751 uint32_t planar2_off; 752 int fd; 753 754 void *cropinfo; 755 int croplen; 756 uint32_t error_code; 757 struct fd_roi_info roi_info; 758 uint32_t frame_id; 759 int stcam_quality_ind; 760 uint32_t stcam_conv_value; 761 762 struct ion_allocation_data ion_alloc; 763 struct ion_fd_data fd_data; 764 int ion_dev_fd; 765 }; 766 767 enum msm_st_frame_packing { 768 SIDE_BY_SIDE_HALF, 769 SIDE_BY_SIDE_FULL, 770 TOP_DOWN_HALF, 771 TOP_DOWN_FULL, 772 }; 773 774 struct msm_st_crop { 775 uint32_t in_w; 776 uint32_t in_h; 777 uint32_t out_w; 778 uint32_t out_h; 779 }; 780 781 struct msm_st_half { 782 uint32_t buf_p0_off; 783 uint32_t buf_p1_off; 784 uint32_t buf_p0_stride; 785 uint32_t buf_p1_stride; 786 uint32_t pix_x_off; 787 uint32_t pix_y_off; 788 struct msm_st_crop stCropInfo; 789 }; 790 791 struct msm_st_frame { 792 struct msm_frame buf_info; 793 int type; 794 enum msm_st_frame_packing packing; 795 struct msm_st_half L; 796 struct msm_st_half R; 797 int frame_id; 798 }; 799 800 #define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1) 801 802 struct stats_buff { 803 unsigned long buff; 804 int fd; 805 }; 806 807 struct msm_stats_buf { 808 uint8_t awb_ymin; 809 struct stats_buff aec; 810 struct stats_buff awb; 811 struct stats_buff af; 812 struct stats_buff be; 813 struct stats_buff ihist; 814 struct stats_buff rs; 815 struct stats_buff cs; 816 struct stats_buff skin; 817 int type; 818 uint32_t status_bits; 819 unsigned long buffer; 820 int fd; 821 int length; 822 struct ion_handle *handle; 823 uint32_t frame_id; 824 int buf_idx; 825 }; 826 #define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0 827 /* video capture mode in VIDIOC_S_PARM */ 828 #define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \ 829 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1) 830 /* extendedmode for video recording in VIDIOC_S_PARM */ 831 #define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \ 832 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2) 833 /* extendedmode for the full size main image in VIDIOC_S_PARM */ 834 #define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3) 835 /* extendedmode for the thumb nail image in VIDIOC_S_PARM */ 836 #define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \ 837 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4) 838 /* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */ 839 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \ 840 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5) 841 /* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */ 842 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \ 843 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6) 844 /* raw image type */ 845 #define MSM_V4L2_EXT_CAPTURE_MODE_RAW \ 846 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7) 847 /* RDI dump */ 848 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI \ 849 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8) 850 /* RDI dump 1 */ 851 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \ 852 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9) 853 /* RDI dump 2 */ 854 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \ 855 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10) 856 #define MSM_V4L2_EXT_CAPTURE_MODE_AEC \ 857 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11) 858 #define MSM_V4L2_EXT_CAPTURE_MODE_AWB \ 859 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12) 860 #define MSM_V4L2_EXT_CAPTURE_MODE_AF \ 861 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13) 862 #define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \ 863 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14) 864 #define MSM_V4L2_EXT_CAPTURE_MODE_CS \ 865 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15) 866 #define MSM_V4L2_EXT_CAPTURE_MODE_RS \ 867 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16) 868 #define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \ 869 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17) 870 #define MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT \ 871 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18) 872 #define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+19) 873 874 875 #define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE 876 #define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1) 877 #define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2) 878 #define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3) 879 #define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4) 880 #define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5) 881 #define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6) 882 #define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7) 883 #define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8) 884 #define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9) 885 #define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10) 886 #define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11) 887 #define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12) 888 #define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13) 889 #define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14) 890 #define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15) 891 #define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16) 892 #define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17) 893 #define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18) 894 #define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO 895 896 /* camera operation mode for video recording - two frame output queues */ 897 #define MSM_V4L2_CAM_OP_DEFAULT 0 898 /* camera operation mode for video recording - two frame output queues */ 899 #define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1) 900 /* camera operation mode for video recording - two frame output queues */ 901 #define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2) 902 /* camera operation mode for standard shapshot - two frame output queues */ 903 #define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3) 904 /* camera operation mode for zsl shapshot - three output queues */ 905 #define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4) 906 /* camera operation mode for raw snapshot - one frame output queue */ 907 #define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5) 908 /* camera operation mode for jpeg snapshot - one frame output queue */ 909 #define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6) 910 911 912 #define MSM_V4L2_VID_CAP_TYPE 0 913 #define MSM_V4L2_STREAM_ON 1 914 #define MSM_V4L2_STREAM_OFF 2 915 #define MSM_V4L2_SNAPSHOT 3 916 #define MSM_V4L2_QUERY_CTRL 4 917 #define MSM_V4L2_GET_CTRL 5 918 #define MSM_V4L2_SET_CTRL 6 919 #define MSM_V4L2_QUERY 7 920 #define MSM_V4L2_GET_CROP 8 921 #define MSM_V4L2_SET_CROP 9 922 #define MSM_V4L2_OPEN 10 923 #define MSM_V4L2_CLOSE 11 924 #define MSM_V4L2_SET_CTRL_CMD 12 925 #define MSM_V4L2_EVT_SUB_MASK 13 926 #define MSM_V4L2_PRIVATE_CMD 14 927 #define MSM_V4L2_MAX 15 928 #define V4L2_CAMERA_EXIT 43 929 930 struct crop_info { 931 void *info; 932 int len; 933 }; 934 935 struct msm_postproc { 936 int ftnum; 937 struct msm_frame fthumnail; 938 int fmnum; 939 struct msm_frame fmain; 940 }; 941 942 struct msm_snapshot_pp_status { 943 void *status; 944 }; 945 946 #define CFG_SET_MODE 0 947 #define CFG_SET_EFFECT 1 948 #define CFG_START 2 949 #define CFG_PWR_UP 3 950 #define CFG_PWR_DOWN 4 951 #define CFG_WRITE_EXPOSURE_GAIN 5 952 #define CFG_SET_DEFAULT_FOCUS 6 953 #define CFG_MOVE_FOCUS 7 954 #define CFG_REGISTER_TO_REAL_GAIN 8 955 #define CFG_REAL_TO_REGISTER_GAIN 9 956 #define CFG_SET_FPS 10 957 #define CFG_SET_PICT_FPS 11 958 #define CFG_SET_BRIGHTNESS 12 959 #define CFG_SET_CONTRAST 13 960 #define CFG_SET_ZOOM 14 961 #define CFG_SET_EXPOSURE_MODE 15 962 #define CFG_SET_WB 16 963 #define CFG_SET_ANTIBANDING 17 964 #define CFG_SET_EXP_GAIN 18 965 #define CFG_SET_PICT_EXP_GAIN 19 966 #define CFG_SET_LENS_SHADING 20 967 #define CFG_GET_PICT_FPS 21 968 #define CFG_GET_PREV_L_PF 22 969 #define CFG_GET_PREV_P_PL 23 970 #define CFG_GET_PICT_L_PF 24 971 #define CFG_GET_PICT_P_PL 25 972 #define CFG_GET_AF_MAX_STEPS 26 973 #define CFG_GET_PICT_MAX_EXP_LC 27 974 #define CFG_SEND_WB_INFO 28 975 #define CFG_SENSOR_INIT 29 976 #define CFG_GET_3D_CALI_DATA 30 977 #define CFG_GET_CALIB_DATA 31 978 #define CFG_GET_OUTPUT_INFO 32 979 #define CFG_GET_EEPROM_INFO 33 980 #define CFG_GET_EEPROM_DATA 34 981 #define CFG_SET_ACTUATOR_INFO 35 982 #define CFG_GET_ACTUATOR_INFO 36 983 /* TBD: QRD */ 984 #define CFG_SET_SATURATION 37 985 #define CFG_SET_SHARPNESS 38 986 #define CFG_SET_TOUCHAEC 39 987 #define CFG_SET_AUTO_FOCUS 40 988 #define CFG_SET_AUTOFLASH 41 989 #define CFG_SET_EXPOSURE_COMPENSATION 42 990 #define CFG_SET_ISO 43 991 #define CFG_START_STREAM 44 992 #define CFG_STOP_STREAM 45 993 #define CFG_GET_CSI_PARAMS 46 994 #define CFG_POWER_UP 47 995 #define CFG_POWER_DOWN 48 996 #define CFG_WRITE_I2C_ARRAY 49 997 #define CFG_READ_I2C_ARRAY 50 998 #define CFG_PCLK_CHANGE 51 999 #define CFG_CONFIG_VREG_ARRAY 52 1000 #define CFG_CONFIG_CLK_ARRAY 53 1001 #define CFG_GPIO_OP 54 1002 #define CFG_MAX 55 1003 1004 1005 #define MOVE_NEAR 0 1006 #define MOVE_FAR 1 1007 1008 #define SENSOR_PREVIEW_MODE 0 1009 #define SENSOR_SNAPSHOT_MODE 1 1010 #define SENSOR_RAW_SNAPSHOT_MODE 2 1011 #define SENSOR_HFR_60FPS_MODE 3 1012 #define SENSOR_HFR_90FPS_MODE 4 1013 #define SENSOR_HFR_120FPS_MODE 5 1014 1015 #define SENSOR_QTR_SIZE 0 1016 #define SENSOR_FULL_SIZE 1 1017 #define SENSOR_QVGA_SIZE 2 1018 #define SENSOR_INVALID_SIZE 3 1019 1020 #define CAMERA_EFFECT_OFF 0 1021 #define CAMERA_EFFECT_MONO 1 1022 #define CAMERA_EFFECT_NEGATIVE 2 1023 #define CAMERA_EFFECT_SOLARIZE 3 1024 #define CAMERA_EFFECT_SEPIA 4 1025 #define CAMERA_EFFECT_POSTERIZE 5 1026 #define CAMERA_EFFECT_WHITEBOARD 6 1027 #define CAMERA_EFFECT_BLACKBOARD 7 1028 #define CAMERA_EFFECT_AQUA 8 1029 #define CAMERA_EFFECT_EMBOSS 9 1030 #define CAMERA_EFFECT_SKETCH 10 1031 #define CAMERA_EFFECT_NEON 11 1032 #define CAMERA_EFFECT_FADED 12 1033 #define CAMERA_EFFECT_VINTAGECOOL 13 1034 #define CAMERA_EFFECT_VINTAGEWARM 14 1035 #define CAMERA_EFFECT_ACCENT_BLUE 15 1036 #define CAMERA_EFFECT_ACCENT_GREEN 16 1037 #define CAMERA_EFFECT_ACCENT_ORANGE 17 1038 #define CAMERA_EFFECT_MAX 18 1039 1040 /* QRD */ 1041 #define CAMERA_EFFECT_BW 10 1042 #define CAMERA_EFFECT_BLUISH 12 1043 #define CAMERA_EFFECT_REDDISH 13 1044 #define CAMERA_EFFECT_GREENISH 14 1045 1046 /* QRD */ 1047 #define CAMERA_ANTIBANDING_OFF 0 1048 #define CAMERA_ANTIBANDING_50HZ 2 1049 #define CAMERA_ANTIBANDING_60HZ 1 1050 #define CAMERA_ANTIBANDING_AUTO 3 1051 1052 #define CAMERA_CONTRAST_LV0 0 1053 #define CAMERA_CONTRAST_LV1 1 1054 #define CAMERA_CONTRAST_LV2 2 1055 #define CAMERA_CONTRAST_LV3 3 1056 #define CAMERA_CONTRAST_LV4 4 1057 #define CAMERA_CONTRAST_LV5 5 1058 #define CAMERA_CONTRAST_LV6 6 1059 #define CAMERA_CONTRAST_LV7 7 1060 #define CAMERA_CONTRAST_LV8 8 1061 #define CAMERA_CONTRAST_LV9 9 1062 1063 #define CAMERA_BRIGHTNESS_LV0 0 1064 #define CAMERA_BRIGHTNESS_LV1 1 1065 #define CAMERA_BRIGHTNESS_LV2 2 1066 #define CAMERA_BRIGHTNESS_LV3 3 1067 #define CAMERA_BRIGHTNESS_LV4 4 1068 #define CAMERA_BRIGHTNESS_LV5 5 1069 #define CAMERA_BRIGHTNESS_LV6 6 1070 #define CAMERA_BRIGHTNESS_LV7 7 1071 #define CAMERA_BRIGHTNESS_LV8 8 1072 1073 1074 #define CAMERA_SATURATION_LV0 0 1075 #define CAMERA_SATURATION_LV1 1 1076 #define CAMERA_SATURATION_LV2 2 1077 #define CAMERA_SATURATION_LV3 3 1078 #define CAMERA_SATURATION_LV4 4 1079 #define CAMERA_SATURATION_LV5 5 1080 #define CAMERA_SATURATION_LV6 6 1081 #define CAMERA_SATURATION_LV7 7 1082 #define CAMERA_SATURATION_LV8 8 1083 1084 #define CAMERA_SHARPNESS_LV0 0 1085 #define CAMERA_SHARPNESS_LV1 3 1086 #define CAMERA_SHARPNESS_LV2 6 1087 #define CAMERA_SHARPNESS_LV3 9 1088 #define CAMERA_SHARPNESS_LV4 12 1089 #define CAMERA_SHARPNESS_LV5 15 1090 #define CAMERA_SHARPNESS_LV6 18 1091 #define CAMERA_SHARPNESS_LV7 21 1092 #define CAMERA_SHARPNESS_LV8 24 1093 #define CAMERA_SHARPNESS_LV9 27 1094 #define CAMERA_SHARPNESS_LV10 30 1095 1096 #define CAMERA_SETAE_AVERAGE 0 1097 #define CAMERA_SETAE_CENWEIGHT 1 1098 1099 #define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */ 1100 #define CAMERA_WB_CUSTOM 2 1101 #define CAMERA_WB_INCANDESCENT 3 1102 #define CAMERA_WB_FLUORESCENT 4 1103 #define CAMERA_WB_DAYLIGHT 5 1104 #define CAMERA_WB_CLOUDY_DAYLIGHT 6 1105 #define CAMERA_WB_TWILIGHT 7 1106 #define CAMERA_WB_SHADE 8 1107 1108 #define CAMERA_EXPOSURE_COMPENSATION_LV0 12 1109 #define CAMERA_EXPOSURE_COMPENSATION_LV1 6 1110 #define CAMERA_EXPOSURE_COMPENSATION_LV2 0 1111 #define CAMERA_EXPOSURE_COMPENSATION_LV3 -6 1112 #define CAMERA_EXPOSURE_COMPENSATION_LV4 -12 1113 1114 enum msm_v4l2_saturation_level { 1115 MSM_V4L2_SATURATION_L0, 1116 MSM_V4L2_SATURATION_L1, 1117 MSM_V4L2_SATURATION_L2, 1118 MSM_V4L2_SATURATION_L3, 1119 MSM_V4L2_SATURATION_L4, 1120 MSM_V4L2_SATURATION_L5, 1121 MSM_V4L2_SATURATION_L6, 1122 MSM_V4L2_SATURATION_L7, 1123 MSM_V4L2_SATURATION_L8, 1124 MSM_V4L2_SATURATION_L9, 1125 MSM_V4L2_SATURATION_L10, 1126 }; 1127 1128 enum msm_v4l2_contrast_level { 1129 MSM_V4L2_CONTRAST_L0, 1130 MSM_V4L2_CONTRAST_L1, 1131 MSM_V4L2_CONTRAST_L2, 1132 MSM_V4L2_CONTRAST_L3, 1133 MSM_V4L2_CONTRAST_L4, 1134 MSM_V4L2_CONTRAST_L5, 1135 MSM_V4L2_CONTRAST_L6, 1136 MSM_V4L2_CONTRAST_L7, 1137 MSM_V4L2_CONTRAST_L8, 1138 MSM_V4L2_CONTRAST_L9, 1139 MSM_V4L2_CONTRAST_L10, 1140 }; 1141 1142 1143 enum msm_v4l2_exposure_level { 1144 MSM_V4L2_EXPOSURE_N2, 1145 MSM_V4L2_EXPOSURE_N1, 1146 MSM_V4L2_EXPOSURE_D, 1147 MSM_V4L2_EXPOSURE_P1, 1148 MSM_V4L2_EXPOSURE_P2, 1149 }; 1150 1151 enum msm_v4l2_sharpness_level { 1152 MSM_V4L2_SHARPNESS_L0, 1153 MSM_V4L2_SHARPNESS_L1, 1154 MSM_V4L2_SHARPNESS_L2, 1155 MSM_V4L2_SHARPNESS_L3, 1156 MSM_V4L2_SHARPNESS_L4, 1157 MSM_V4L2_SHARPNESS_L5, 1158 MSM_V4L2_SHARPNESS_L6, 1159 }; 1160 1161 enum msm_v4l2_expo_metering_mode { 1162 MSM_V4L2_EXP_FRAME_AVERAGE, 1163 MSM_V4L2_EXP_CENTER_WEIGHTED, 1164 MSM_V4L2_EXP_SPOT_METERING, 1165 }; 1166 1167 enum msm_v4l2_iso_mode { 1168 MSM_V4L2_ISO_AUTO = 0, 1169 MSM_V4L2_ISO_DEBLUR, 1170 MSM_V4L2_ISO_100, 1171 MSM_V4L2_ISO_200, 1172 MSM_V4L2_ISO_400, 1173 MSM_V4L2_ISO_800, 1174 MSM_V4L2_ISO_1600, 1175 }; 1176 1177 enum msm_v4l2_wb_mode { 1178 MSM_V4L2_WB_OFF, 1179 MSM_V4L2_WB_AUTO , 1180 MSM_V4L2_WB_CUSTOM, 1181 MSM_V4L2_WB_INCANDESCENT, 1182 MSM_V4L2_WB_FLUORESCENT, 1183 MSM_V4L2_WB_DAYLIGHT, 1184 MSM_V4L2_WB_CLOUDY_DAYLIGHT, 1185 }; 1186 1187 enum msm_v4l2_special_effect { 1188 MSM_V4L2_EFFECT_OFF, 1189 MSM_V4L2_EFFECT_MONO, 1190 MSM_V4L2_EFFECT_NEGATIVE, 1191 MSM_V4L2_EFFECT_SOLARIZE, 1192 MSM_V4L2_EFFECT_SEPIA, 1193 MSM_V4L2_EFFECT_POSTERAIZE, 1194 MSM_V4L2_EFFECT_WHITEBOARD, 1195 MSM_V4L2_EFFECT_BLACKBOARD, 1196 MSM_V4L2_EFFECT_AQUA, 1197 MSM_V4L2_EFFECT_EMBOSS, 1198 MSM_V4L2_EFFECT_SKETCH, 1199 MSM_V4L2_EFFECT_NEON, 1200 MSM_V4L2_EFFECT_MAX, 1201 }; 1202 1203 enum msm_v4l2_power_line_frequency { 1204 MSM_V4L2_POWER_LINE_OFF, 1205 MSM_V4L2_POWER_LINE_60HZ, 1206 MSM_V4L2_POWER_LINE_50HZ, 1207 MSM_V4L2_POWER_LINE_AUTO, 1208 }; 1209 1210 #define CAMERA_ISO_TYPE_AUTO 0 1211 #define CAMEAR_ISO_TYPE_HJR 1 1212 #define CAMEAR_ISO_TYPE_100 2 1213 #define CAMERA_ISO_TYPE_200 3 1214 #define CAMERA_ISO_TYPE_400 4 1215 #define CAMEAR_ISO_TYPE_800 5 1216 #define CAMERA_ISO_TYPE_1600 6 1217 1218 struct sensor_pict_fps { 1219 uint16_t prevfps; 1220 uint16_t pictfps; 1221 }; 1222 1223 struct exp_gain_cfg { 1224 uint16_t gain; 1225 uint32_t line; 1226 }; 1227 1228 struct focus_cfg { 1229 int32_t steps; 1230 int dir; 1231 }; 1232 1233 struct fps_cfg { 1234 uint16_t f_mult; 1235 uint16_t fps_div; 1236 uint32_t pict_fps_div; 1237 }; 1238 struct wb_info_cfg { 1239 uint16_t red_gain; 1240 uint16_t green_gain; 1241 uint16_t blue_gain; 1242 }; 1243 struct sensor_3d_exp_cfg { 1244 uint16_t gain; 1245 uint32_t line; 1246 uint16_t r_gain; 1247 uint16_t b_gain; 1248 uint16_t gr_gain; 1249 uint16_t gb_gain; 1250 uint16_t gain_adjust; 1251 }; 1252 struct sensor_3d_cali_data_t{ 1253 unsigned char left_p_matrix[3][4][8]; 1254 unsigned char right_p_matrix[3][4][8]; 1255 unsigned char square_len[8]; 1256 unsigned char focal_len[8]; 1257 unsigned char pixel_pitch[8]; 1258 uint16_t left_r; 1259 uint16_t left_b; 1260 uint16_t left_gb; 1261 uint16_t left_af_far; 1262 uint16_t left_af_mid; 1263 uint16_t left_af_short; 1264 uint16_t left_af_5um; 1265 uint16_t left_af_50up; 1266 uint16_t left_af_50down; 1267 uint16_t right_r; 1268 uint16_t right_b; 1269 uint16_t right_gb; 1270 uint16_t right_af_far; 1271 uint16_t right_af_mid; 1272 uint16_t right_af_short; 1273 uint16_t right_af_5um; 1274 uint16_t right_af_50up; 1275 uint16_t right_af_50down; 1276 }; 1277 struct sensor_init_cfg { 1278 uint8_t prev_res; 1279 uint8_t pict_res; 1280 }; 1281 1282 struct sensor_calib_data { 1283 /* Color Related Measurements */ 1284 uint16_t r_over_g; 1285 uint16_t b_over_g; 1286 uint16_t gr_over_gb; 1287 1288 /* Lens Related Measurements */ 1289 uint16_t macro_2_inf; 1290 uint16_t inf_2_macro; 1291 uint16_t stroke_amt; 1292 uint16_t af_pos_1m; 1293 uint16_t af_pos_inf; 1294 }; 1295 1296 enum msm_sensor_resolution_t { 1297 MSM_SENSOR_RES_FULL, 1298 MSM_SENSOR_RES_QTR, 1299 MSM_SENSOR_RES_2, 1300 MSM_SENSOR_RES_3, 1301 MSM_SENSOR_RES_4, 1302 MSM_SENSOR_RES_5, 1303 MSM_SENSOR_RES_6, 1304 MSM_SENSOR_RES_7, 1305 MSM_SENSOR_INVALID_RES, 1306 }; 1307 1308 struct msm_sensor_output_info_t { 1309 uint16_t x_output; 1310 uint16_t y_output; 1311 uint16_t line_length_pclk; 1312 uint16_t frame_length_lines; 1313 uint32_t vt_pixel_clk; 1314 uint32_t op_pixel_clk; 1315 uint16_t binning_factor; 1316 }; 1317 1318 struct sensor_output_info_t { 1319 struct msm_sensor_output_info_t *output_info; 1320 uint16_t num_info; 1321 }; 1322 1323 struct msm_sensor_exp_gain_info_t { 1324 uint16_t coarse_int_time_addr; 1325 uint16_t global_gain_addr; 1326 uint16_t vert_offset; 1327 }; 1328 1329 struct msm_sensor_output_reg_addr_t { 1330 uint16_t x_output; 1331 uint16_t y_output; 1332 uint16_t line_length_pclk; 1333 uint16_t frame_length_lines; 1334 }; 1335 1336 struct sensor_driver_params_type { 1337 struct msm_camera_i2c_reg_setting *init_settings; 1338 uint16_t init_settings_size; 1339 struct msm_camera_i2c_reg_setting *mode_settings; 1340 uint16_t mode_settings_size; 1341 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr; 1342 struct msm_camera_i2c_reg_setting *start_settings; 1343 struct msm_camera_i2c_reg_setting *stop_settings; 1344 struct msm_camera_i2c_reg_setting *groupon_settings; 1345 struct msm_camera_i2c_reg_setting *groupoff_settings; 1346 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info; 1347 struct msm_sensor_output_info_t *output_info; 1348 }; 1349 1350 struct mirror_flip { 1351 int32_t x_mirror; 1352 int32_t y_flip; 1353 }; 1354 1355 struct cord { 1356 uint32_t x; 1357 uint32_t y; 1358 }; 1359 1360 struct msm_eeprom_data_t { 1361 void *eeprom_data; 1362 uint16_t index; 1363 }; 1364 1365 struct msm_camera_csid_vc_cfg { 1366 uint8_t cid; 1367 uint8_t dt; 1368 uint8_t decode_format; 1369 }; 1370 1371 struct csi_lane_params_t { 1372 uint16_t csi_lane_assign; 1373 uint8_t csi_lane_mask; 1374 uint8_t csi_if; 1375 uint8_t csid_core[2]; 1376 uint8_t csi_phy_sel; 1377 }; 1378 1379 struct msm_camera_csid_lut_params { 1380 uint8_t num_cid; 1381 struct msm_camera_csid_vc_cfg *vc_cfg; 1382 }; 1383 1384 struct msm_camera_csid_params { 1385 uint8_t lane_cnt; 1386 uint16_t lane_assign; 1387 uint8_t phy_sel; 1388 struct msm_camera_csid_lut_params lut_params; 1389 }; 1390 1391 struct msm_camera_csiphy_params { 1392 uint8_t lane_cnt; 1393 uint8_t settle_cnt; 1394 uint16_t lane_mask; 1395 uint8_t combo_mode; 1396 uint8_t csid_core; 1397 }; 1398 1399 struct msm_camera_csi2_params { 1400 struct msm_camera_csid_params csid_params; 1401 struct msm_camera_csiphy_params csiphy_params; 1402 }; 1403 1404 enum msm_camera_csi_data_format { 1405 CSI_8BIT, 1406 CSI_10BIT, 1407 CSI_12BIT, 1408 }; 1409 1410 struct msm_camera_csi_params { 1411 enum msm_camera_csi_data_format data_format; 1412 uint8_t lane_cnt; 1413 uint8_t lane_assign; 1414 uint8_t settle_cnt; 1415 uint8_t dpcm_scheme; 1416 }; 1417 1418 enum csic_cfg_type_t { 1419 CSIC_INIT, 1420 CSIC_CFG, 1421 }; 1422 1423 struct csic_cfg_data { 1424 enum csic_cfg_type_t cfgtype; 1425 struct msm_camera_csi_params *csic_params; 1426 }; 1427 1428 enum csid_cfg_type_t { 1429 CSID_INIT, 1430 CSID_CFG, 1431 }; 1432 1433 struct csid_cfg_data { 1434 enum csid_cfg_type_t cfgtype; 1435 union { 1436 uint32_t csid_version; 1437 struct msm_camera_csid_params *csid_params; 1438 } cfg; 1439 }; 1440 1441 enum csiphy_cfg_type_t { 1442 CSIPHY_INIT, 1443 CSIPHY_CFG, 1444 }; 1445 1446 struct csiphy_cfg_data { 1447 enum csiphy_cfg_type_t cfgtype; 1448 struct msm_camera_csiphy_params *csiphy_params; 1449 }; 1450 1451 #define CSI_EMBED_DATA 0x12 1452 #define CSI_RESERVED_DATA_0 0x13 1453 #define CSI_YUV422_8 0x1E 1454 #define CSI_RAW8 0x2A 1455 #define CSI_RAW10 0x2B 1456 #define CSI_RAW12 0x2C 1457 1458 #define CSI_DECODE_6BIT 0 1459 #define CSI_DECODE_8BIT 1 1460 #define CSI_DECODE_10BIT 2 1461 #define CSI_DECODE_DPCM_10_8_10 5 1462 1463 #define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\ 1464 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT)) 1465 #define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0) 1466 #define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1) 1467 #define ISPIF_OFF_IMMEDIATELY (0x01 << 2) 1468 #define ISPIF_S_STREAM_SHIFT 4 1469 #define ISPIF_VFE_INTF_SHIFT 12 1470 1471 #define PIX_0 (0x01 << 0) 1472 #define RDI_0 (0x01 << 1) 1473 #define PIX_1 (0x01 << 2) 1474 #define RDI_1 (0x01 << 3) 1475 #define RDI_2 (0x01 << 4) 1476 1477 enum msm_ispif_vfe_intf { 1478 VFE0, 1479 VFE1, 1480 VFE_MAX, 1481 }; 1482 1483 enum msm_ispif_intftype { 1484 PIX0, 1485 RDI0, 1486 PIX1, 1487 RDI1, 1488 RDI2, 1489 INTF_MAX, 1490 }; 1491 1492 enum msm_ispif_vc { 1493 VC0, 1494 VC1, 1495 VC2, 1496 VC3, 1497 }; 1498 1499 enum msm_ispif_cid { 1500 CID0, 1501 CID1, 1502 CID2, 1503 CID3, 1504 CID4, 1505 CID5, 1506 CID6, 1507 CID7, 1508 CID8, 1509 CID9, 1510 CID10, 1511 CID11, 1512 CID12, 1513 CID13, 1514 CID14, 1515 CID15, 1516 }; 1517 1518 struct msm_ispif_params { 1519 uint8_t intftype; 1520 uint16_t cid_mask; 1521 uint8_t csid; 1522 uint8_t vfe_intf; 1523 }; 1524 1525 struct msm_ispif_params_list { 1526 uint32_t len; 1527 struct msm_ispif_params params[4]; 1528 }; 1529 1530 enum ispif_cfg_type_t { 1531 ISPIF_INIT, 1532 ISPIF_SET_CFG, 1533 ISPIF_SET_ON_FRAME_BOUNDARY, 1534 ISPIF_SET_OFF_FRAME_BOUNDARY, 1535 ISPIF_SET_OFF_IMMEDIATELY, 1536 ISPIF_RELEASE, 1537 }; 1538 1539 struct ispif_cfg_data { 1540 enum ispif_cfg_type_t cfgtype; 1541 union { 1542 uint32_t csid_version; 1543 int cmd; 1544 struct msm_ispif_params_list ispif_params; 1545 } cfg; 1546 }; 1547 1548 enum msm_camera_i2c_reg_addr_type { 1549 MSM_CAMERA_I2C_BYTE_ADDR = 1, 1550 MSM_CAMERA_I2C_WORD_ADDR, 1551 MSM_CAMERA_I2C_3B_ADDR, 1552 }; 1553 1554 struct msm_camera_i2c_reg_array { 1555 uint16_t reg_addr; 1556 uint16_t reg_data; 1557 }; 1558 1559 enum msm_camera_i2c_data_type { 1560 MSM_CAMERA_I2C_BYTE_DATA = 1, 1561 MSM_CAMERA_I2C_WORD_DATA, 1562 MSM_CAMERA_I2C_SET_BYTE_MASK, 1563 MSM_CAMERA_I2C_UNSET_BYTE_MASK, 1564 MSM_CAMERA_I2C_SET_WORD_MASK, 1565 MSM_CAMERA_I2C_UNSET_WORD_MASK, 1566 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA, 1567 }; 1568 1569 struct msm_camera_i2c_reg_setting { 1570 struct msm_camera_i2c_reg_array *reg_setting; 1571 uint16_t size; 1572 enum msm_camera_i2c_reg_addr_type addr_type; 1573 enum msm_camera_i2c_data_type data_type; 1574 uint16_t delay; 1575 }; 1576 1577 enum oem_setting_type { 1578 I2C_READ = 1, 1579 I2C_WRITE, 1580 GPIO_OP, 1581 EEPROM_READ, 1582 VREG_SET, 1583 CLK_SET, 1584 }; 1585 1586 struct sensor_oem_setting { 1587 enum oem_setting_type type; 1588 void *data; 1589 }; 1590 1591 enum camera_vreg_type { 1592 REG_LDO, 1593 REG_VS, 1594 REG_GPIO, 1595 }; 1596 1597 enum msm_camera_vreg_name_t { 1598 CAM_VDIG, 1599 CAM_VIO, 1600 CAM_VANA, 1601 CAM_VAF, 1602 CAM_VREG_MAX, 1603 }; 1604 1605 struct msm_camera_csi_lane_params { 1606 uint16_t csi_lane_assign; 1607 uint16_t csi_lane_mask; 1608 }; 1609 1610 struct camera_vreg_t { 1611 const char *reg_name; 1612 int min_voltage; 1613 int max_voltage; 1614 int op_mode; 1615 uint32_t delay; 1616 }; 1617 1618 struct msm_camera_vreg_setting { 1619 struct camera_vreg_t *cam_vreg; 1620 uint16_t num_vreg; 1621 uint8_t enable; 1622 }; 1623 1624 struct msm_cam_clk_info { 1625 const char *clk_name; 1626 long clk_rate; 1627 uint32_t delay; 1628 }; 1629 1630 struct msm_cam_clk_setting { 1631 struct msm_cam_clk_info *clk_info; 1632 uint16_t num_clk_info; 1633 uint8_t enable; 1634 }; 1635 1636 struct sensor_cfg_data { 1637 int cfgtype; 1638 int mode; 1639 int rs; 1640 uint8_t max_steps; 1641 1642 union { 1643 int8_t effect; 1644 uint8_t lens_shading; 1645 uint16_t prevl_pf; 1646 uint16_t prevp_pl; 1647 uint16_t pictl_pf; 1648 uint16_t pictp_pl; 1649 uint32_t pict_max_exp_lc; 1650 uint16_t p_fps; 1651 uint8_t iso_type; 1652 struct sensor_init_cfg init_info; 1653 struct sensor_pict_fps gfps; 1654 struct exp_gain_cfg exp_gain; 1655 struct focus_cfg focus; 1656 struct fps_cfg fps; 1657 struct wb_info_cfg wb_info; 1658 struct sensor_3d_exp_cfg sensor_3d_exp; 1659 struct sensor_calib_data calib_info; 1660 struct sensor_output_info_t output_info; 1661 struct msm_eeprom_data_t eeprom_data; 1662 struct csi_lane_params_t csi_lane_params; 1663 /* QRD */ 1664 uint16_t antibanding; 1665 uint8_t contrast; 1666 uint8_t saturation; 1667 uint8_t sharpness; 1668 int8_t brightness; 1669 int ae_mode; 1670 uint8_t wb_val; 1671 int8_t exp_compensation; 1672 uint32_t pclk; 1673 struct cord aec_cord; 1674 int is_autoflash; 1675 struct mirror_flip mirror_flip; 1676 void *setting; 1677 } cfg; 1678 }; 1679 1680 enum gpio_operation_type { 1681 GPIO_REQUEST, 1682 GPIO_FREE, 1683 GPIO_SET_DIRECTION_OUTPUT, 1684 GPIO_SET_DIRECTION_INPUT, 1685 GPIO_GET_VALUE, 1686 GPIO_SET_VALUE, 1687 }; 1688 1689 struct msm_cam_gpio_operation { 1690 enum gpio_operation_type op_type; 1691 unsigned address; 1692 int value; 1693 const char *tag; 1694 }; 1695 1696 struct damping_params_t { 1697 uint32_t damping_step; 1698 uint32_t damping_delay; 1699 uint32_t hw_params; 1700 }; 1701 1702 enum actuator_type { 1703 ACTUATOR_VCM, 1704 ACTUATOR_PIEZO, 1705 ACTUATOR_HVCM, 1706 ACTUATOR_BIVCM, 1707 }; 1708 1709 enum msm_actuator_data_type { 1710 MSM_ACTUATOR_BYTE_DATA = 1, 1711 MSM_ACTUATOR_WORD_DATA, 1712 }; 1713 1714 enum msm_actuator_addr_type { 1715 MSM_ACTUATOR_BYTE_ADDR = 1, 1716 MSM_ACTUATOR_WORD_ADDR, 1717 }; 1718 1719 enum msm_actuator_write_type { 1720 MSM_ACTUATOR_WRITE_HW_DAMP, 1721 MSM_ACTUATOR_WRITE_DAC, 1722 MSM_ACTUATOR_WRITE, 1723 MSM_ACTUATOR_WRITE_DIR_REG, 1724 MSM_ACTUATOR_POLL, 1725 MSM_ACTUATOR_READ_WRITE, 1726 }; 1727 1728 struct msm_actuator_reg_params_t { 1729 enum msm_actuator_write_type reg_write_type; 1730 uint32_t hw_mask; 1731 uint16_t reg_addr; 1732 uint16_t hw_shift; 1733 uint16_t data_type; 1734 uint16_t addr_type; 1735 uint16_t reg_data; 1736 uint16_t delay; 1737 }; 1738 1739 struct reg_settings_t { 1740 uint16_t reg_addr; 1741 uint16_t reg_data; 1742 }; 1743 1744 struct region_params_t { 1745 /* [0] = ForwardDirection Macro boundary 1746 [1] = ReverseDirection Inf boundary 1747 */ 1748 uint16_t step_bound[2]; 1749 uint16_t code_per_step; 1750 }; 1751 1752 struct msm_actuator_move_params_t { 1753 int8_t dir; 1754 int8_t sign_dir; 1755 int16_t dest_step_pos; 1756 int32_t num_steps; 1757 struct damping_params_t *ringing_params; 1758 }; 1759 1760 struct msm_actuator_tuning_params_t { 1761 int16_t initial_code; 1762 uint16_t pwd_step; 1763 uint16_t region_size; 1764 uint32_t total_steps; 1765 struct region_params_t *region_params; 1766 }; 1767 1768 struct msm_actuator_params_t { 1769 enum actuator_type act_type; 1770 uint8_t reg_tbl_size; 1771 uint16_t data_size; 1772 uint16_t init_setting_size; 1773 uint32_t i2c_addr; 1774 enum msm_actuator_addr_type i2c_addr_type; 1775 enum msm_actuator_data_type i2c_data_type; 1776 struct msm_actuator_reg_params_t *reg_tbl_params; 1777 struct reg_settings_t *init_settings; 1778 }; 1779 1780 struct msm_actuator_set_info_t { 1781 struct msm_actuator_params_t actuator_params; 1782 struct msm_actuator_tuning_params_t af_tuning_params; 1783 }; 1784 1785 struct msm_actuator_get_info_t { 1786 uint32_t focal_length_num; 1787 uint32_t focal_length_den; 1788 uint32_t f_number_num; 1789 uint32_t f_number_den; 1790 uint32_t f_pix_num; 1791 uint32_t f_pix_den; 1792 uint32_t total_f_dist_num; 1793 uint32_t total_f_dist_den; 1794 uint32_t hor_view_angle_num; 1795 uint32_t hor_view_angle_den; 1796 uint32_t ver_view_angle_num; 1797 uint32_t ver_view_angle_den; 1798 }; 1799 1800 enum af_camera_name { 1801 ACTUATOR_MAIN_CAM_0, 1802 ACTUATOR_MAIN_CAM_1, 1803 ACTUATOR_MAIN_CAM_2, 1804 ACTUATOR_MAIN_CAM_3, 1805 ACTUATOR_MAIN_CAM_4, 1806 ACTUATOR_MAIN_CAM_5, 1807 ACTUATOR_WEB_CAM_0, 1808 ACTUATOR_WEB_CAM_1, 1809 ACTUATOR_WEB_CAM_2, 1810 }; 1811 1812 struct msm_actuator_cfg_data { 1813 int cfgtype; 1814 uint8_t is_af_supported; 1815 union { 1816 struct msm_actuator_move_params_t move; 1817 struct msm_actuator_set_info_t set_info; 1818 struct msm_actuator_get_info_t get_info; 1819 enum af_camera_name cam_name; 1820 } cfg; 1821 }; 1822 1823 struct msm_eeprom_support { 1824 uint16_t is_supported; 1825 uint16_t size; 1826 uint16_t index; 1827 uint16_t qvalue; 1828 }; 1829 1830 struct msm_calib_wb { 1831 uint16_t r_over_g; 1832 uint16_t b_over_g; 1833 uint16_t gr_over_gb; 1834 }; 1835 1836 struct msm_calib_af { 1837 uint16_t macro_dac; 1838 uint16_t inf_dac; 1839 uint16_t start_dac; 1840 }; 1841 1842 struct msm_calib_lsc { 1843 uint16_t r_gain[221]; 1844 uint16_t b_gain[221]; 1845 uint16_t gr_gain[221]; 1846 uint16_t gb_gain[221]; 1847 }; 1848 1849 struct pixel_t { 1850 int x; 1851 int y; 1852 }; 1853 1854 struct msm_calib_dpc { 1855 uint16_t validcount; 1856 struct pixel_t snapshot_coord[128]; 1857 struct pixel_t preview_coord[128]; 1858 struct pixel_t video_coord[128]; 1859 }; 1860 1861 struct msm_calib_raw { 1862 uint8_t *data; 1863 uint32_t size; 1864 }; 1865 1866 struct msm_camera_eeprom_info_t { 1867 struct msm_eeprom_support af; 1868 struct msm_eeprom_support wb; 1869 struct msm_eeprom_support lsc; 1870 struct msm_eeprom_support dpc; 1871 struct msm_eeprom_support raw; 1872 }; 1873 1874 struct msm_eeprom_cfg_data { 1875 int cfgtype; 1876 uint8_t is_eeprom_supported; 1877 union { 1878 struct msm_eeprom_data_t get_data; 1879 struct msm_camera_eeprom_info_t get_info; 1880 } cfg; 1881 }; 1882 1883 struct sensor_large_data { 1884 int cfgtype; 1885 union { 1886 struct sensor_3d_cali_data_t sensor_3d_cali_data; 1887 } data; 1888 }; 1889 1890 enum sensor_type_t { 1891 BAYER, 1892 YUV, 1893 JPEG_SOC, 1894 }; 1895 1896 enum flash_type { 1897 LED_FLASH, 1898 STROBE_FLASH, 1899 }; 1900 1901 enum strobe_flash_ctrl_type { 1902 STROBE_FLASH_CTRL_INIT, 1903 STROBE_FLASH_CTRL_CHARGE, 1904 STROBE_FLASH_CTRL_RELEASE 1905 }; 1906 1907 struct strobe_flash_ctrl_data { 1908 enum strobe_flash_ctrl_type type; 1909 int charge_en; 1910 }; 1911 1912 struct msm_camera_info { 1913 int num_cameras; 1914 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS]; 1915 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS]; 1916 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS]; 1917 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS]; 1918 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS]; 1919 }; 1920 1921 struct msm_cam_config_dev_info { 1922 int num_config_nodes; 1923 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS]; 1924 int config_dev_id[MSM_MAX_CAMERA_CONFIGS]; 1925 }; 1926 1927 struct msm_mctl_node_info { 1928 int num_mctl_nodes; 1929 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS]; 1930 }; 1931 1932 struct flash_ctrl_data { 1933 int flashtype; 1934 union { 1935 int led_state; 1936 struct strobe_flash_ctrl_data strobe_ctrl; 1937 } ctrl_data; 1938 }; 1939 1940 #define GET_NAME 0 1941 #define GET_PREVIEW_LINE_PER_FRAME 1 1942 #define GET_PREVIEW_PIXELS_PER_LINE 2 1943 #define GET_SNAPSHOT_LINE_PER_FRAME 3 1944 #define GET_SNAPSHOT_PIXELS_PER_LINE 4 1945 #define GET_SNAPSHOT_FPS 5 1946 #define GET_SNAPSHOT_MAX_EP_LINE_CNT 6 1947 1948 struct msm_camsensor_info { 1949 char name[MAX_SENSOR_NAME]; 1950 uint8_t flash_enabled; 1951 uint8_t strobe_flash_enabled; 1952 uint8_t actuator_enabled; 1953 uint8_t ispif_supported; 1954 int8_t total_steps; 1955 uint8_t support_3d; 1956 enum flash_type flashtype; 1957 enum sensor_type_t sensor_type; 1958 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */ 1959 uint32_t camera_type; /* msm_camera_type */ 1960 int mount_angle; 1961 uint32_t max_width; 1962 uint32_t max_height; 1963 }; 1964 1965 #define V4L2_SINGLE_PLANE 0 1966 #define V4L2_MULTI_PLANE_Y 0 1967 #define V4L2_MULTI_PLANE_CBCR 1 1968 #define V4L2_MULTI_PLANE_CB 1 1969 #define V4L2_MULTI_PLANE_CR 2 1970 1971 struct plane_data { 1972 int plane_id; 1973 uint32_t offset; 1974 unsigned long size; 1975 }; 1976 1977 struct img_plane_info { 1978 uint32_t width; 1979 uint32_t height; 1980 uint32_t pixelformat; 1981 uint8_t buffer_type; /*Single/Multi planar*/ 1982 uint8_t output_port; 1983 uint32_t ext_mode; 1984 uint8_t num_planes; 1985 struct plane_data plane[MAX_PLANES]; 1986 uint32_t sp_y_offset; 1987 uint32_t inst_handle; 1988 }; 1989 1990 #define QCAMERA_NAME "qcamera" 1991 #define QCAMERA_SERVER_NAME "qcamera_server" 1992 #define QCAMERA_DEVICE_GROUP_ID 1 1993 #define QCAMERA_VNODE_GROUP_ID 2 1994 1995 enum msm_cam_subdev_type { 1996 CSIPHY_DEV, 1997 CSID_DEV, 1998 CSIC_DEV, 1999 ISPIF_DEV, 2000 VFE_DEV, 2001 AXI_DEV, 2002 VPE_DEV, 2003 SENSOR_DEV, 2004 ACTUATOR_DEV, 2005 EEPROM_DEV, 2006 GESTURE_DEV, 2007 IRQ_ROUTER_DEV, 2008 CPP_DEV, 2009 CCI_DEV, 2010 FLASH_DEV, 2011 }; 2012 2013 struct msm_mctl_set_sdev_data { 2014 uint32_t revision; 2015 enum msm_cam_subdev_type sdev_type; 2016 }; 2017 2018 #define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \ 2019 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 2020 2021 #define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \ 2022 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 2023 2024 #define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \ 2025 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t) 2026 2027 #define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \ 2028 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t) 2029 2030 #define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \ 2031 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t) 2032 2033 #define MSM_CAM_IOCTL_SEND_EVENT \ 2034 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event) 2035 2036 #define MSM_CAM_V4L2_IOCTL_CFG_VPE \ 2037 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd) 2038 2039 #define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \ 2040 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t) 2041 2042 #define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \ 2043 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t) 2044 2045 #define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \ 2046 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t) 2047 2048 #define VIDIOC_MSM_VPE_INIT \ 2049 _IO('V', BASE_VIDIOC_PRIVATE + 15) 2050 2051 #define VIDIOC_MSM_VPE_RELEASE \ 2052 _IO('V', BASE_VIDIOC_PRIVATE + 16) 2053 2054 #define VIDIOC_MSM_VPE_CFG \ 2055 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *) 2056 2057 #define VIDIOC_MSM_AXI_INIT \ 2058 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *) 2059 2060 #define VIDIOC_MSM_AXI_RELEASE \ 2061 _IO('V', BASE_VIDIOC_PRIVATE + 19) 2062 2063 #define VIDIOC_MSM_AXI_CFG \ 2064 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *) 2065 2066 #define VIDIOC_MSM_AXI_IRQ \ 2067 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *) 2068 2069 #define VIDIOC_MSM_AXI_BUF_CFG \ 2070 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *) 2071 2072 #define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \ 2073 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg) 2074 2075 #define VIDIOC_MSM_VFE_INIT \ 2076 _IO('V', BASE_VIDIOC_PRIVATE + 24) 2077 2078 #define VIDIOC_MSM_VFE_RELEASE \ 2079 _IO('V', BASE_VIDIOC_PRIVATE + 25) 2080 2081 struct msm_camera_v4l2_ioctl_t { 2082 uint32_t id; 2083 uint32_t len; 2084 uint32_t trans_code; 2085 void __user *ioctl_ptr; 2086 }; 2087 2088 struct msm_camera_vfe_params_t { 2089 uint32_t operation_mode; 2090 uint32_t capture_count; 2091 uint8_t skip_reset; 2092 uint8_t stop_immediately; 2093 uint16_t port_info; 2094 uint32_t inst_handle; 2095 uint16_t cmd_type; 2096 }; 2097 2098 enum msm_camss_irq_idx { 2099 CAMERA_SS_IRQ_0, 2100 CAMERA_SS_IRQ_1, 2101 CAMERA_SS_IRQ_2, 2102 CAMERA_SS_IRQ_3, 2103 CAMERA_SS_IRQ_4, 2104 CAMERA_SS_IRQ_5, 2105 CAMERA_SS_IRQ_6, 2106 CAMERA_SS_IRQ_7, 2107 CAMERA_SS_IRQ_8, 2108 CAMERA_SS_IRQ_9, 2109 CAMERA_SS_IRQ_10, 2110 CAMERA_SS_IRQ_11, 2111 CAMERA_SS_IRQ_12, 2112 CAMERA_SS_IRQ_MAX 2113 }; 2114 2115 enum msm_cam_hw_idx { 2116 MSM_CAM_HW_MICRO, 2117 MSM_CAM_HW_CCI, 2118 MSM_CAM_HW_CSI0, 2119 MSM_CAM_HW_CSI1, 2120 MSM_CAM_HW_CSI2, 2121 MSM_CAM_HW_CSI3, 2122 MSM_CAM_HW_ISPIF, 2123 MSM_CAM_HW_CPP, 2124 MSM_CAM_HW_VFE0, 2125 MSM_CAM_HW_VFE1, 2126 MSM_CAM_HW_JPEG0, 2127 MSM_CAM_HW_JPEG1, 2128 MSM_CAM_HW_JPEG2, 2129 MSM_CAM_HW_MAX 2130 }; 2131 2132 struct msm_camera_irq_cfg { 2133 /* Bit mask of all the camera hardwares that needs to 2134 * be composited into a single IRQ to the MSM. 2135 * Current usage: (may be updated based on hw changes) 2136 * Bits 31:13 - Reserved. 2137 * Bits 12:0 2138 * 12 - MSM_CAM_HW_JPEG2 2139 * 11 - MSM_CAM_HW_JPEG1 2140 * 10 - MSM_CAM_HW_JPEG0 2141 * 9 - MSM_CAM_HW_VFE1 2142 * 8 - MSM_CAM_HW_VFE0 2143 * 7 - MSM_CAM_HW_CPP 2144 * 6 - MSM_CAM_HW_ISPIF 2145 * 5 - MSM_CAM_HW_CSI3 2146 * 4 - MSM_CAM_HW_CSI2 2147 * 3 - MSM_CAM_HW_CSI1 2148 * 2 - MSM_CAM_HW_CSI0 2149 * 1 - MSM_CAM_HW_CCI 2150 * 0 - MSM_CAM_HW_MICRO 2151 */ 2152 uint32_t cam_hw_mask; 2153 uint8_t irq_idx; 2154 uint8_t num_hwcore; 2155 }; 2156 2157 #define MSM_IRQROUTER_CFG_COMPIRQ \ 2158 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *) 2159 2160 #define MAX_NUM_CPP_STRIPS 8 2161 2162 enum msm_cpp_frame_type { 2163 MSM_CPP_OFFLINE_FRAME, 2164 MSM_CPP_REALTIME_FRAME, 2165 }; 2166 2167 struct msm_cpp_frame_info_t { 2168 int32_t frame_id; 2169 uint32_t inst_id; 2170 uint32_t client_id; 2171 enum msm_cpp_frame_type frame_type; 2172 uint32_t num_strips; 2173 }; 2174 2175 struct msm_ver_num_info { 2176 uint32_t main; 2177 uint32_t minor; 2178 uint32_t rev; 2179 }; 2180 2181 #define VIDIOC_MSM_CPP_CFG \ 2182 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t) 2183 2184 #define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \ 2185 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 2186 2187 #define VIDIOC_MSM_CPP_GET_INST_INFO \ 2188 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 2189 2190 #define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0) 2191 2192 /* Instance Handle - inst_handle 2193 * Data bundle containing the information about where 2194 * to get a buffer for a particular camera instance. 2195 * This is a bitmask containing the following data: 2196 * Buffer Handle Bitmask: 2197 * ------------------------------------ 2198 * Bits : Purpose 2199 * ------------------------------------ 2200 * 31 : is Dev ID valid? 2201 * 30 - 24 : Dev ID. 2202 * 23 : is Image mode valid? 2203 * 22 - 16 : Image mode. 2204 * 15 : is MCTL PP inst idx valid? 2205 * 14 - 8 : MCTL PP inst idx. 2206 * 7 : is Video inst idx valid? 2207 * 6 - 0 : Video inst idx. 2208 */ 2209 #define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF) 2210 #define SET_DEVID_MODE(handle, data) \ 2211 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24))) 2212 #define GET_DEVID_MODE(handle) \ 2213 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF) 2214 2215 #define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF) 2216 #define SET_IMG_MODE(handle, data) \ 2217 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16))) 2218 #define GET_IMG_MODE(handle) \ 2219 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF) 2220 2221 #define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF) 2222 #define SET_MCTLPP_INST_IDX(handle, data) \ 2223 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8))) 2224 #define GET_MCTLPP_INST_IDX(handle) \ 2225 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF) 2226 2227 #define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00) 2228 #define GET_VIDEO_INST_IDX(handle) \ 2229 ((handle & 0x80) ? (handle & 0x7F) : 0xFF) 2230 #define SET_VIDEO_INST_IDX(handle, data) \ 2231 (handle |= (0x1 << 7) | (data & 0x7F)) 2232 2233 #endif /* __UAPI_MSM_CAMERA_H */ 2234
