1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300 2 Copyright (C) 1996-2014 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 #include "as.h" 22 #include "safe-ctype.h" 23 #include "subsegs.h" 24 #include "opcode/mn10300.h" 25 #include "dwarf2dbg.h" 26 #include "libiberty.h" 27 28 /* Structure to hold information about predefined registers. */ 30 struct reg_name 31 { 32 const char *name; 33 int value; 34 }; 35 36 /* Generic assembler global variables which must be defined by all 37 targets. */ 38 39 /* Characters which always start a comment. */ 40 const char comment_chars[] = "#"; 41 42 /* Characters which start a comment at the beginning of a line. */ 43 const char line_comment_chars[] = ";#"; 44 45 /* Characters which may be used to separate multiple commands on a 46 single line. */ 47 const char line_separator_chars[] = ";"; 48 49 /* Characters which are used to indicate an exponent in a floating 50 point number. */ 51 const char EXP_CHARS[] = "eE"; 52 53 /* Characters which mean that a number is a floating point constant, 54 as in 0d1.0. */ 55 const char FLT_CHARS[] = "dD"; 56 57 const relax_typeS md_relax_table[] = 59 { 60 /* The plus values for the bCC and fBCC instructions in the table below 61 are because the branch instruction is translated into a jump 62 instruction that is now +2 or +3 bytes further on in memory, and the 63 correct size of jump instruction must be selected. */ 64 /* bCC relaxing. */ 65 {0x7f, -0x80, 2, 1}, 66 {0x7fff + 2, -0x8000 + 2, 5, 2}, 67 {0x7fffffff, -0x80000000, 7, 0}, 68 69 /* bCC relaxing (uncommon cases for 3byte length instructions) */ 70 {0x7f, -0x80, 3, 4}, 71 {0x7fff + 3, -0x8000 + 3, 6, 5}, 72 {0x7fffffff, -0x80000000, 8, 0}, 73 74 /* call relaxing. */ 75 {0x7fff, -0x8000, 5, 7}, 76 {0x7fffffff, -0x80000000, 7, 0}, 77 78 /* calls relaxing. */ 79 {0x7fff, -0x8000, 4, 9}, 80 {0x7fffffff, -0x80000000, 6, 0}, 81 82 /* jmp relaxing. */ 83 {0x7f, -0x80, 2, 11}, 84 {0x7fff, -0x8000, 3, 12}, 85 {0x7fffffff, -0x80000000, 5, 0}, 86 87 /* fbCC relaxing. */ 88 {0x7f, -0x80, 3, 14}, 89 {0x7fff + 3, -0x8000 + 3, 6, 15}, 90 {0x7fffffff, -0x80000000, 8, 0}, 91 92 }; 93 94 /* Set linkrelax here to avoid fixups in most sections. */ 95 int linkrelax = 1; 96 97 static int current_machine; 98 99 /* Fixups. */ 100 #define MAX_INSN_FIXUPS 5 101 102 struct mn10300_fixup 103 { 104 expressionS exp; 105 int opindex; 106 bfd_reloc_code_real_type reloc; 107 }; 108 struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; 109 static int fc; 110 111 /* We must store the value of each register operand so that we can 112 verify that certain registers do not match. */ 113 int mn10300_reg_operands[MN10300_MAX_OPERANDS]; 114 115 const char *md_shortopts = ""; 117 118 struct option md_longopts[] = 119 { 120 {NULL, no_argument, NULL, 0} 121 }; 122 123 size_t md_longopts_size = sizeof (md_longopts); 124 125 #define HAVE_AM33_2 (current_machine == AM33_2) 126 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2) 127 #define HAVE_AM30 (current_machine == AM30) 128 129 /* Opcode hash table. */ 130 static struct hash_control *mn10300_hash; 131 132 /* This table is sorted. Suitable for searching by a binary search. */ 133 static const struct reg_name data_registers[] = 134 { 135 { "d0", 0 }, 136 { "d1", 1 }, 137 { "d2", 2 }, 138 { "d3", 3 }, 139 }; 140 141 static const struct reg_name address_registers[] = 142 { 143 { "a0", 0 }, 144 { "a1", 1 }, 145 { "a2", 2 }, 146 { "a3", 3 }, 147 }; 148 149 static const struct reg_name r_registers[] = 150 { 151 { "a0", 8 }, 152 { "a1", 9 }, 153 { "a2", 10 }, 154 { "a3", 11 }, 155 { "d0", 12 }, 156 { "d1", 13 }, 157 { "d2", 14 }, 158 { "d3", 15 }, 159 { "e0", 0 }, 160 { "e1", 1 }, 161 { "e10", 10 }, 162 { "e11", 11 }, 163 { "e12", 12 }, 164 { "e13", 13 }, 165 { "e14", 14 }, 166 { "e15", 15 }, 167 { "e2", 2 }, 168 { "e3", 3 }, 169 { "e4", 4 }, 170 { "e5", 5 }, 171 { "e6", 6 }, 172 { "e7", 7 }, 173 { "e8", 8 }, 174 { "e9", 9 }, 175 { "r0", 0 }, 176 { "r1", 1 }, 177 { "r10", 10 }, 178 { "r11", 11 }, 179 { "r12", 12 }, 180 { "r13", 13 }, 181 { "r14", 14 }, 182 { "r15", 15 }, 183 { "r2", 2 }, 184 { "r3", 3 }, 185 { "r4", 4 }, 186 { "r5", 5 }, 187 { "r6", 6 }, 188 { "r7", 7 }, 189 { "r8", 8 }, 190 { "r9", 9 }, 191 }; 192 193 static const struct reg_name xr_registers[] = 194 { 195 { "mcrh", 2 }, 196 { "mcrl", 3 }, 197 { "mcvf", 4 }, 198 { "mdrq", 1 }, 199 { "sp", 0 }, 200 { "xr0", 0 }, 201 { "xr1", 1 }, 202 { "xr10", 10 }, 203 { "xr11", 11 }, 204 { "xr12", 12 }, 205 { "xr13", 13 }, 206 { "xr14", 14 }, 207 { "xr15", 15 }, 208 { "xr2", 2 }, 209 { "xr3", 3 }, 210 { "xr4", 4 }, 211 { "xr5", 5 }, 212 { "xr6", 6 }, 213 { "xr7", 7 }, 214 { "xr8", 8 }, 215 { "xr9", 9 }, 216 }; 217 218 static const struct reg_name float_registers[] = 219 { 220 { "fs0", 0 }, 221 { "fs1", 1 }, 222 { "fs10", 10 }, 223 { "fs11", 11 }, 224 { "fs12", 12 }, 225 { "fs13", 13 }, 226 { "fs14", 14 }, 227 { "fs15", 15 }, 228 { "fs16", 16 }, 229 { "fs17", 17 }, 230 { "fs18", 18 }, 231 { "fs19", 19 }, 232 { "fs2", 2 }, 233 { "fs20", 20 }, 234 { "fs21", 21 }, 235 { "fs22", 22 }, 236 { "fs23", 23 }, 237 { "fs24", 24 }, 238 { "fs25", 25 }, 239 { "fs26", 26 }, 240 { "fs27", 27 }, 241 { "fs28", 28 }, 242 { "fs29", 29 }, 243 { "fs3", 3 }, 244 { "fs30", 30 }, 245 { "fs31", 31 }, 246 { "fs4", 4 }, 247 { "fs5", 5 }, 248 { "fs6", 6 }, 249 { "fs7", 7 }, 250 { "fs8", 8 }, 251 { "fs9", 9 }, 252 }; 253 254 static const struct reg_name double_registers[] = 255 { 256 { "fd0", 0 }, 257 { "fd10", 10 }, 258 { "fd12", 12 }, 259 { "fd14", 14 }, 260 { "fd16", 16 }, 261 { "fd18", 18 }, 262 { "fd2", 2 }, 263 { "fd20", 20 }, 264 { "fd22", 22 }, 265 { "fd24", 24 }, 266 { "fd26", 26 }, 267 { "fd28", 28 }, 268 { "fd30", 30 }, 269 { "fd4", 4 }, 270 { "fd6", 6 }, 271 { "fd8", 8 }, 272 }; 273 274 /* We abuse the `value' field, that would be otherwise unused, to 275 encode the architecture on which (access to) the register was 276 introduced. FIXME: we should probably warn when we encounter a 277 register name when assembling for an architecture that doesn't 278 support it, before parsing it as a symbol name. */ 279 static const struct reg_name other_registers[] = 280 { 281 { "epsw", AM33 }, 282 { "mdr", 0 }, 283 { "pc", AM33 }, 284 { "psw", 0 }, 285 { "sp", 0 }, 286 { "ssp", 0 }, 287 { "usp", 0 }, 288 }; 289 290 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers) 291 292 /* Perform a binary search of the given register table REGS to see 293 if NAME is a valid regiter name. Returns the register number from 294 the array on success, or -1 on failure. */ 295 296 static int 297 reg_name_search (const struct reg_name *regs, 298 int regcount, 299 const char *name) 300 { 301 int low, high; 302 303 low = 0; 304 high = regcount - 1; 305 306 do 307 { 308 int cmp, middle; 309 310 middle = (low + high) / 2; 311 cmp = strcasecmp (name, regs[middle].name); 312 if (cmp < 0) 313 high = middle - 1; 314 else if (cmp > 0) 315 low = middle + 1; 316 else 317 return regs[middle].value; 318 } 319 while (low <= high); 320 321 return -1; 322 } 323 324 /* Looks at the current position in the input line to see if it is 325 the name of a register in TABLE. If it is, then the name is 326 converted into an expression returned in EXPRESSIONP (with X_op 327 set to O_register and X_add_number set to the register number), the 328 input pointer is left pointing at the first non-blank character after 329 the name and the function returns TRUE. Otherwise the input pointer 330 is left alone and the function returns FALSE. */ 331 332 static bfd_boolean 333 get_register_name (expressionS * expressionP, 334 const struct reg_name * table, 335 size_t table_length) 336 { 337 int reg_number; 338 char *name; 339 char *start; 340 char c; 341 342 /* Find the spelling of the operand. */ 343 start = name = input_line_pointer; 344 345 c = get_symbol_end (); 346 reg_number = reg_name_search (table, table_length, name); 347 348 /* Put back the delimiting char. */ 349 *input_line_pointer = c; 350 351 /* Look to see if it's in the register table. */ 352 if (reg_number >= 0) 353 { 354 expressionP->X_op = O_register; 355 expressionP->X_add_number = reg_number; 356 357 /* Make the rest nice. */ 358 expressionP->X_add_symbol = NULL; 359 expressionP->X_op_symbol = NULL; 360 361 return TRUE; 362 } 363 364 /* Reset the line as if we had not done anything. */ 365 input_line_pointer = start; 366 return FALSE; 367 } 368 369 static bfd_boolean 370 r_register_name (expressionS *expressionP) 371 { 372 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers)); 373 } 374 375 376 static bfd_boolean 377 xr_register_name (expressionS *expressionP) 378 { 379 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers)); 380 } 381 382 static bfd_boolean 383 data_register_name (expressionS *expressionP) 384 { 385 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers)); 386 } 387 388 static bfd_boolean 389 address_register_name (expressionS *expressionP) 390 { 391 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers)); 392 } 393 394 static bfd_boolean 395 float_register_name (expressionS *expressionP) 396 { 397 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers)); 398 } 399 400 static bfd_boolean 401 double_register_name (expressionS *expressionP) 402 { 403 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers)); 404 } 405 406 static bfd_boolean 407 other_register_name (expressionS *expressionP) 408 { 409 int reg_number; 410 char *name; 411 char *start; 412 char c; 413 414 /* Find the spelling of the operand. */ 415 start = name = input_line_pointer; 416 417 c = get_symbol_end (); 418 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name); 419 420 /* Put back the delimiting char. */ 421 *input_line_pointer = c; 422 423 /* Look to see if it's in the register table. */ 424 if (reg_number == 0 425 || (reg_number == AM33 && HAVE_AM33)) 426 { 427 expressionP->X_op = O_register; 428 expressionP->X_add_number = 0; 429 430 /* Make the rest nice. */ 431 expressionP->X_add_symbol = NULL; 432 expressionP->X_op_symbol = NULL; 433 434 return TRUE; 435 } 436 437 /* Reset the line as if we had not done anything. */ 438 input_line_pointer = start; 439 return FALSE; 440 } 441 442 void 443 md_show_usage (FILE *stream) 444 { 445 fprintf (stream, _("MN10300 assembler options:\n\ 446 none yet\n")); 447 } 448 449 int 450 md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED) 451 { 452 return 0; 453 } 454 455 symbolS * 456 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 457 { 458 return 0; 459 } 460 461 char * 462 md_atof (int type, char *litp, int *sizep) 463 { 464 return ieee_md_atof (type, litp, sizep, FALSE); 465 } 466 467 void 468 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 469 asection *sec, 470 fragS *fragP) 471 { 472 static unsigned long label_count = 0; 473 char buf[40]; 474 475 subseg_change (sec, 0); 476 if (fragP->fr_subtype == 0) 477 { 478 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, 479 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 480 fragP->fr_var = 0; 481 fragP->fr_fix += 2; 482 } 483 else if (fragP->fr_subtype == 1) 484 { 485 /* Reverse the condition of the first branch. */ 486 int offset = fragP->fr_fix; 487 int opcode = fragP->fr_literal[offset] & 0xff; 488 489 switch (opcode) 490 { 491 case 0xc8: 492 opcode = 0xc9; 493 break; 494 case 0xc9: 495 opcode = 0xc8; 496 break; 497 case 0xc0: 498 opcode = 0xc2; 499 break; 500 case 0xc2: 501 opcode = 0xc0; 502 break; 503 case 0xc3: 504 opcode = 0xc1; 505 break; 506 case 0xc1: 507 opcode = 0xc3; 508 break; 509 case 0xc4: 510 opcode = 0xc6; 511 break; 512 case 0xc6: 513 opcode = 0xc4; 514 break; 515 case 0xc7: 516 opcode = 0xc5; 517 break; 518 case 0xc5: 519 opcode = 0xc7; 520 break; 521 default: 522 abort (); 523 } 524 fragP->fr_literal[offset] = opcode; 525 526 /* Create a fixup for the reversed conditional branch. */ 527 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 528 fix_new (fragP, fragP->fr_fix + 1, 1, 529 symbol_new (buf, sec, 0, fragP->fr_next), 530 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 531 532 /* Now create the unconditional branch + fixup to the 533 final target. */ 534 fragP->fr_literal[offset + 2] = 0xcc; 535 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, 536 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 537 fragP->fr_var = 0; 538 fragP->fr_fix += 5; 539 } 540 else if (fragP->fr_subtype == 2) 541 { 542 /* Reverse the condition of the first branch. */ 543 int offset = fragP->fr_fix; 544 int opcode = fragP->fr_literal[offset] & 0xff; 545 546 switch (opcode) 547 { 548 case 0xc8: 549 opcode = 0xc9; 550 break; 551 case 0xc9: 552 opcode = 0xc8; 553 break; 554 case 0xc0: 555 opcode = 0xc2; 556 break; 557 case 0xc2: 558 opcode = 0xc0; 559 break; 560 case 0xc3: 561 opcode = 0xc1; 562 break; 563 case 0xc1: 564 opcode = 0xc3; 565 break; 566 case 0xc4: 567 opcode = 0xc6; 568 break; 569 case 0xc6: 570 opcode = 0xc4; 571 break; 572 case 0xc7: 573 opcode = 0xc5; 574 break; 575 case 0xc5: 576 opcode = 0xc7; 577 break; 578 default: 579 abort (); 580 } 581 fragP->fr_literal[offset] = opcode; 582 583 /* Create a fixup for the reversed conditional branch. */ 584 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 585 fix_new (fragP, fragP->fr_fix + 1, 1, 586 symbol_new (buf, sec, 0, fragP->fr_next), 587 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 588 589 /* Now create the unconditional branch + fixup to the 590 final target. */ 591 fragP->fr_literal[offset + 2] = 0xdc; 592 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, 593 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 594 fragP->fr_var = 0; 595 fragP->fr_fix += 7; 596 } 597 else if (fragP->fr_subtype == 3) 598 { 599 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, 600 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 601 fragP->fr_var = 0; 602 fragP->fr_fix += 3; 603 } 604 else if (fragP->fr_subtype == 4) 605 { 606 /* Reverse the condition of the first branch. */ 607 int offset = fragP->fr_fix; 608 int opcode = fragP->fr_literal[offset + 1] & 0xff; 609 610 switch (opcode) 611 { 612 case 0xe8: 613 opcode = 0xe9; 614 break; 615 case 0xe9: 616 opcode = 0xe8; 617 break; 618 case 0xea: 619 opcode = 0xeb; 620 break; 621 case 0xeb: 622 opcode = 0xea; 623 break; 624 default: 625 abort (); 626 } 627 fragP->fr_literal[offset + 1] = opcode; 628 629 /* Create a fixup for the reversed conditional branch. */ 630 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 631 fix_new (fragP, fragP->fr_fix + 2, 1, 632 symbol_new (buf, sec, 0, fragP->fr_next), 633 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 634 635 /* Now create the unconditional branch + fixup to the 636 final target. */ 637 fragP->fr_literal[offset + 3] = 0xcc; 638 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, 639 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 640 fragP->fr_var = 0; 641 fragP->fr_fix += 6; 642 } 643 else if (fragP->fr_subtype == 5) 644 { 645 /* Reverse the condition of the first branch. */ 646 int offset = fragP->fr_fix; 647 int opcode = fragP->fr_literal[offset + 1] & 0xff; 648 649 switch (opcode) 650 { 651 case 0xe8: 652 opcode = 0xe9; 653 break; 654 case 0xea: 655 opcode = 0xeb; 656 break; 657 case 0xeb: 658 opcode = 0xea; 659 break; 660 default: 661 abort (); 662 } 663 fragP->fr_literal[offset + 1] = opcode; 664 665 /* Create a fixup for the reversed conditional branch. */ 666 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 667 fix_new (fragP, fragP->fr_fix + 2, 1, 668 symbol_new (buf, sec, 0, fragP->fr_next), 669 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 670 671 /* Now create the unconditional branch + fixup to the 672 final target. */ 673 fragP->fr_literal[offset + 3] = 0xdc; 674 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 675 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 676 fragP->fr_var = 0; 677 fragP->fr_fix += 8; 678 } 679 else if (fragP->fr_subtype == 6) 680 { 681 int offset = fragP->fr_fix; 682 683 fragP->fr_literal[offset] = 0xcd; 684 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, 685 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 686 fragP->fr_var = 0; 687 fragP->fr_fix += 5; 688 } 689 else if (fragP->fr_subtype == 7) 690 { 691 int offset = fragP->fr_fix; 692 693 fragP->fr_literal[offset] = 0xdd; 694 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; 695 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; 696 fragP->fr_literal[offset + 3] = 0; 697 fragP->fr_literal[offset + 4] = 0; 698 699 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, 700 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 701 fragP->fr_var = 0; 702 fragP->fr_fix += 7; 703 } 704 else if (fragP->fr_subtype == 8) 705 { 706 int offset = fragP->fr_fix; 707 708 fragP->fr_literal[offset] = 0xfa; 709 fragP->fr_literal[offset + 1] = 0xff; 710 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 711 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); 712 fragP->fr_var = 0; 713 fragP->fr_fix += 4; 714 } 715 else if (fragP->fr_subtype == 9) 716 { 717 int offset = fragP->fr_fix; 718 719 fragP->fr_literal[offset] = 0xfc; 720 fragP->fr_literal[offset + 1] = 0xff; 721 722 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, 723 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); 724 fragP->fr_var = 0; 725 fragP->fr_fix += 6; 726 } 727 else if (fragP->fr_subtype == 10) 728 { 729 fragP->fr_literal[fragP->fr_fix] = 0xca; 730 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, 731 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 732 fragP->fr_var = 0; 733 fragP->fr_fix += 2; 734 } 735 else if (fragP->fr_subtype == 11) 736 { 737 int offset = fragP->fr_fix; 738 739 fragP->fr_literal[offset] = 0xcc; 740 741 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, 742 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 743 fragP->fr_var = 0; 744 fragP->fr_fix += 3; 745 } 746 else if (fragP->fr_subtype == 12) 747 { 748 int offset = fragP->fr_fix; 749 750 fragP->fr_literal[offset] = 0xdc; 751 752 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, 753 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 754 fragP->fr_var = 0; 755 fragP->fr_fix += 5; 756 } 757 else if (fragP->fr_subtype == 13) 758 { 759 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, 760 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 761 fragP->fr_var = 0; 762 fragP->fr_fix += 3; 763 } 764 else if (fragP->fr_subtype == 14) 765 { 766 /* Reverse the condition of the first branch. */ 767 int offset = fragP->fr_fix; 768 int opcode = fragP->fr_literal[offset + 1] & 0xff; 769 770 switch (opcode) 771 { 772 case 0xd0: 773 opcode = 0xd1; 774 break; 775 case 0xd1: 776 opcode = 0xd0; 777 break; 778 case 0xd2: 779 opcode = 0xdc; 780 break; 781 case 0xd3: 782 opcode = 0xdb; 783 break; 784 case 0xd4: 785 opcode = 0xda; 786 break; 787 case 0xd5: 788 opcode = 0xd9; 789 break; 790 case 0xd6: 791 opcode = 0xd8; 792 break; 793 case 0xd7: 794 opcode = 0xdd; 795 break; 796 case 0xd8: 797 opcode = 0xd6; 798 break; 799 case 0xd9: 800 opcode = 0xd5; 801 break; 802 case 0xda: 803 opcode = 0xd4; 804 break; 805 case 0xdb: 806 opcode = 0xd3; 807 break; 808 case 0xdc: 809 opcode = 0xd2; 810 break; 811 case 0xdd: 812 opcode = 0xd7; 813 break; 814 default: 815 abort (); 816 } 817 fragP->fr_literal[offset + 1] = opcode; 818 819 /* Create a fixup for the reversed conditional branch. */ 820 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 821 fix_new (fragP, fragP->fr_fix + 2, 1, 822 symbol_new (buf, sec, 0, fragP->fr_next), 823 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 824 825 /* Now create the unconditional branch + fixup to the 826 final target. */ 827 fragP->fr_literal[offset + 3] = 0xcc; 828 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, 829 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 830 fragP->fr_var = 0; 831 fragP->fr_fix += 6; 832 } 833 else if (fragP->fr_subtype == 15) 834 { 835 /* Reverse the condition of the first branch. */ 836 int offset = fragP->fr_fix; 837 int opcode = fragP->fr_literal[offset + 1] & 0xff; 838 839 switch (opcode) 840 { 841 case 0xd0: 842 opcode = 0xd1; 843 break; 844 case 0xd1: 845 opcode = 0xd0; 846 break; 847 case 0xd2: 848 opcode = 0xdc; 849 break; 850 case 0xd3: 851 opcode = 0xdb; 852 break; 853 case 0xd4: 854 opcode = 0xda; 855 break; 856 case 0xd5: 857 opcode = 0xd9; 858 break; 859 case 0xd6: 860 opcode = 0xd8; 861 break; 862 case 0xd7: 863 opcode = 0xdd; 864 break; 865 case 0xd8: 866 opcode = 0xd6; 867 break; 868 case 0xd9: 869 opcode = 0xd5; 870 break; 871 case 0xda: 872 opcode = 0xd4; 873 break; 874 case 0xdb: 875 opcode = 0xd3; 876 break; 877 case 0xdc: 878 opcode = 0xd2; 879 break; 880 case 0xdd: 881 opcode = 0xd7; 882 break; 883 default: 884 abort (); 885 } 886 fragP->fr_literal[offset + 1] = opcode; 887 888 /* Create a fixup for the reversed conditional branch. */ 889 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 890 fix_new (fragP, fragP->fr_fix + 2, 1, 891 symbol_new (buf, sec, 0, fragP->fr_next), 892 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 893 894 /* Now create the unconditional branch + fixup to the 895 final target. */ 896 fragP->fr_literal[offset + 3] = 0xdc; 897 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 898 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 899 fragP->fr_var = 0; 900 fragP->fr_fix += 8; 901 } 902 else 903 abort (); 904 } 905 906 valueT 907 md_section_align (asection *seg, valueT addr) 908 { 909 int align = bfd_get_section_alignment (stdoutput, seg); 910 911 return ((addr + (1 << align) - 1) & (-1 << align)); 912 } 913 914 void 915 md_begin (void) 916 { 917 char *prev_name = ""; 918 const struct mn10300_opcode *op; 919 920 mn10300_hash = hash_new (); 921 922 /* Insert unique names into hash table. The MN10300 instruction set 923 has many identical opcode names that have different opcodes based 924 on the operands. This hash table then provides a quick index to 925 the first opcode with a particular name in the opcode table. */ 926 927 op = mn10300_opcodes; 928 while (op->name) 929 { 930 if (strcmp (prev_name, op->name)) 931 { 932 prev_name = (char *) op->name; 933 hash_insert (mn10300_hash, op->name, (char *) op); 934 } 935 op++; 936 } 937 938 /* Set the default machine type. */ 939 #ifdef TE_LINUX 940 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2)) 941 as_warn (_("could not set architecture and machine")); 942 943 current_machine = AM33_2; 944 #else 945 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103)) 946 as_warn (_("could not set architecture and machine")); 947 948 current_machine = MN103; 949 #endif 950 } 951 952 static symbolS *GOT_symbol; 953 954 static inline int 955 mn10300_PIC_related_p (symbolS *sym) 956 { 957 expressionS *exp; 958 959 if (! sym) 960 return 0; 961 962 if (sym == GOT_symbol) 963 return 1; 964 965 exp = symbol_get_value_expression (sym); 966 967 return (exp->X_op == O_PIC_reloc 968 || mn10300_PIC_related_p (exp->X_add_symbol) 969 || mn10300_PIC_related_p (exp->X_op_symbol)); 970 } 971 972 static inline int 973 mn10300_check_fixup (struct mn10300_fixup *fixup) 974 { 975 expressionS *exp = &fixup->exp; 976 977 repeat: 978 switch (exp->X_op) 979 { 980 case O_add: 981 case O_subtract: /* If we're sufficiently unlucky that the label 982 and the expression that references it happen 983 to end up in different frags, the subtract 984 won't be simplified within expression(). */ 985 /* The PIC-related operand must be the first operand of a sum. */ 986 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol)) 987 return 1; 988 989 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 990 fixup->reloc = BFD_RELOC_32_GOT_PCREL; 991 992 exp = symbol_get_value_expression (exp->X_add_symbol); 993 goto repeat; 994 995 case O_symbol: 996 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 997 fixup->reloc = BFD_RELOC_32_GOT_PCREL; 998 break; 999 1000 case O_PIC_reloc: 1001 fixup->reloc = exp->X_md; 1002 exp->X_op = O_symbol; 1003 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL 1004 && fixup->opindex >= 0 1005 && (mn10300_operands[fixup->opindex].flags 1006 & MN10300_OPERAND_RELAX)) 1007 return 1; 1008 break; 1009 1010 default: 1011 return (mn10300_PIC_related_p (exp->X_add_symbol) 1012 || mn10300_PIC_related_p (exp->X_op_symbol)); 1013 } 1014 1015 return 0; 1016 } 1017 1018 void 1019 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 1020 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED) 1021 { 1022 struct mn10300_fixup fixup; 1023 1024 fixup.opindex = -1; 1025 fixup.exp = *exp; 1026 fixup.reloc = BFD_RELOC_UNUSED; 1027 1028 mn10300_check_fixup (&fixup); 1029 1030 if (fixup.reloc == BFD_RELOC_MN10300_GOT32) 1031 switch (size) 1032 { 1033 case 2: 1034 fixup.reloc = BFD_RELOC_MN10300_GOT16; 1035 break; 1036 1037 case 3: 1038 fixup.reloc = BFD_RELOC_MN10300_GOT24; 1039 break; 1040 1041 case 4: 1042 break; 1043 1044 default: 1045 goto error; 1046 } 1047 else if (fixup.reloc == BFD_RELOC_UNUSED) 1048 switch (size) 1049 { 1050 case 1: 1051 fixup.reloc = BFD_RELOC_8; 1052 break; 1053 1054 case 2: 1055 fixup.reloc = BFD_RELOC_16; 1056 break; 1057 1058 case 3: 1059 fixup.reloc = BFD_RELOC_24; 1060 break; 1061 1062 case 4: 1063 fixup.reloc = BFD_RELOC_32; 1064 break; 1065 1066 default: 1067 goto error; 1068 } 1069 else if (size != 4) 1070 { 1071 error: 1072 as_bad (_("unsupported BFD relocation size %u"), size); 1073 fixup.reloc = BFD_RELOC_UNUSED; 1074 } 1075 1076 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc); 1077 } 1078 1079 static bfd_boolean 1080 check_operand (const struct mn10300_operand *operand, 1081 offsetT val) 1082 { 1083 /* No need to check 32bit operands for a bit. Note that 1084 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ 1085 if (operand->bits != 32 1086 && (operand->flags & MN10300_OPERAND_SPLIT) == 0) 1087 { 1088 long min, max; 1089 offsetT test; 1090 int bits; 1091 1092 bits = operand->bits; 1093 if (operand->flags & MN10300_OPERAND_24BIT) 1094 bits = 24; 1095 1096 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) 1097 { 1098 max = (1 << (bits - 1)) - 1; 1099 min = - (1 << (bits - 1)); 1100 } 1101 else 1102 { 1103 max = (1 << bits) - 1; 1104 min = 0; 1105 } 1106 1107 test = val; 1108 1109 if (test < (offsetT) min || test > (offsetT) max) 1110 return FALSE; 1111 } 1112 return TRUE; 1113 } 1114 1115 /* Insert an operand value into an instruction. */ 1116 1117 static void 1118 mn10300_insert_operand (unsigned long *insnp, 1119 unsigned long *extensionp, 1120 const struct mn10300_operand *operand, 1121 offsetT val, 1122 char *file, 1123 unsigned int line, 1124 unsigned int shift) 1125 { 1126 /* No need to check 32bit operands for a bit. Note that 1127 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ 1128 if (operand->bits != 32 1129 && (operand->flags & MN10300_OPERAND_SPLIT) == 0) 1130 { 1131 long min, max; 1132 offsetT test; 1133 int bits; 1134 1135 bits = operand->bits; 1136 if (operand->flags & MN10300_OPERAND_24BIT) 1137 bits = 24; 1138 1139 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) 1140 { 1141 max = (1 << (bits - 1)) - 1; 1142 min = - (1 << (bits - 1)); 1143 } 1144 else 1145 { 1146 max = (1 << bits) - 1; 1147 min = 0; 1148 } 1149 1150 test = val; 1151 1152 if (test < (offsetT) min || test > (offsetT) max) 1153 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line); 1154 } 1155 1156 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) 1157 { 1158 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); 1159 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) 1160 << operand->shift); 1161 } 1162 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) 1163 { 1164 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1); 1165 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1)) 1166 << operand->shift); 1167 } 1168 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG))) 1169 { 1170 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an 1171 explanation of these variables. Note that FMT-implied shifts 1172 are not taken into account for FP registers. */ 1173 unsigned long mask_low, mask_high; 1174 int shl_low, shr_high, shl_high; 1175 1176 switch (operand->bits) 1177 { 1178 case 5: 1179 /* Handle regular FP registers. */ 1180 if (operand->shift >= 0) 1181 { 1182 /* This is an `m' register. */ 1183 shl_low = operand->shift; 1184 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4; 1185 } 1186 else 1187 { 1188 /* This is an `n' register. */ 1189 shl_low = -operand->shift; 1190 shl_high = shl_low / 4; 1191 } 1192 1193 mask_low = 0x0f; 1194 mask_high = 0x10; 1195 shr_high = 4; 1196 break; 1197 1198 case 3: 1199 /* Handle accumulators. */ 1200 shl_low = -operand->shift; 1201 shl_high = 0; 1202 mask_low = 0x03; 1203 mask_high = 0x04; 1204 shr_high = 2; 1205 break; 1206 1207 default: 1208 abort (); 1209 } 1210 *insnp |= ((((val & mask_high) >> shr_high) << shl_high) 1211 | ((val & mask_low) << shl_low)); 1212 } 1213 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) 1214 { 1215 *insnp |= (((long) val & ((1 << operand->bits) - 1)) 1216 << (operand->shift + shift)); 1217 1218 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) 1219 *insnp |= (((long) val & ((1 << operand->bits) - 1)) 1220 << (operand->shift + shift + operand->bits)); 1221 } 1222 else 1223 { 1224 *extensionp |= (((long) val & ((1 << operand->bits) - 1)) 1225 << (operand->shift + shift)); 1226 1227 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) 1228 *extensionp |= (((long) val & ((1 << operand->bits) - 1)) 1229 << (operand->shift + shift + operand->bits)); 1230 } 1231 } 1232 1233 void 1234 md_assemble (char *str) 1235 { 1236 char *s; 1237 struct mn10300_opcode *opcode; 1238 struct mn10300_opcode *next_opcode; 1239 const unsigned char *opindex_ptr; 1240 int next_opindex, relaxable; 1241 unsigned long insn, extension, size = 0; 1242 char *f; 1243 int i; 1244 int match; 1245 1246 /* Get the opcode. */ 1247 for (s = str; *s != '\0' && !ISSPACE (*s); s++) 1248 ; 1249 if (*s != '\0') 1250 *s++ = '\0'; 1251 1252 /* Find the first opcode with the proper name. */ 1253 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str); 1254 if (opcode == NULL) 1255 { 1256 as_bad (_("Unrecognized opcode: `%s'"), str); 1257 return; 1258 } 1259 1260 str = s; 1261 while (ISSPACE (*str)) 1262 ++str; 1263 1264 input_line_pointer = str; 1265 1266 for (;;) 1267 { 1268 const char *errmsg; 1269 int op_idx; 1270 char *hold; 1271 int extra_shift = 0; 1272 1273 errmsg = _("Invalid opcode/operands"); 1274 1275 /* Reset the array of register operands. */ 1276 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); 1277 1278 relaxable = 0; 1279 fc = 0; 1280 match = 0; 1281 next_opindex = 0; 1282 insn = opcode->opcode; 1283 extension = 0; 1284 1285 /* If the instruction is not available on the current machine 1286 then it can not possibly match. */ 1287 if (opcode->machine 1288 && !(opcode->machine == AM33_2 && HAVE_AM33_2) 1289 && !(opcode->machine == AM33 && HAVE_AM33) 1290 && !(opcode->machine == AM30 && HAVE_AM30)) 1291 goto error; 1292 1293 for (op_idx = 1, opindex_ptr = opcode->operands; 1294 *opindex_ptr != 0; 1295 opindex_ptr++, op_idx++) 1296 { 1297 const struct mn10300_operand *operand; 1298 expressionS ex; 1299 1300 if (next_opindex == 0) 1301 { 1302 operand = &mn10300_operands[*opindex_ptr]; 1303 } 1304 else 1305 { 1306 operand = &mn10300_operands[next_opindex]; 1307 next_opindex = 0; 1308 } 1309 1310 while (*str == ' ' || *str == ',') 1311 ++str; 1312 1313 if (operand->flags & MN10300_OPERAND_RELAX) 1314 relaxable = 1; 1315 1316 /* Gather the operand. */ 1317 hold = input_line_pointer; 1318 input_line_pointer = str; 1319 1320 if (operand->flags & MN10300_OPERAND_PAREN) 1321 { 1322 if (*input_line_pointer != ')' && *input_line_pointer != '(') 1323 { 1324 input_line_pointer = hold; 1325 str = hold; 1326 goto error; 1327 } 1328 input_line_pointer++; 1329 goto keep_going; 1330 } 1331 /* See if we can match the operands. */ 1332 else if (operand->flags & MN10300_OPERAND_DREG) 1333 { 1334 if (!data_register_name (&ex)) 1335 { 1336 input_line_pointer = hold; 1337 str = hold; 1338 goto error; 1339 } 1340 } 1341 else if (operand->flags & MN10300_OPERAND_AREG) 1342 { 1343 if (!address_register_name (&ex)) 1344 { 1345 input_line_pointer = hold; 1346 str = hold; 1347 goto error; 1348 } 1349 } 1350 else if (operand->flags & MN10300_OPERAND_SP) 1351 { 1352 char *start = input_line_pointer; 1353 char c = get_symbol_end (); 1354 1355 if (strcasecmp (start, "sp") != 0) 1356 { 1357 *input_line_pointer = c; 1358 input_line_pointer = hold; 1359 str = hold; 1360 goto error; 1361 } 1362 *input_line_pointer = c; 1363 goto keep_going; 1364 } 1365 else if (operand->flags & MN10300_OPERAND_RREG) 1366 { 1367 if (!r_register_name (&ex)) 1368 { 1369 input_line_pointer = hold; 1370 str = hold; 1371 goto error; 1372 } 1373 } 1374 else if (operand->flags & MN10300_OPERAND_XRREG) 1375 { 1376 if (!xr_register_name (&ex)) 1377 { 1378 input_line_pointer = hold; 1379 str = hold; 1380 goto error; 1381 } 1382 } 1383 else if (operand->flags & MN10300_OPERAND_FSREG) 1384 { 1385 if (!float_register_name (&ex)) 1386 { 1387 input_line_pointer = hold; 1388 str = hold; 1389 goto error; 1390 } 1391 } 1392 else if (operand->flags & MN10300_OPERAND_FDREG) 1393 { 1394 if (!double_register_name (&ex)) 1395 { 1396 input_line_pointer = hold; 1397 str = hold; 1398 goto error; 1399 } 1400 } 1401 else if (operand->flags & MN10300_OPERAND_FPCR) 1402 { 1403 char *start = input_line_pointer; 1404 char c = get_symbol_end (); 1405 1406 if (strcasecmp (start, "fpcr") != 0) 1407 { 1408 *input_line_pointer = c; 1409 input_line_pointer = hold; 1410 str = hold; 1411 goto error; 1412 } 1413 *input_line_pointer = c; 1414 goto keep_going; 1415 } 1416 else if (operand->flags & MN10300_OPERAND_USP) 1417 { 1418 char *start = input_line_pointer; 1419 char c = get_symbol_end (); 1420 1421 if (strcasecmp (start, "usp") != 0) 1422 { 1423 *input_line_pointer = c; 1424 input_line_pointer = hold; 1425 str = hold; 1426 goto error; 1427 } 1428 *input_line_pointer = c; 1429 goto keep_going; 1430 } 1431 else if (operand->flags & MN10300_OPERAND_SSP) 1432 { 1433 char *start = input_line_pointer; 1434 char c = get_symbol_end (); 1435 1436 if (strcasecmp (start, "ssp") != 0) 1437 { 1438 *input_line_pointer = c; 1439 input_line_pointer = hold; 1440 str = hold; 1441 goto error; 1442 } 1443 *input_line_pointer = c; 1444 goto keep_going; 1445 } 1446 else if (operand->flags & MN10300_OPERAND_MSP) 1447 { 1448 char *start = input_line_pointer; 1449 char c = get_symbol_end (); 1450 1451 if (strcasecmp (start, "msp") != 0) 1452 { 1453 *input_line_pointer = c; 1454 input_line_pointer = hold; 1455 str = hold; 1456 goto error; 1457 } 1458 *input_line_pointer = c; 1459 goto keep_going; 1460 } 1461 else if (operand->flags & MN10300_OPERAND_PC) 1462 { 1463 char *start = input_line_pointer; 1464 char c = get_symbol_end (); 1465 1466 if (strcasecmp (start, "pc") != 0) 1467 { 1468 *input_line_pointer = c; 1469 input_line_pointer = hold; 1470 str = hold; 1471 goto error; 1472 } 1473 *input_line_pointer = c; 1474 goto keep_going; 1475 } 1476 else if (operand->flags & MN10300_OPERAND_EPSW) 1477 { 1478 char *start = input_line_pointer; 1479 char c = get_symbol_end (); 1480 1481 if (strcasecmp (start, "epsw") != 0) 1482 { 1483 *input_line_pointer = c; 1484 input_line_pointer = hold; 1485 str = hold; 1486 goto error; 1487 } 1488 *input_line_pointer = c; 1489 goto keep_going; 1490 } 1491 else if (operand->flags & MN10300_OPERAND_PLUS) 1492 { 1493 if (*input_line_pointer != '+') 1494 { 1495 input_line_pointer = hold; 1496 str = hold; 1497 goto error; 1498 } 1499 input_line_pointer++; 1500 goto keep_going; 1501 } 1502 else if (operand->flags & MN10300_OPERAND_PSW) 1503 { 1504 char *start = input_line_pointer; 1505 char c = get_symbol_end (); 1506 1507 if (strcasecmp (start, "psw") != 0) 1508 { 1509 *input_line_pointer = c; 1510 input_line_pointer = hold; 1511 str = hold; 1512 goto error; 1513 } 1514 *input_line_pointer = c; 1515 goto keep_going; 1516 } 1517 else if (operand->flags & MN10300_OPERAND_MDR) 1518 { 1519 char *start = input_line_pointer; 1520 char c = get_symbol_end (); 1521 1522 if (strcasecmp (start, "mdr") != 0) 1523 { 1524 *input_line_pointer = c; 1525 input_line_pointer = hold; 1526 str = hold; 1527 goto error; 1528 } 1529 *input_line_pointer = c; 1530 goto keep_going; 1531 } 1532 else if (operand->flags & MN10300_OPERAND_REG_LIST) 1533 { 1534 unsigned int value = 0; 1535 if (*input_line_pointer != '[') 1536 { 1537 input_line_pointer = hold; 1538 str = hold; 1539 goto error; 1540 } 1541 1542 /* Eat the '['. */ 1543 input_line_pointer++; 1544 1545 /* We used to reject a null register list here; however, 1546 we accept it now so the compiler can emit "call" 1547 instructions for all calls to named functions. 1548 1549 The linker can then fill in the appropriate bits for the 1550 register list and stack size or change the instruction 1551 into a "calls" if using "call" is not profitable. */ 1552 while (*input_line_pointer != ']') 1553 { 1554 char *start; 1555 char c; 1556 1557 if (*input_line_pointer == ',') 1558 input_line_pointer++; 1559 1560 start = input_line_pointer; 1561 c = get_symbol_end (); 1562 1563 if (strcasecmp (start, "d2") == 0) 1564 { 1565 value |= 0x80; 1566 *input_line_pointer = c; 1567 } 1568 else if (strcasecmp (start, "d3") == 0) 1569 { 1570 value |= 0x40; 1571 *input_line_pointer = c; 1572 } 1573 else if (strcasecmp (start, "a2") == 0) 1574 { 1575 value |= 0x20; 1576 *input_line_pointer = c; 1577 } 1578 else if (strcasecmp (start, "a3") == 0) 1579 { 1580 value |= 0x10; 1581 *input_line_pointer = c; 1582 } 1583 else if (strcasecmp (start, "other") == 0) 1584 { 1585 value |= 0x08; 1586 *input_line_pointer = c; 1587 } 1588 else if (HAVE_AM33 1589 && strcasecmp (start, "exreg0") == 0) 1590 { 1591 value |= 0x04; 1592 *input_line_pointer = c; 1593 } 1594 else if (HAVE_AM33 1595 && strcasecmp (start, "exreg1") == 0) 1596 { 1597 value |= 0x02; 1598 *input_line_pointer = c; 1599 } 1600 else if (HAVE_AM33 1601 && strcasecmp (start, "exother") == 0) 1602 { 1603 value |= 0x01; 1604 *input_line_pointer = c; 1605 } 1606 else if (HAVE_AM33 1607 && strcasecmp (start, "all") == 0) 1608 { 1609 value |= 0xff; 1610 *input_line_pointer = c; 1611 } 1612 else 1613 { 1614 input_line_pointer = hold; 1615 str = hold; 1616 goto error; 1617 } 1618 } 1619 input_line_pointer++; 1620 mn10300_insert_operand (& insn, & extension, operand, 1621 value, NULL, 0, 0); 1622 goto keep_going; 1623 1624 } 1625 else if (data_register_name (&ex)) 1626 { 1627 input_line_pointer = hold; 1628 str = hold; 1629 goto error; 1630 } 1631 else if (address_register_name (&ex)) 1632 { 1633 input_line_pointer = hold; 1634 str = hold; 1635 goto error; 1636 } 1637 else if (other_register_name (&ex)) 1638 { 1639 input_line_pointer = hold; 1640 str = hold; 1641 goto error; 1642 } 1643 else if (HAVE_AM33 && r_register_name (&ex)) 1644 { 1645 input_line_pointer = hold; 1646 str = hold; 1647 goto error; 1648 } 1649 else if (HAVE_AM33 && xr_register_name (&ex)) 1650 { 1651 input_line_pointer = hold; 1652 str = hold; 1653 goto error; 1654 } 1655 else if (HAVE_AM33_2 && float_register_name (&ex)) 1656 { 1657 input_line_pointer = hold; 1658 str = hold; 1659 goto error; 1660 } 1661 else if (HAVE_AM33_2 && double_register_name (&ex)) 1662 { 1663 input_line_pointer = hold; 1664 str = hold; 1665 goto error; 1666 } 1667 else if (*str == ')' || *str == '(') 1668 { 1669 input_line_pointer = hold; 1670 str = hold; 1671 goto error; 1672 } 1673 else 1674 { 1675 expression (&ex); 1676 } 1677 1678 switch (ex.X_op) 1679 { 1680 case O_illegal: 1681 errmsg = _("illegal operand"); 1682 goto error; 1683 case O_absent: 1684 errmsg = _("missing operand"); 1685 goto error; 1686 case O_register: 1687 { 1688 int mask; 1689 1690 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; 1691 if (HAVE_AM33) 1692 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG; 1693 if (HAVE_AM33_2) 1694 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG; 1695 if ((operand->flags & mask) == 0) 1696 { 1697 input_line_pointer = hold; 1698 str = hold; 1699 goto error; 1700 } 1701 1702 if (opcode->format == FMT_D1 || opcode->format == FMT_S1) 1703 extra_shift = 8; 1704 else if (opcode->format == FMT_D2 1705 || opcode->format == FMT_D4 1706 || opcode->format == FMT_S2 1707 || opcode->format == FMT_S4 1708 || opcode->format == FMT_S6 1709 || opcode->format == FMT_D5) 1710 extra_shift = 16; 1711 else if (opcode->format == FMT_D7) 1712 extra_shift = 8; 1713 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9) 1714 extra_shift = 8; 1715 else 1716 extra_shift = 0; 1717 1718 mn10300_insert_operand (& insn, & extension, operand, 1719 ex.X_add_number, NULL, 1720 0, extra_shift); 1721 1722 /* And note the register number in the register array. */ 1723 mn10300_reg_operands[op_idx - 1] = ex.X_add_number; 1724 break; 1725 } 1726 1727 case O_constant: 1728 /* If this operand can be promoted, and it doesn't 1729 fit into the allocated bitfield for this insn, 1730 then promote it (ie this opcode does not match). */ 1731 if (operand->flags 1732 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) 1733 && !check_operand (operand, ex.X_add_number)) 1734 { 1735 input_line_pointer = hold; 1736 str = hold; 1737 goto error; 1738 } 1739 1740 mn10300_insert_operand (& insn, & extension, operand, 1741 ex.X_add_number, NULL, 0, 0); 1742 break; 1743 1744 default: 1745 /* If this operand can be promoted, then this opcode didn't 1746 match since we can't know if it needed promotion! */ 1747 if (operand->flags & MN10300_OPERAND_PROMOTE) 1748 { 1749 input_line_pointer = hold; 1750 str = hold; 1751 goto error; 1752 } 1753 1754 /* We need to generate a fixup for this expression. */ 1755 if (fc >= MAX_INSN_FIXUPS) 1756 as_fatal (_("too many fixups")); 1757 fixups[fc].exp = ex; 1758 fixups[fc].opindex = *opindex_ptr; 1759 fixups[fc].reloc = BFD_RELOC_UNUSED; 1760 if (mn10300_check_fixup (& fixups[fc])) 1761 goto error; 1762 ++fc; 1763 break; 1764 } 1765 1766 keep_going: 1767 str = input_line_pointer; 1768 input_line_pointer = hold; 1769 1770 while (*str == ' ' || *str == ',') 1771 ++str; 1772 } 1773 1774 /* Make sure we used all the operands! */ 1775 if (*str != ',') 1776 match = 1; 1777 1778 /* If this instruction has registers that must not match, verify 1779 that they do indeed not match. */ 1780 if (opcode->no_match_operands) 1781 { 1782 /* Look at each operand to see if it's marked. */ 1783 for (i = 0; i < MN10300_MAX_OPERANDS; i++) 1784 { 1785 if ((1 << i) & opcode->no_match_operands) 1786 { 1787 int j; 1788 1789 /* operand I is marked. Check that it does not match any 1790 operands > I which are marked. */ 1791 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) 1792 { 1793 if (((1 << j) & opcode->no_match_operands) 1794 && mn10300_reg_operands[i] == mn10300_reg_operands[j]) 1795 { 1796 errmsg = _("Invalid register specification."); 1797 match = 0; 1798 goto error; 1799 } 1800 } 1801 } 1802 } 1803 } 1804 1805 error: 1806 if (match == 0) 1807 { 1808 next_opcode = opcode + 1; 1809 if (!strcmp (next_opcode->name, opcode->name)) 1810 { 1811 opcode = next_opcode; 1812 continue; 1813 } 1814 1815 as_bad ("%s", errmsg); 1816 return; 1817 } 1818 break; 1819 } 1820 1821 while (ISSPACE (*str)) 1822 ++str; 1823 1824 if (*str != '\0') 1825 as_bad (_("junk at end of line: `%s'"), str); 1826 1827 input_line_pointer = str; 1828 1829 /* Determine the size of the instruction. */ 1830 if (opcode->format == FMT_S0) 1831 size = 1; 1832 1833 if (opcode->format == FMT_S1 || opcode->format == FMT_D0) 1834 size = 2; 1835 1836 if (opcode->format == FMT_S2 || opcode->format == FMT_D1) 1837 size = 3; 1838 1839 if (opcode->format == FMT_D6) 1840 size = 3; 1841 1842 if (opcode->format == FMT_D7 || opcode->format == FMT_D10) 1843 size = 4; 1844 1845 if (opcode->format == FMT_D8) 1846 size = 6; 1847 1848 if (opcode->format == FMT_D9) 1849 size = 7; 1850 1851 if (opcode->format == FMT_S4) 1852 size = 5; 1853 1854 if (opcode->format == FMT_S6 || opcode->format == FMT_D5) 1855 size = 7; 1856 1857 if (opcode->format == FMT_D2) 1858 size = 4; 1859 1860 if (opcode->format == FMT_D3) 1861 size = 5; 1862 1863 if (opcode->format == FMT_D4) 1864 size = 6; 1865 1866 if (relaxable && fc > 0) 1867 { 1868 /* On a 64-bit host the size of an 'int' is not the same 1869 as the size of a pointer, so we need a union to convert 1870 the opindex field of the fr_cgen structure into a char * 1871 so that it can be stored in the frag. We do not have 1872 to worry about loosing accuracy as we are not going to 1873 be even close to the 32bit limit of the int. */ 1874 union 1875 { 1876 int opindex; 1877 char * ptr; 1878 } 1879 opindex_converter; 1880 int type; 1881 1882 /* We want to anchor the line info to the previous frag (if 1883 there isn't one, create it), so that, when the insn is 1884 resized, we still get the right address for the beginning of 1885 the region. */ 1886 f = frag_more (0); 1887 dwarf2_emit_insn (0); 1888 1889 /* bCC */ 1890 if (size == 2) 1891 { 1892 /* Handle bra specially. Basically treat it like jmp so 1893 that we automatically handle 8, 16 and 32 bit offsets 1894 correctly as well as jumps to an undefined address. 1895 1896 It is also important to not treat it like other bCC 1897 instructions since the long forms of bra is different 1898 from other bCC instructions. */ 1899 if (opcode->opcode == 0xca00) 1900 type = 10; 1901 else 1902 type = 0; 1903 } 1904 /* call */ 1905 else if (size == 5) 1906 type = 6; 1907 /* calls */ 1908 else if (size == 4) 1909 type = 8; 1910 /* jmp */ 1911 else if (size == 3 && opcode->opcode == 0xcc0000) 1912 type = 10; 1913 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000) 1914 type = 13; 1915 /* bCC (uncommon cases) */ 1916 else 1917 type = 3; 1918 1919 opindex_converter.opindex = fixups[0].opindex; 1920 f = frag_var (rs_machine_dependent, 8, 8 - size, type, 1921 fixups[0].exp.X_add_symbol, 1922 fixups[0].exp.X_add_number, 1923 opindex_converter.ptr); 1924 1925 /* This is pretty hokey. We basically just care about the 1926 opcode, so we have to write out the first word big endian. 1927 1928 The exception is "call", which has two operands that we 1929 care about. 1930 1931 The first operand (the register list) happens to be in the 1932 first instruction word, and will be in the right place if 1933 we output the first word in big endian mode. 1934 1935 The second operand (stack size) is in the extension word, 1936 and we want it to appear as the first character in the extension 1937 word (as it appears in memory). Luckily, writing the extension 1938 word in big endian format will do what we want. */ 1939 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); 1940 if (size > 8) 1941 { 1942 number_to_chars_bigendian (f + 4, extension, 4); 1943 number_to_chars_bigendian (f + 8, 0, size - 8); 1944 } 1945 else if (size > 4) 1946 number_to_chars_bigendian (f + 4, extension, size - 4); 1947 } 1948 else 1949 { 1950 /* Allocate space for the instruction. */ 1951 f = frag_more (size); 1952 1953 /* Fill in bytes for the instruction. Note that opcode fields 1954 are written big-endian, 16 & 32bit immediates are written 1955 little endian. Egad. */ 1956 if (opcode->format == FMT_S0 1957 || opcode->format == FMT_S1 1958 || opcode->format == FMT_D0 1959 || opcode->format == FMT_D6 1960 || opcode->format == FMT_D7 1961 || opcode->format == FMT_D10 1962 || opcode->format == FMT_D1) 1963 { 1964 number_to_chars_bigendian (f, insn, size); 1965 } 1966 else if (opcode->format == FMT_S2 1967 && opcode->opcode != 0xdf0000 1968 && opcode->opcode != 0xde0000) 1969 { 1970 /* A format S2 instruction that is _not_ "ret" and "retf". */ 1971 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); 1972 number_to_chars_littleendian (f + 1, insn & 0xffff, 2); 1973 } 1974 else if (opcode->format == FMT_S2) 1975 { 1976 /* This must be a ret or retf, which is written entirely in 1977 big-endian format. */ 1978 number_to_chars_bigendian (f, insn, 3); 1979 } 1980 else if (opcode->format == FMT_S4 1981 && opcode->opcode != 0xdc000000) 1982 { 1983 /* This must be a format S4 "call" instruction. What a pain. */ 1984 unsigned long temp = (insn >> 8) & 0xffff; 1985 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); 1986 number_to_chars_littleendian (f + 1, temp, 2); 1987 number_to_chars_bigendian (f + 3, insn & 0xff, 1); 1988 number_to_chars_bigendian (f + 4, extension & 0xff, 1); 1989 } 1990 else if (opcode->format == FMT_S4) 1991 { 1992 /* This must be a format S4 "jmp" instruction. */ 1993 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); 1994 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); 1995 number_to_chars_littleendian (f + 1, temp, 4); 1996 } 1997 else if (opcode->format == FMT_S6) 1998 { 1999 unsigned long temp = ((insn & 0xffffff) << 8) 2000 | ((extension >> 16) & 0xff); 2001 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); 2002 number_to_chars_littleendian (f + 1, temp, 4); 2003 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); 2004 number_to_chars_bigendian (f + 6, extension & 0xff, 1); 2005 } 2006 else if (opcode->format == FMT_D2 2007 && opcode->opcode != 0xfaf80000 2008 && opcode->opcode != 0xfaf00000 2009 && opcode->opcode != 0xfaf40000) 2010 { 2011 /* A format D2 instruction where the 16bit immediate is 2012 really a single 16bit value, not two 8bit values. */ 2013 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2014 number_to_chars_littleendian (f + 2, insn & 0xffff, 2); 2015 } 2016 else if (opcode->format == FMT_D2) 2017 { 2018 /* A format D2 instruction where the 16bit immediate 2019 is really two 8bit immediates. */ 2020 number_to_chars_bigendian (f, insn, 4); 2021 } 2022 else if (opcode->format == FMT_D3) 2023 { 2024 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2025 number_to_chars_littleendian (f + 2, insn & 0xffff, 2); 2026 number_to_chars_bigendian (f + 4, extension & 0xff, 1); 2027 } 2028 else if (opcode->format == FMT_D4) 2029 { 2030 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); 2031 2032 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2033 number_to_chars_littleendian (f + 2, temp, 4); 2034 } 2035 else if (opcode->format == FMT_D5) 2036 { 2037 unsigned long temp = (((insn & 0xffff) << 16) 2038 | ((extension >> 8) & 0xffff)); 2039 2040 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2041 number_to_chars_littleendian (f + 2, temp, 4); 2042 number_to_chars_bigendian (f + 6, extension & 0xff, 1); 2043 } 2044 else if (opcode->format == FMT_D8) 2045 { 2046 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff); 2047 2048 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); 2049 number_to_chars_bigendian (f + 3, (temp & 0xff), 1); 2050 number_to_chars_littleendian (f + 4, temp >> 8, 2); 2051 } 2052 else if (opcode->format == FMT_D9) 2053 { 2054 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff); 2055 2056 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); 2057 number_to_chars_littleendian (f + 3, temp, 4); 2058 } 2059 2060 /* Create any fixups. */ 2061 for (i = 0; i < fc; i++) 2062 { 2063 const struct mn10300_operand *operand; 2064 int reloc_size; 2065 2066 operand = &mn10300_operands[fixups[i].opindex]; 2067 if (fixups[i].reloc != BFD_RELOC_UNUSED 2068 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL 2069 && fixups[i].reloc != BFD_RELOC_32_GOTOFF 2070 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL 2071 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD 2072 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD 2073 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO 2074 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE 2075 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE 2076 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE 2077 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32) 2078 { 2079 reloc_howto_type *reloc_howto; 2080 int offset; 2081 2082 reloc_howto = bfd_reloc_type_lookup (stdoutput, 2083 fixups[i].reloc); 2084 2085 if (!reloc_howto) 2086 abort (); 2087 2088 reloc_size = bfd_get_reloc_size (reloc_howto); 2089 2090 if (reloc_size < 1 || reloc_size > 4) 2091 abort (); 2092 2093 offset = 4 - size; 2094 fix_new_exp (frag_now, f - frag_now->fr_literal + offset, 2095 reloc_size, &fixups[i].exp, 2096 reloc_howto->pc_relative, 2097 fixups[i].reloc); 2098 } 2099 else 2100 { 2101 int reloc, pcrel, offset; 2102 fixS *fixP; 2103 2104 reloc = BFD_RELOC_NONE; 2105 if (fixups[i].reloc != BFD_RELOC_UNUSED) 2106 reloc = fixups[i].reloc; 2107 /* How big is the reloc? Remember SPLIT relocs are 2108 implicitly 32bits. */ 2109 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) 2110 reloc_size = 32; 2111 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) 2112 reloc_size = 24; 2113 else 2114 reloc_size = operand->bits; 2115 2116 /* Is the reloc pc-relative? */ 2117 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; 2118 if (reloc != BFD_RELOC_NONE) 2119 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative; 2120 2121 offset = size - (reloc_size + operand->shift) / 8; 2122 2123 /* Choose a proper BFD relocation type. */ 2124 if (reloc != BFD_RELOC_NONE) 2125 ; 2126 else if (pcrel) 2127 { 2128 if (reloc_size == 32) 2129 reloc = BFD_RELOC_32_PCREL; 2130 else if (reloc_size == 16) 2131 reloc = BFD_RELOC_16_PCREL; 2132 else if (reloc_size == 8) 2133 reloc = BFD_RELOC_8_PCREL; 2134 else 2135 abort (); 2136 } 2137 else 2138 { 2139 if (reloc_size == 32) 2140 reloc = BFD_RELOC_32; 2141 else if (reloc_size == 16) 2142 reloc = BFD_RELOC_16; 2143 else if (reloc_size == 8) 2144 reloc = BFD_RELOC_8; 2145 else 2146 abort (); 2147 } 2148 2149 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, 2150 reloc_size / 8, &fixups[i].exp, pcrel, 2151 ((bfd_reloc_code_real_type) reloc)); 2152 2153 if (pcrel) 2154 fixP->fx_offset += offset; 2155 } 2156 } 2157 2158 dwarf2_emit_insn (size); 2159 } 2160 2161 /* Label this frag as one that contains instructions. */ 2162 frag_now->tc_frag_data = TRUE; 2163 } 2164 2165 /* If while processing a fixup, a reloc really needs to be created 2166 then it is done here. */ 2167 2168 arelent ** 2169 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 2170 { 2171 static arelent * no_relocs = NULL; 2172 static arelent * relocs[MAX_RELOC_EXPANSION + 1]; 2173 arelent *reloc; 2174 2175 reloc = xmalloc (sizeof (arelent)); 2176 2177 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 2178 if (reloc->howto == NULL) 2179 { 2180 as_bad_where (fixp->fx_file, fixp->fx_line, 2181 _("reloc %d not supported by object file format"), 2182 (int) fixp->fx_r_type); 2183 free (reloc); 2184 return & no_relocs; 2185 } 2186 2187 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 2188 relocs[0] = reloc; 2189 relocs[1] = NULL; 2190 2191 if (fixp->fx_subsy 2192 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) 2193 { 2194 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy); 2195 fixp->fx_subsy = NULL; 2196 } 2197 2198 if (fixp->fx_addsy && fixp->fx_subsy) 2199 { 2200 asection *asec, *ssec; 2201 2202 asec = S_GET_SEGMENT (fixp->fx_addsy); 2203 ssec = S_GET_SEGMENT (fixp->fx_subsy); 2204 2205 /* If we have a difference between two (non-absolute) symbols we must 2206 generate two relocs (one for each symbol) and allow the linker to 2207 resolve them - relaxation may change the distances between symbols, 2208 even local symbols defined in the same section. */ 2209 if (ssec != absolute_section || asec != absolute_section) 2210 { 2211 arelent * reloc2 = xmalloc (sizeof * reloc); 2212 2213 relocs[0] = reloc2; 2214 relocs[1] = reloc; 2215 2216 reloc2->address = reloc->address; 2217 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF); 2218 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy); 2219 reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 2220 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 2221 2222 reloc->addend = fixp->fx_offset; 2223 if (asec == absolute_section) 2224 { 2225 reloc->addend += S_GET_VALUE (fixp->fx_addsy); 2226 reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; 2227 } 2228 else 2229 { 2230 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 2231 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2232 } 2233 2234 fixp->fx_pcrel = 0; 2235 fixp->fx_done = 1; 2236 return relocs; 2237 } 2238 else 2239 { 2240 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal; 2241 2242 reloc->addend = (S_GET_VALUE (fixp->fx_addsy) 2243 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); 2244 2245 switch (fixp->fx_r_type) 2246 { 2247 case BFD_RELOC_8: 2248 md_number_to_chars (fixpos, reloc->addend, 1); 2249 break; 2250 2251 case BFD_RELOC_16: 2252 md_number_to_chars (fixpos, reloc->addend, 2); 2253 break; 2254 2255 case BFD_RELOC_24: 2256 md_number_to_chars (fixpos, reloc->addend, 3); 2257 break; 2258 2259 case BFD_RELOC_32: 2260 md_number_to_chars (fixpos, reloc->addend, 4); 2261 break; 2262 2263 default: 2264 reloc->sym_ptr_ptr 2265 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr; 2266 return relocs; 2267 } 2268 2269 free (reloc); 2270 return & no_relocs; 2271 } 2272 } 2273 else 2274 { 2275 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 2276 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2277 reloc->addend = fixp->fx_offset; 2278 } 2279 return relocs; 2280 } 2281 2282 /* Returns true iff the symbol attached to the frag is at a known location 2283 in the given section, (and hence the relocation to it can be relaxed by 2284 the assembler). */ 2285 static inline bfd_boolean 2286 has_known_symbol_location (fragS * fragp, asection * sec) 2287 { 2288 symbolS * sym = fragp->fr_symbol; 2289 2290 return sym != NULL 2291 && S_IS_DEFINED (sym) 2292 && ! S_IS_WEAK (sym) 2293 && S_GET_SEGMENT (sym) == sec; 2294 } 2295 2296 int 2297 md_estimate_size_before_relax (fragS *fragp, asection *seg) 2298 { 2299 if (fragp->fr_subtype == 6 2300 && ! has_known_symbol_location (fragp, seg)) 2301 fragp->fr_subtype = 7; 2302 else if (fragp->fr_subtype == 8 2303 && ! has_known_symbol_location (fragp, seg)) 2304 fragp->fr_subtype = 9; 2305 else if (fragp->fr_subtype == 10 2306 && ! has_known_symbol_location (fragp, seg)) 2307 fragp->fr_subtype = 12; 2308 2309 if (fragp->fr_subtype == 13) 2310 return 3; 2311 2312 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) 2313 abort (); 2314 2315 return md_relax_table[fragp->fr_subtype].rlx_length; 2316 } 2317 2318 long 2319 md_pcrel_from (fixS *fixp) 2320 { 2321 if (fixp->fx_addsy != (symbolS *) NULL 2322 && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))) 2323 /* The symbol is undefined or weak. Let the linker figure it out. */ 2324 return 0; 2325 2326 return fixp->fx_frag->fr_address + fixp->fx_where; 2327 } 2328 2329 void 2330 md_apply_fix (fixS * fixP, valueT * valP, segT seg) 2331 { 2332 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal; 2333 int size = 0; 2334 int value = (int) * valP; 2335 2336 gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED); 2337 2338 /* This should never happen. */ 2339 if (seg->flags & SEC_ALLOC) 2340 abort (); 2341 2342 /* The value we are passed in *valuep includes the symbol values. 2343 If we are doing this relocation the code in write.c is going to 2344 call bfd_install_relocation, which is also going to use the symbol 2345 value. That means that if the reloc is fully resolved we want to 2346 use *valuep since bfd_install_relocation is not being used. 2347 2348 However, if the reloc is not fully resolved we do not want to use 2349 *valuep, and must use fx_offset instead. However, if the reloc 2350 is PC relative, we do want to use *valuep since it includes the 2351 result of md_pcrel_from. */ 2352 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel) 2353 value = fixP->fx_offset; 2354 2355 /* If the fix is relative to a symbol which is not defined, or not 2356 in the same segment as the fix, we cannot resolve it here. */ 2357 if (fixP->fx_addsy != NULL 2358 && (! S_IS_DEFINED (fixP->fx_addsy) 2359 || (S_GET_SEGMENT (fixP->fx_addsy) != seg))) 2360 { 2361 fixP->fx_done = 0; 2362 return; 2363 } 2364 2365 switch (fixP->fx_r_type) 2366 { 2367 case BFD_RELOC_8: 2368 case BFD_RELOC_8_PCREL: 2369 size = 1; 2370 break; 2371 2372 case BFD_RELOC_16: 2373 case BFD_RELOC_16_PCREL: 2374 size = 2; 2375 break; 2376 2377 case BFD_RELOC_32: 2378 case BFD_RELOC_32_PCREL: 2379 size = 4; 2380 break; 2381 2382 case BFD_RELOC_VTABLE_INHERIT: 2383 case BFD_RELOC_VTABLE_ENTRY: 2384 fixP->fx_done = 0; 2385 return; 2386 2387 case BFD_RELOC_MN10300_ALIGN: 2388 fixP->fx_done = 1; 2389 return; 2390 2391 case BFD_RELOC_NONE: 2392 default: 2393 as_bad_where (fixP->fx_file, fixP->fx_line, 2394 _("Bad relocation fixup type (%d)"), fixP->fx_r_type); 2395 } 2396 2397 md_number_to_chars (fixpos, value, size); 2398 2399 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */ 2400 if (fixP->fx_addsy == NULL) 2401 fixP->fx_done = 1; 2402 } 2403 2404 /* Return zero if the fixup in fixp should be left alone and not 2405 adjusted. */ 2406 2407 bfd_boolean 2408 mn10300_fix_adjustable (struct fix *fixp) 2409 { 2410 if (fixp->fx_pcrel) 2411 { 2412 if (TC_FORCE_RELOCATION_LOCAL (fixp)) 2413 return FALSE; 2414 } 2415 /* Non-relative relocs can (and must) be adjusted if they do 2416 not meet the criteria below, or the generic criteria. */ 2417 else if (TC_FORCE_RELOCATION (fixp)) 2418 return FALSE; 2419 2420 /* Do not adjust relocations involving symbols in code sections, 2421 because it breaks linker relaxations. This could be fixed in the 2422 linker, but this fix is simpler, and it pretty much only affects 2423 object size a little bit. */ 2424 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) 2425 return FALSE; 2426 2427 /* Likewise, do not adjust symbols that won't be merged, or debug 2428 symbols, because they too break relaxation. We do want to adjust 2429 other mergable symbols, like .rodata, because code relaxations 2430 need section-relative symbols to properly relax them. */ 2431 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)) 2432 return FALSE; 2433 2434 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0) 2435 return FALSE; 2436 2437 return TRUE; 2438 } 2439 2440 static void 2441 set_arch_mach (int mach) 2442 { 2443 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) 2444 as_warn (_("could not set architecture and machine")); 2445 2446 current_machine = mach; 2447 } 2448 2449 static inline char * 2450 mn10300_end_of_match (char *cont, char *what) 2451 { 2452 int len = strlen (what); 2453 2454 if (strncmp (cont, what, strlen (what)) == 0 2455 && ! is_part_of_name (cont[len])) 2456 return cont + len; 2457 2458 return NULL; 2459 } 2460 2461 int 2462 mn10300_parse_name (char const *name, 2463 expressionS *exprP, 2464 enum expr_mode mode, 2465 char *nextcharP) 2466 { 2467 char *next = input_line_pointer; 2468 char *next_end; 2469 int reloc_type; 2470 segT segment; 2471 2472 exprP->X_op_symbol = NULL; 2473 2474 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 2475 { 2476 if (! GOT_symbol) 2477 GOT_symbol = symbol_find_or_make (name); 2478 2479 exprP->X_add_symbol = GOT_symbol; 2480 no_suffix: 2481 /* If we have an absolute symbol or a reg, 2482 then we know its value now. */ 2483 segment = S_GET_SEGMENT (exprP->X_add_symbol); 2484 if (mode != expr_defer && segment == absolute_section) 2485 { 2486 exprP->X_op = O_constant; 2487 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 2488 exprP->X_add_symbol = NULL; 2489 } 2490 else if (mode != expr_defer && segment == reg_section) 2491 { 2492 exprP->X_op = O_register; 2493 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 2494 exprP->X_add_symbol = NULL; 2495 } 2496 else 2497 { 2498 exprP->X_op = O_symbol; 2499 exprP->X_add_number = 0; 2500 } 2501 2502 return 1; 2503 } 2504 2505 exprP->X_add_symbol = symbol_find_or_make (name); 2506 2507 if (*nextcharP != '@') 2508 goto no_suffix; 2509 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF"))) 2510 reloc_type = BFD_RELOC_32_GOTOFF; 2511 else if ((next_end = mn10300_end_of_match (next + 1, "GOT"))) 2512 reloc_type = BFD_RELOC_MN10300_GOT32; 2513 else if ((next_end = mn10300_end_of_match (next + 1, "PLT"))) 2514 reloc_type = BFD_RELOC_32_PLT_PCREL; 2515 else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd"))) 2516 reloc_type = BFD_RELOC_MN10300_TLS_GD; 2517 else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm"))) 2518 reloc_type = BFD_RELOC_MN10300_TLS_LD; 2519 else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff"))) 2520 reloc_type = BFD_RELOC_MN10300_TLS_LDO; 2521 else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff"))) 2522 reloc_type = BFD_RELOC_MN10300_TLS_GOTIE; 2523 else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff"))) 2524 reloc_type = BFD_RELOC_MN10300_TLS_IE; 2525 else if ((next_end = mn10300_end_of_match (next + 1, "tpoff"))) 2526 reloc_type = BFD_RELOC_MN10300_TLS_LE; 2527 else 2528 goto no_suffix; 2529 2530 *input_line_pointer = *nextcharP; 2531 input_line_pointer = next_end; 2532 *nextcharP = *input_line_pointer; 2533 *input_line_pointer = '\0'; 2534 2535 exprP->X_op = O_PIC_reloc; 2536 exprP->X_add_number = 0; 2537 exprP->X_md = reloc_type; 2538 2539 return 1; 2540 } 2541 2542 /* The target specific pseudo-ops which we support. */ 2543 const pseudo_typeS md_pseudo_table[] = 2544 { 2545 { "am30", set_arch_mach, AM30 }, 2546 { "am33", set_arch_mach, AM33 }, 2547 { "am33_2", set_arch_mach, AM33_2 }, 2548 { "mn10300", set_arch_mach, MN103 }, 2549 {NULL, 0, 0} 2550 }; 2551 2552 /* Returns FALSE if there is some mn10300 specific reason why the 2553 subtraction of two same-section symbols cannot be computed by 2554 the assembler. */ 2555 2556 bfd_boolean 2557 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section) 2558 { 2559 bfd_boolean result; 2560 fragS * left_frag; 2561 fragS * right_frag; 2562 fragS * frag; 2563 2564 /* If we are not performing linker relaxation then we have nothing 2565 to worry about. */ 2566 if (linkrelax == 0) 2567 return TRUE; 2568 2569 /* If the symbols are not in a code section then they are OK. */ 2570 if ((section->flags & SEC_CODE) == 0) 2571 return TRUE; 2572 2573 /* Otherwise we have to scan the fragments between the two symbols. 2574 If any instructions are found then we have to assume that linker 2575 relaxation may change their size and so we must delay resolving 2576 the subtraction until the final link. */ 2577 left_frag = symbol_get_frag (left->X_add_symbol); 2578 right_frag = symbol_get_frag (right->X_add_symbol); 2579 2580 if (left_frag == right_frag) 2581 return ! left_frag->tc_frag_data; 2582 2583 result = TRUE; 2584 for (frag = left_frag; frag != NULL; frag = frag->fr_next) 2585 { 2586 if (frag->tc_frag_data) 2587 result = FALSE; 2588 if (frag == right_frag) 2589 break; 2590 } 2591 2592 if (frag == NULL) 2593 for (frag = right_frag; frag != NULL; frag = frag->fr_next) 2594 { 2595 if (frag->tc_frag_data) 2596 result = FALSE; 2597 if (frag == left_frag) 2598 break; 2599 } 2600 2601 if (frag == NULL) 2602 /* The two symbols are on disjoint fragment chains 2603 - we cannot possibly compute their difference. */ 2604 return FALSE; 2605 2606 return result; 2607 } 2608 2609 /* When relaxing, we need to output a reloc for any .align directive 2610 that requests alignment to a two byte boundary or larger. */ 2611 2612 void 2613 mn10300_handle_align (fragS *frag) 2614 { 2615 if (linkrelax 2616 && (frag->fr_type == rs_align 2617 || frag->fr_type == rs_align_code) 2618 && frag->fr_address + frag->fr_fix > 0 2619 && frag->fr_offset > 1 2620 && now_seg != bss_section 2621 /* Do not create relocs for the merging sections - such 2622 relocs will prevent the contents from being merged. */ 2623 && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0) 2624 /* Create a new fixup to record the alignment request. The symbol is 2625 irrelevent but must be present so we use the absolute section symbol. 2626 The offset from the symbol is used to record the power-of-two alignment 2627 value. The size is set to 0 because the frag may already be aligned, 2628 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */ 2629 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE, 2630 BFD_RELOC_MN10300_ALIGN); 2631 } 2632 2633 bfd_boolean 2634 mn10300_force_relocation (struct fix * fixp) 2635 { 2636 if (linkrelax 2637 && (fixp->fx_pcrel 2638 || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN)) 2639 return TRUE; 2640 2641 return generic_force_reloc (fixp); 2642 } 2643
