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      1 /* TILEPro opcode information.
      2 
      3    Copyright (C) 2011-2014 Free Software Foundation, Inc.
      4 
      5    This program is free software; you can redistribute it and/or modify
      6    it under the terms of the GNU General Public License as published by
      7    the Free Software Foundation; either version 3 of the License, or
      8    (at your option) any later version.
      9 
     10    This program is distributed in the hope that it will be useful,
     11    but WITHOUT ANY WARRANTY; without even the implied warranty of
     12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     13    GNU General Public License for more details.
     14 
     15    You should have received a copy of the GNU General Public License
     16    along with this program; if not, write to the Free Software
     17    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
     18    MA 02110-1301, USA.  */
     19 
     20 #include "sysdep.h"
     21 
     22 /* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else.  */
     23 #define BFD_RELOC(x) BFD_RELOC_##x
     24 #include "bfd.h"
     25 
     26 /* Special registers.  */
     27 #define TREG_LR 55
     28 #define TREG_SN 56
     29 #define TREG_ZERO 63
     30 
     31 #if defined(__KERNEL__) || defined(_LIBC)
     32 /* FIXME: Rename this. */
     33 #include <asm/opcode-tile.h>
     34 #define DISASM_ONLY
     35 #else
     36 #include "opcode/tilepro.h"
     37 #endif
     38 
     39 #ifdef __KERNEL__
     40 #include <linux/stddef.h>
     41 #else
     42 #include <stddef.h>
     43 #endif
     44 
     45 const struct tilepro_opcode tilepro_opcodes[397] =
     46 {
     47  { "bpt", TILEPRO_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
     48     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
     49 #ifndef DISASM_ONLY
     50     {
     51       0ULL,
     52       0xfbffffff80000000ULL,
     53       0ULL,
     54       0ULL,
     55       0ULL
     56     },
     57     {
     58       -1ULL,
     59       0x400b3cae00000000ULL,
     60       -1ULL,
     61       -1ULL,
     62       -1ULL
     63     }
     64 #endif
     65   },
     66   { "info", TILEPRO_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
     67     { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } },
     68 #ifndef DISASM_ONLY
     69     {
     70       0x800000007ff00fffULL,
     71       0xfff807ff80000000ULL,
     72       0x8000000078000fffULL,
     73       0xf80007ff80000000ULL,
     74       0ULL
     75     },
     76     {
     77       0x0000000050100fffULL,
     78       0x302007ff80000000ULL,
     79       0x8000000050000fffULL,
     80       0xc00007ff80000000ULL,
     81       -1ULL
     82     }
     83 #endif
     84   },
     85   { "infol", TILEPRO_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
     86     { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } },
     87 #ifndef DISASM_ONLY
     88     {
     89       0x8000000070000fffULL,
     90       0xf80007ff80000000ULL,
     91       0ULL,
     92       0ULL,
     93       0ULL
     94     },
     95     {
     96       0x0000000030000fffULL,
     97       0x200007ff80000000ULL,
     98       -1ULL,
     99       -1ULL,
    100       -1ULL
    101     }
    102 #endif
    103   },
    104   { "j", TILEPRO_OPC_J, 0x2, 1, TREG_ZERO, 1,
    105     { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } },
    106 #ifndef DISASM_ONLY
    107     {
    108       0ULL,
    109       0xf000000000000000ULL,
    110       0ULL,
    111       0ULL,
    112       0ULL
    113     },
    114     {
    115       -1ULL,
    116       0x5000000000000000ULL,
    117       -1ULL,
    118       -1ULL,
    119       -1ULL
    120     }
    121 #endif
    122   },
    123   { "jal", TILEPRO_OPC_JAL, 0x2, 1, TREG_LR, 1,
    124     { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } },
    125 #ifndef DISASM_ONLY
    126     {
    127       0ULL,
    128       0xf000000000000000ULL,
    129       0ULL,
    130       0ULL,
    131       0ULL
    132     },
    133     {
    134       -1ULL,
    135       0x6000000000000000ULL,
    136       -1ULL,
    137       -1ULL,
    138       -1ULL
    139     }
    140 #endif
    141   },
    142   { "lw_tls", TILEPRO_OPC_LW_TLS, 0x2, 3, TREG_ZERO, 1,
    143     { { 0, }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    144 #ifndef DISASM_ONLY
    145     {
    146       0ULL,
    147       0xfffff80000000000ULL,
    148       0ULL,
    149       0ULL,
    150       0ULL
    151     },
    152     {
    153       -1ULL,
    154       0x30d0000000000000ULL,
    155       -1ULL,
    156       -1ULL,
    157       -1ULL
    158     }
    159 #endif
    160   },
    161   { "lw_tls.sn", TILEPRO_OPC_LW_TLS_SN, 0x2, 3, TREG_SN, 1,
    162     { { 0, }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    163 #ifndef DISASM_ONLY
    164     {
    165       0ULL,
    166       0xfffff80000000000ULL,
    167       0ULL,
    168       0ULL,
    169       0ULL
    170     },
    171     {
    172       -1ULL,
    173       0x34d0000000000000ULL,
    174       -1ULL,
    175       -1ULL,
    176       -1ULL
    177     }
    178 #endif
    179   },
    180   { "move", TILEPRO_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
    181     { { 9, 10 }, { 7, 8 }, { 11, 12 }, { 13, 14 }, { 0, } },
    182 #ifndef DISASM_ONLY
    183     {
    184       0x800000007ffff000ULL,
    185       0xfffff80000000000ULL,
    186       0x80000000780ff000ULL,
    187       0xf807f80000000000ULL,
    188       0ULL
    189     },
    190     {
    191       0x0000000000cff000ULL,
    192       0x0833f80000000000ULL,
    193       0x80000000180bf000ULL,
    194       0x9805f80000000000ULL,
    195       -1ULL
    196     }
    197 #endif
    198   },
    199   { "move.sn", TILEPRO_OPC_MOVE_SN, 0x3, 2, TREG_SN, 1,
    200     { { 9, 10 }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
    201 #ifndef DISASM_ONLY
    202     {
    203       0x800000007ffff000ULL,
    204       0xfffff80000000000ULL,
    205       0ULL,
    206       0ULL,
    207       0ULL
    208     },
    209     {
    210       0x0000000008cff000ULL,
    211       0x0c33f80000000000ULL,
    212       -1ULL,
    213       -1ULL,
    214       -1ULL
    215     }
    216 #endif
    217   },
    218   { "movei", TILEPRO_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
    219     { { 9, 0 }, { 7, 1 }, { 11, 2 }, { 13, 3 }, { 0, } },
    220 #ifndef DISASM_ONLY
    221     {
    222       0x800000007ff00fc0ULL,
    223       0xfff807e000000000ULL,
    224       0x8000000078000fc0ULL,
    225       0xf80007e000000000ULL,
    226       0ULL
    227     },
    228     {
    229       0x0000000040800fc0ULL,
    230       0x305807e000000000ULL,
    231       0x8000000058000fc0ULL,
    232       0xc80007e000000000ULL,
    233       -1ULL
    234     }
    235 #endif
    236   },
    237   { "movei.sn", TILEPRO_OPC_MOVEI_SN, 0x3, 2, TREG_SN, 1,
    238     { { 9, 0 }, { 7, 1 }, { 0, }, { 0, }, { 0, } },
    239 #ifndef DISASM_ONLY
    240     {
    241       0x800000007ff00fc0ULL,
    242       0xfff807e000000000ULL,
    243       0ULL,
    244       0ULL,
    245       0ULL
    246     },
    247     {
    248       0x0000000048800fc0ULL,
    249       0x345807e000000000ULL,
    250       -1ULL,
    251       -1ULL,
    252       -1ULL
    253     }
    254 #endif
    255   },
    256   { "moveli", TILEPRO_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
    257     { { 9, 4 }, { 7, 5 }, { 0, }, { 0, }, { 0, } },
    258 #ifndef DISASM_ONLY
    259     {
    260       0x8000000070000fc0ULL,
    261       0xf80007e000000000ULL,
    262       0ULL,
    263       0ULL,
    264       0ULL
    265     },
    266     {
    267       0x0000000020000fc0ULL,
    268       0x180007e000000000ULL,
    269       -1ULL,
    270       -1ULL,
    271       -1ULL
    272     }
    273 #endif
    274   },
    275   { "moveli.sn", TILEPRO_OPC_MOVELI_SN, 0x3, 2, TREG_SN, 1,
    276     { { 9, 4 }, { 7, 5 }, { 0, }, { 0, }, { 0, } },
    277 #ifndef DISASM_ONLY
    278     {
    279       0x8000000070000fc0ULL,
    280       0xf80007e000000000ULL,
    281       0ULL,
    282       0ULL,
    283       0ULL
    284     },
    285     {
    286       0x0000000010000fc0ULL,
    287       0x100007e000000000ULL,
    288       -1ULL,
    289       -1ULL,
    290       -1ULL
    291     }
    292 #endif
    293   },
    294   { "movelis", TILEPRO_OPC_MOVELIS, 0x3, 2, TREG_SN, 1,
    295     { { 9, 4 }, { 7, 5 }, { 0, }, { 0, }, { 0, } },
    296 #ifndef DISASM_ONLY
    297     {
    298       0x8000000070000fc0ULL,
    299       0xf80007e000000000ULL,
    300       0ULL,
    301       0ULL,
    302       0ULL
    303     },
    304     {
    305       0x0000000010000fc0ULL,
    306       0x100007e000000000ULL,
    307       -1ULL,
    308       -1ULL,
    309       -1ULL
    310     }
    311 #endif
    312   },
    313   { "prefetch", TILEPRO_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
    314     { { 0, }, { 8 }, { 0, }, { 0, }, { 15 } },
    315 #ifndef DISASM_ONLY
    316     {
    317       0ULL,
    318       0xfffff81f80000000ULL,
    319       0ULL,
    320       0ULL,
    321       0x8700000003f00000ULL
    322     },
    323     {
    324       -1ULL,
    325       0x400b501f80000000ULL,
    326       -1ULL,
    327       -1ULL,
    328       0x8000000003f00000ULL
    329     }
    330 #endif
    331   },
    332   { "raise", TILEPRO_OPC_RAISE, 0x2, 0, TREG_ZERO, 1,
    333     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
    334 #ifndef DISASM_ONLY
    335     {
    336       0ULL,
    337       0xfbffffff80000000ULL,
    338       0ULL,
    339       0ULL,
    340       0ULL
    341     },
    342     {
    343       -1ULL,
    344       0x400b3cae80000000ULL,
    345       -1ULL,
    346       -1ULL,
    347       -1ULL
    348     }
    349 #endif
    350   },
    351   { "add", TILEPRO_OPC_ADD, 0xf, 3, TREG_ZERO, 1,
    352     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
    353 #ifndef DISASM_ONLY
    354     {
    355       0x800000007ffc0000ULL,
    356       0xfffe000000000000ULL,
    357       0x80000000780c0000ULL,
    358       0xf806000000000000ULL,
    359       0ULL
    360     },
    361     {
    362       0x00000000000c0000ULL,
    363       0x0806000000000000ULL,
    364       0x8000000008000000ULL,
    365       0x8800000000000000ULL,
    366       -1ULL
    367     }
    368 #endif
    369   },
    370   { "add.sn", TILEPRO_OPC_ADD_SN, 0x3, 3, TREG_SN, 1,
    371     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    372 #ifndef DISASM_ONLY
    373     {
    374       0x800000007ffc0000ULL,
    375       0xfffe000000000000ULL,
    376       0ULL,
    377       0ULL,
    378       0ULL
    379     },
    380     {
    381       0x00000000080c0000ULL,
    382       0x0c06000000000000ULL,
    383       -1ULL,
    384       -1ULL,
    385       -1ULL
    386     }
    387 #endif
    388   },
    389   { "addb", TILEPRO_OPC_ADDB, 0x3, 3, TREG_ZERO, 1,
    390     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    391 #ifndef DISASM_ONLY
    392     {
    393       0x800000007ffc0000ULL,
    394       0xfffe000000000000ULL,
    395       0ULL,
    396       0ULL,
    397       0ULL
    398     },
    399     {
    400       0x0000000000040000ULL,
    401       0x0802000000000000ULL,
    402       -1ULL,
    403       -1ULL,
    404       -1ULL
    405     }
    406 #endif
    407   },
    408   { "addb.sn", TILEPRO_OPC_ADDB_SN, 0x3, 3, TREG_SN, 1,
    409     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    410 #ifndef DISASM_ONLY
    411     {
    412       0x800000007ffc0000ULL,
    413       0xfffe000000000000ULL,
    414       0ULL,
    415       0ULL,
    416       0ULL
    417     },
    418     {
    419       0x0000000008040000ULL,
    420       0x0c02000000000000ULL,
    421       -1ULL,
    422       -1ULL,
    423       -1ULL
    424     }
    425 #endif
    426   },
    427   { "addbs_u", TILEPRO_OPC_ADDBS_U, 0x3, 3, TREG_ZERO, 1,
    428     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    429 #ifndef DISASM_ONLY
    430     {
    431       0x800000007ffc0000ULL,
    432       0xfffe000000000000ULL,
    433       0ULL,
    434       0ULL,
    435       0ULL
    436     },
    437     {
    438       0x0000000001880000ULL,
    439       0x0888000000000000ULL,
    440       -1ULL,
    441       -1ULL,
    442       -1ULL
    443     }
    444 #endif
    445   },
    446   { "addbs_u.sn", TILEPRO_OPC_ADDBS_U_SN, 0x3, 3, TREG_SN, 1,
    447     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    448 #ifndef DISASM_ONLY
    449     {
    450       0x800000007ffc0000ULL,
    451       0xfffe000000000000ULL,
    452       0ULL,
    453       0ULL,
    454       0ULL
    455     },
    456     {
    457       0x0000000009880000ULL,
    458       0x0c88000000000000ULL,
    459       -1ULL,
    460       -1ULL,
    461       -1ULL
    462     }
    463 #endif
    464   },
    465   { "addh", TILEPRO_OPC_ADDH, 0x3, 3, TREG_ZERO, 1,
    466     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    467 #ifndef DISASM_ONLY
    468     {
    469       0x800000007ffc0000ULL,
    470       0xfffe000000000000ULL,
    471       0ULL,
    472       0ULL,
    473       0ULL
    474     },
    475     {
    476       0x0000000000080000ULL,
    477       0x0804000000000000ULL,
    478       -1ULL,
    479       -1ULL,
    480       -1ULL
    481     }
    482 #endif
    483   },
    484   { "addh.sn", TILEPRO_OPC_ADDH_SN, 0x3, 3, TREG_SN, 1,
    485     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    486 #ifndef DISASM_ONLY
    487     {
    488       0x800000007ffc0000ULL,
    489       0xfffe000000000000ULL,
    490       0ULL,
    491       0ULL,
    492       0ULL
    493     },
    494     {
    495       0x0000000008080000ULL,
    496       0x0c04000000000000ULL,
    497       -1ULL,
    498       -1ULL,
    499       -1ULL
    500     }
    501 #endif
    502   },
    503   { "addhs", TILEPRO_OPC_ADDHS, 0x3, 3, TREG_ZERO, 1,
    504     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    505 #ifndef DISASM_ONLY
    506     {
    507       0x800000007ffc0000ULL,
    508       0xfffe000000000000ULL,
    509       0ULL,
    510       0ULL,
    511       0ULL
    512     },
    513     {
    514       0x00000000018c0000ULL,
    515       0x088a000000000000ULL,
    516       -1ULL,
    517       -1ULL,
    518       -1ULL
    519     }
    520 #endif
    521   },
    522   { "addhs.sn", TILEPRO_OPC_ADDHS_SN, 0x3, 3, TREG_SN, 1,
    523     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    524 #ifndef DISASM_ONLY
    525     {
    526       0x800000007ffc0000ULL,
    527       0xfffe000000000000ULL,
    528       0ULL,
    529       0ULL,
    530       0ULL
    531     },
    532     {
    533       0x00000000098c0000ULL,
    534       0x0c8a000000000000ULL,
    535       -1ULL,
    536       -1ULL,
    537       -1ULL
    538     }
    539 #endif
    540   },
    541   { "addi", TILEPRO_OPC_ADDI, 0xf, 3, TREG_ZERO, 1,
    542     { { 9, 10, 0 }, { 7, 8, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
    543 #ifndef DISASM_ONLY
    544     {
    545       0x800000007ff00000ULL,
    546       0xfff8000000000000ULL,
    547       0x8000000078000000ULL,
    548       0xf800000000000000ULL,
    549       0ULL
    550     },
    551     {
    552       0x0000000040300000ULL,
    553       0x3018000000000000ULL,
    554       0x8000000048000000ULL,
    555       0xb800000000000000ULL,
    556       -1ULL
    557     }
    558 #endif
    559   },
    560   { "addi.sn", TILEPRO_OPC_ADDI_SN, 0x3, 3, TREG_SN, 1,
    561     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    562 #ifndef DISASM_ONLY
    563     {
    564       0x800000007ff00000ULL,
    565       0xfff8000000000000ULL,
    566       0ULL,
    567       0ULL,
    568       0ULL
    569     },
    570     {
    571       0x0000000048300000ULL,
    572       0x3418000000000000ULL,
    573       -1ULL,
    574       -1ULL,
    575       -1ULL
    576     }
    577 #endif
    578   },
    579   { "addib", TILEPRO_OPC_ADDIB, 0x3, 3, TREG_ZERO, 1,
    580     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    581 #ifndef DISASM_ONLY
    582     {
    583       0x800000007ff00000ULL,
    584       0xfff8000000000000ULL,
    585       0ULL,
    586       0ULL,
    587       0ULL
    588     },
    589     {
    590       0x0000000040100000ULL,
    591       0x3008000000000000ULL,
    592       -1ULL,
    593       -1ULL,
    594       -1ULL
    595     }
    596 #endif
    597   },
    598   { "addib.sn", TILEPRO_OPC_ADDIB_SN, 0x3, 3, TREG_SN, 1,
    599     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    600 #ifndef DISASM_ONLY
    601     {
    602       0x800000007ff00000ULL,
    603       0xfff8000000000000ULL,
    604       0ULL,
    605       0ULL,
    606       0ULL
    607     },
    608     {
    609       0x0000000048100000ULL,
    610       0x3408000000000000ULL,
    611       -1ULL,
    612       -1ULL,
    613       -1ULL
    614     }
    615 #endif
    616   },
    617   { "addih", TILEPRO_OPC_ADDIH, 0x3, 3, TREG_ZERO, 1,
    618     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    619 #ifndef DISASM_ONLY
    620     {
    621       0x800000007ff00000ULL,
    622       0xfff8000000000000ULL,
    623       0ULL,
    624       0ULL,
    625       0ULL
    626     },
    627     {
    628       0x0000000040200000ULL,
    629       0x3010000000000000ULL,
    630       -1ULL,
    631       -1ULL,
    632       -1ULL
    633     }
    634 #endif
    635   },
    636   { "addih.sn", TILEPRO_OPC_ADDIH_SN, 0x3, 3, TREG_SN, 1,
    637     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    638 #ifndef DISASM_ONLY
    639     {
    640       0x800000007ff00000ULL,
    641       0xfff8000000000000ULL,
    642       0ULL,
    643       0ULL,
    644       0ULL
    645     },
    646     {
    647       0x0000000048200000ULL,
    648       0x3410000000000000ULL,
    649       -1ULL,
    650       -1ULL,
    651       -1ULL
    652     }
    653 #endif
    654   },
    655   { "addli", TILEPRO_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1,
    656     { { 9, 10, 4 }, { 7, 8, 5 }, { 0, }, { 0, }, { 0, } },
    657 #ifndef DISASM_ONLY
    658     {
    659       0x8000000070000000ULL,
    660       0xf800000000000000ULL,
    661       0ULL,
    662       0ULL,
    663       0ULL
    664     },
    665     {
    666       0x0000000020000000ULL,
    667       0x1800000000000000ULL,
    668       -1ULL,
    669       -1ULL,
    670       -1ULL
    671     }
    672 #endif
    673   },
    674   { "addli.sn", TILEPRO_OPC_ADDLI_SN, 0x3, 3, TREG_SN, 1,
    675     { { 9, 10, 4 }, { 7, 8, 5 }, { 0, }, { 0, }, { 0, } },
    676 #ifndef DISASM_ONLY
    677     {
    678       0x8000000070000000ULL,
    679       0xf800000000000000ULL,
    680       0ULL,
    681       0ULL,
    682       0ULL
    683     },
    684     {
    685       0x0000000010000000ULL,
    686       0x1000000000000000ULL,
    687       -1ULL,
    688       -1ULL,
    689       -1ULL
    690     }
    691 #endif
    692   },
    693   { "addlis", TILEPRO_OPC_ADDLIS, 0x3, 3, TREG_SN, 1,
    694     { { 9, 10, 4 }, { 7, 8, 5 }, { 0, }, { 0, }, { 0, } },
    695 #ifndef DISASM_ONLY
    696     {
    697       0x8000000070000000ULL,
    698       0xf800000000000000ULL,
    699       0ULL,
    700       0ULL,
    701       0ULL
    702     },
    703     {
    704       0x0000000010000000ULL,
    705       0x1000000000000000ULL,
    706       -1ULL,
    707       -1ULL,
    708       -1ULL
    709     }
    710 #endif
    711   },
    712   { "adds", TILEPRO_OPC_ADDS, 0x3, 3, TREG_ZERO, 1,
    713     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    714 #ifndef DISASM_ONLY
    715     {
    716       0x800000007ffc0000ULL,
    717       0xfffe000000000000ULL,
    718       0ULL,
    719       0ULL,
    720       0ULL
    721     },
    722     {
    723       0x0000000001800000ULL,
    724       0x0884000000000000ULL,
    725       -1ULL,
    726       -1ULL,
    727       -1ULL
    728     }
    729 #endif
    730   },
    731   { "adds.sn", TILEPRO_OPC_ADDS_SN, 0x3, 3, TREG_SN, 1,
    732     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    733 #ifndef DISASM_ONLY
    734     {
    735       0x800000007ffc0000ULL,
    736       0xfffe000000000000ULL,
    737       0ULL,
    738       0ULL,
    739       0ULL
    740     },
    741     {
    742       0x0000000009800000ULL,
    743       0x0c84000000000000ULL,
    744       -1ULL,
    745       -1ULL,
    746       -1ULL
    747     }
    748 #endif
    749   },
    750   { "adiffb_u", TILEPRO_OPC_ADIFFB_U, 0x1, 3, TREG_ZERO, 1,
    751     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    752 #ifndef DISASM_ONLY
    753     {
    754       0x800000007ffc0000ULL,
    755       0ULL,
    756       0ULL,
    757       0ULL,
    758       0ULL
    759     },
    760     {
    761       0x0000000000100000ULL,
    762       -1ULL,
    763       -1ULL,
    764       -1ULL,
    765       -1ULL
    766     }
    767 #endif
    768   },
    769   { "adiffb_u.sn", TILEPRO_OPC_ADIFFB_U_SN, 0x1, 3, TREG_SN, 1,
    770     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    771 #ifndef DISASM_ONLY
    772     {
    773       0x800000007ffc0000ULL,
    774       0ULL,
    775       0ULL,
    776       0ULL,
    777       0ULL
    778     },
    779     {
    780       0x0000000008100000ULL,
    781       -1ULL,
    782       -1ULL,
    783       -1ULL,
    784       -1ULL
    785     }
    786 #endif
    787   },
    788   { "adiffh", TILEPRO_OPC_ADIFFH, 0x1, 3, TREG_ZERO, 1,
    789     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    790 #ifndef DISASM_ONLY
    791     {
    792       0x800000007ffc0000ULL,
    793       0ULL,
    794       0ULL,
    795       0ULL,
    796       0ULL
    797     },
    798     {
    799       0x0000000000140000ULL,
    800       -1ULL,
    801       -1ULL,
    802       -1ULL,
    803       -1ULL
    804     }
    805 #endif
    806   },
    807   { "adiffh.sn", TILEPRO_OPC_ADIFFH_SN, 0x1, 3, TREG_SN, 1,
    808     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    809 #ifndef DISASM_ONLY
    810     {
    811       0x800000007ffc0000ULL,
    812       0ULL,
    813       0ULL,
    814       0ULL,
    815       0ULL
    816     },
    817     {
    818       0x0000000008140000ULL,
    819       -1ULL,
    820       -1ULL,
    821       -1ULL,
    822       -1ULL
    823     }
    824 #endif
    825   },
    826   { "and", TILEPRO_OPC_AND, 0xf, 3, TREG_ZERO, 1,
    827     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
    828 #ifndef DISASM_ONLY
    829     {
    830       0x800000007ffc0000ULL,
    831       0xfffe000000000000ULL,
    832       0x80000000780c0000ULL,
    833       0xf806000000000000ULL,
    834       0ULL
    835     },
    836     {
    837       0x0000000000180000ULL,
    838       0x0808000000000000ULL,
    839       0x8000000018000000ULL,
    840       0x9800000000000000ULL,
    841       -1ULL
    842     }
    843 #endif
    844   },
    845   { "and.sn", TILEPRO_OPC_AND_SN, 0x3, 3, TREG_SN, 1,
    846     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
    847 #ifndef DISASM_ONLY
    848     {
    849       0x800000007ffc0000ULL,
    850       0xfffe000000000000ULL,
    851       0ULL,
    852       0ULL,
    853       0ULL
    854     },
    855     {
    856       0x0000000008180000ULL,
    857       0x0c08000000000000ULL,
    858       -1ULL,
    859       -1ULL,
    860       -1ULL
    861     }
    862 #endif
    863   },
    864   { "andi", TILEPRO_OPC_ANDI, 0xf, 3, TREG_ZERO, 1,
    865     { { 9, 10, 0 }, { 7, 8, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
    866 #ifndef DISASM_ONLY
    867     {
    868       0x800000007ff00000ULL,
    869       0xfff8000000000000ULL,
    870       0x8000000078000000ULL,
    871       0xf800000000000000ULL,
    872       0ULL
    873     },
    874     {
    875       0x0000000050100000ULL,
    876       0x3020000000000000ULL,
    877       0x8000000050000000ULL,
    878       0xc000000000000000ULL,
    879       -1ULL
    880     }
    881 #endif
    882   },
    883   { "andi.sn", TILEPRO_OPC_ANDI_SN, 0x3, 3, TREG_SN, 1,
    884     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
    885 #ifndef DISASM_ONLY
    886     {
    887       0x800000007ff00000ULL,
    888       0xfff8000000000000ULL,
    889       0ULL,
    890       0ULL,
    891       0ULL
    892     },
    893     {
    894       0x0000000058100000ULL,
    895       0x3420000000000000ULL,
    896       -1ULL,
    897       -1ULL,
    898       -1ULL
    899     }
    900 #endif
    901   },
    902   { "auli", TILEPRO_OPC_AULI, 0x3, 3, TREG_ZERO, 1,
    903     { { 9, 10, 4 }, { 7, 8, 5 }, { 0, }, { 0, }, { 0, } },
    904 #ifndef DISASM_ONLY
    905     {
    906       0x8000000070000000ULL,
    907       0xf800000000000000ULL,
    908       0ULL,
    909       0ULL,
    910       0ULL
    911     },
    912     {
    913       0x0000000030000000ULL,
    914       0x2000000000000000ULL,
    915       -1ULL,
    916       -1ULL,
    917       -1ULL
    918     }
    919 #endif
    920   },
    921   { "avgb_u", TILEPRO_OPC_AVGB_U, 0x1, 3, TREG_ZERO, 1,
    922     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    923 #ifndef DISASM_ONLY
    924     {
    925       0x800000007ffc0000ULL,
    926       0ULL,
    927       0ULL,
    928       0ULL,
    929       0ULL
    930     },
    931     {
    932       0x00000000001c0000ULL,
    933       -1ULL,
    934       -1ULL,
    935       -1ULL,
    936       -1ULL
    937     }
    938 #endif
    939   },
    940   { "avgb_u.sn", TILEPRO_OPC_AVGB_U_SN, 0x1, 3, TREG_SN, 1,
    941     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    942 #ifndef DISASM_ONLY
    943     {
    944       0x800000007ffc0000ULL,
    945       0ULL,
    946       0ULL,
    947       0ULL,
    948       0ULL
    949     },
    950     {
    951       0x00000000081c0000ULL,
    952       -1ULL,
    953       -1ULL,
    954       -1ULL,
    955       -1ULL
    956     }
    957 #endif
    958   },
    959   { "avgh", TILEPRO_OPC_AVGH, 0x1, 3, TREG_ZERO, 1,
    960     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    961 #ifndef DISASM_ONLY
    962     {
    963       0x800000007ffc0000ULL,
    964       0ULL,
    965       0ULL,
    966       0ULL,
    967       0ULL
    968     },
    969     {
    970       0x0000000000200000ULL,
    971       -1ULL,
    972       -1ULL,
    973       -1ULL,
    974       -1ULL
    975     }
    976 #endif
    977   },
    978   { "avgh.sn", TILEPRO_OPC_AVGH_SN, 0x1, 3, TREG_SN, 1,
    979     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
    980 #ifndef DISASM_ONLY
    981     {
    982       0x800000007ffc0000ULL,
    983       0ULL,
    984       0ULL,
    985       0ULL,
    986       0ULL
    987     },
    988     {
    989       0x0000000008200000ULL,
    990       -1ULL,
    991       -1ULL,
    992       -1ULL,
    993       -1ULL
    994     }
    995 #endif
    996   },
    997   { "bbns", TILEPRO_OPC_BBNS, 0x2, 2, TREG_ZERO, 1,
    998     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
    999 #ifndef DISASM_ONLY
   1000     {
   1001       0ULL,
   1002       0xfc00000780000000ULL,
   1003       0ULL,
   1004       0ULL,
   1005       0ULL
   1006     },
   1007     {
   1008       -1ULL,
   1009       0x2800000700000000ULL,
   1010       -1ULL,
   1011       -1ULL,
   1012       -1ULL
   1013     }
   1014 #endif
   1015   },
   1016   { "bbns.sn", TILEPRO_OPC_BBNS_SN, 0x2, 2, TREG_SN, 1,
   1017     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1018 #ifndef DISASM_ONLY
   1019     {
   1020       0ULL,
   1021       0xfc00000780000000ULL,
   1022       0ULL,
   1023       0ULL,
   1024       0ULL
   1025     },
   1026     {
   1027       -1ULL,
   1028       0x2c00000700000000ULL,
   1029       -1ULL,
   1030       -1ULL,
   1031       -1ULL
   1032     }
   1033 #endif
   1034   },
   1035   { "bbnst", TILEPRO_OPC_BBNST, 0x2, 2, TREG_ZERO, 1,
   1036     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1037 #ifndef DISASM_ONLY
   1038     {
   1039       0ULL,
   1040       0xfc00000780000000ULL,
   1041       0ULL,
   1042       0ULL,
   1043       0ULL
   1044     },
   1045     {
   1046       -1ULL,
   1047       0x2800000780000000ULL,
   1048       -1ULL,
   1049       -1ULL,
   1050       -1ULL
   1051     }
   1052 #endif
   1053   },
   1054   { "bbnst.sn", TILEPRO_OPC_BBNST_SN, 0x2, 2, TREG_SN, 1,
   1055     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1056 #ifndef DISASM_ONLY
   1057     {
   1058       0ULL,
   1059       0xfc00000780000000ULL,
   1060       0ULL,
   1061       0ULL,
   1062       0ULL
   1063     },
   1064     {
   1065       -1ULL,
   1066       0x2c00000780000000ULL,
   1067       -1ULL,
   1068       -1ULL,
   1069       -1ULL
   1070     }
   1071 #endif
   1072   },
   1073   { "bbs", TILEPRO_OPC_BBS, 0x2, 2, TREG_ZERO, 1,
   1074     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1075 #ifndef DISASM_ONLY
   1076     {
   1077       0ULL,
   1078       0xfc00000780000000ULL,
   1079       0ULL,
   1080       0ULL,
   1081       0ULL
   1082     },
   1083     {
   1084       -1ULL,
   1085       0x2800000600000000ULL,
   1086       -1ULL,
   1087       -1ULL,
   1088       -1ULL
   1089     }
   1090 #endif
   1091   },
   1092   { "bbs.sn", TILEPRO_OPC_BBS_SN, 0x2, 2, TREG_SN, 1,
   1093     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1094 #ifndef DISASM_ONLY
   1095     {
   1096       0ULL,
   1097       0xfc00000780000000ULL,
   1098       0ULL,
   1099       0ULL,
   1100       0ULL
   1101     },
   1102     {
   1103       -1ULL,
   1104       0x2c00000600000000ULL,
   1105       -1ULL,
   1106       -1ULL,
   1107       -1ULL
   1108     }
   1109 #endif
   1110   },
   1111   { "bbst", TILEPRO_OPC_BBST, 0x2, 2, TREG_ZERO, 1,
   1112     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1113 #ifndef DISASM_ONLY
   1114     {
   1115       0ULL,
   1116       0xfc00000780000000ULL,
   1117       0ULL,
   1118       0ULL,
   1119       0ULL
   1120     },
   1121     {
   1122       -1ULL,
   1123       0x2800000680000000ULL,
   1124       -1ULL,
   1125       -1ULL,
   1126       -1ULL
   1127     }
   1128 #endif
   1129   },
   1130   { "bbst.sn", TILEPRO_OPC_BBST_SN, 0x2, 2, TREG_SN, 1,
   1131     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1132 #ifndef DISASM_ONLY
   1133     {
   1134       0ULL,
   1135       0xfc00000780000000ULL,
   1136       0ULL,
   1137       0ULL,
   1138       0ULL
   1139     },
   1140     {
   1141       -1ULL,
   1142       0x2c00000680000000ULL,
   1143       -1ULL,
   1144       -1ULL,
   1145       -1ULL
   1146     }
   1147 #endif
   1148   },
   1149   { "bgez", TILEPRO_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1,
   1150     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1151 #ifndef DISASM_ONLY
   1152     {
   1153       0ULL,
   1154       0xfc00000780000000ULL,
   1155       0ULL,
   1156       0ULL,
   1157       0ULL
   1158     },
   1159     {
   1160       -1ULL,
   1161       0x2800000300000000ULL,
   1162       -1ULL,
   1163       -1ULL,
   1164       -1ULL
   1165     }
   1166 #endif
   1167   },
   1168   { "bgez.sn", TILEPRO_OPC_BGEZ_SN, 0x2, 2, TREG_SN, 1,
   1169     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1170 #ifndef DISASM_ONLY
   1171     {
   1172       0ULL,
   1173       0xfc00000780000000ULL,
   1174       0ULL,
   1175       0ULL,
   1176       0ULL
   1177     },
   1178     {
   1179       -1ULL,
   1180       0x2c00000300000000ULL,
   1181       -1ULL,
   1182       -1ULL,
   1183       -1ULL
   1184     }
   1185 #endif
   1186   },
   1187   { "bgezt", TILEPRO_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1,
   1188     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1189 #ifndef DISASM_ONLY
   1190     {
   1191       0ULL,
   1192       0xfc00000780000000ULL,
   1193       0ULL,
   1194       0ULL,
   1195       0ULL
   1196     },
   1197     {
   1198       -1ULL,
   1199       0x2800000380000000ULL,
   1200       -1ULL,
   1201       -1ULL,
   1202       -1ULL
   1203     }
   1204 #endif
   1205   },
   1206   { "bgezt.sn", TILEPRO_OPC_BGEZT_SN, 0x2, 2, TREG_SN, 1,
   1207     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1208 #ifndef DISASM_ONLY
   1209     {
   1210       0ULL,
   1211       0xfc00000780000000ULL,
   1212       0ULL,
   1213       0ULL,
   1214       0ULL
   1215     },
   1216     {
   1217       -1ULL,
   1218       0x2c00000380000000ULL,
   1219       -1ULL,
   1220       -1ULL,
   1221       -1ULL
   1222     }
   1223 #endif
   1224   },
   1225   { "bgz", TILEPRO_OPC_BGZ, 0x2, 2, TREG_ZERO, 1,
   1226     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1227 #ifndef DISASM_ONLY
   1228     {
   1229       0ULL,
   1230       0xfc00000780000000ULL,
   1231       0ULL,
   1232       0ULL,
   1233       0ULL
   1234     },
   1235     {
   1236       -1ULL,
   1237       0x2800000200000000ULL,
   1238       -1ULL,
   1239       -1ULL,
   1240       -1ULL
   1241     }
   1242 #endif
   1243   },
   1244   { "bgz.sn", TILEPRO_OPC_BGZ_SN, 0x2, 2, TREG_SN, 1,
   1245     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1246 #ifndef DISASM_ONLY
   1247     {
   1248       0ULL,
   1249       0xfc00000780000000ULL,
   1250       0ULL,
   1251       0ULL,
   1252       0ULL
   1253     },
   1254     {
   1255       -1ULL,
   1256       0x2c00000200000000ULL,
   1257       -1ULL,
   1258       -1ULL,
   1259       -1ULL
   1260     }
   1261 #endif
   1262   },
   1263   { "bgzt", TILEPRO_OPC_BGZT, 0x2, 2, TREG_ZERO, 1,
   1264     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1265 #ifndef DISASM_ONLY
   1266     {
   1267       0ULL,
   1268       0xfc00000780000000ULL,
   1269       0ULL,
   1270       0ULL,
   1271       0ULL
   1272     },
   1273     {
   1274       -1ULL,
   1275       0x2800000280000000ULL,
   1276       -1ULL,
   1277       -1ULL,
   1278       -1ULL
   1279     }
   1280 #endif
   1281   },
   1282   { "bgzt.sn", TILEPRO_OPC_BGZT_SN, 0x2, 2, TREG_SN, 1,
   1283     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1284 #ifndef DISASM_ONLY
   1285     {
   1286       0ULL,
   1287       0xfc00000780000000ULL,
   1288       0ULL,
   1289       0ULL,
   1290       0ULL
   1291     },
   1292     {
   1293       -1ULL,
   1294       0x2c00000280000000ULL,
   1295       -1ULL,
   1296       -1ULL,
   1297       -1ULL
   1298     }
   1299 #endif
   1300   },
   1301   { "bitx", TILEPRO_OPC_BITX, 0x5, 2, TREG_ZERO, 1,
   1302     { { 9, 10 }, { 0, }, { 11, 12 }, { 0, }, { 0, } },
   1303 #ifndef DISASM_ONLY
   1304     {
   1305       0x800000007ffff000ULL,
   1306       0ULL,
   1307       0x80000000780ff000ULL,
   1308       0ULL,
   1309       0ULL
   1310     },
   1311     {
   1312       0x0000000070161000ULL,
   1313       -1ULL,
   1314       0x80000000680a1000ULL,
   1315       -1ULL,
   1316       -1ULL
   1317     }
   1318 #endif
   1319   },
   1320   { "bitx.sn", TILEPRO_OPC_BITX_SN, 0x1, 2, TREG_SN, 1,
   1321     { { 9, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1322 #ifndef DISASM_ONLY
   1323     {
   1324       0x800000007ffff000ULL,
   1325       0ULL,
   1326       0ULL,
   1327       0ULL,
   1328       0ULL
   1329     },
   1330     {
   1331       0x0000000078161000ULL,
   1332       -1ULL,
   1333       -1ULL,
   1334       -1ULL,
   1335       -1ULL
   1336     }
   1337 #endif
   1338   },
   1339   { "blez", TILEPRO_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1,
   1340     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1341 #ifndef DISASM_ONLY
   1342     {
   1343       0ULL,
   1344       0xfc00000780000000ULL,
   1345       0ULL,
   1346       0ULL,
   1347       0ULL
   1348     },
   1349     {
   1350       -1ULL,
   1351       0x2800000500000000ULL,
   1352       -1ULL,
   1353       -1ULL,
   1354       -1ULL
   1355     }
   1356 #endif
   1357   },
   1358   { "blez.sn", TILEPRO_OPC_BLEZ_SN, 0x2, 2, TREG_SN, 1,
   1359     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1360 #ifndef DISASM_ONLY
   1361     {
   1362       0ULL,
   1363       0xfc00000780000000ULL,
   1364       0ULL,
   1365       0ULL,
   1366       0ULL
   1367     },
   1368     {
   1369       -1ULL,
   1370       0x2c00000500000000ULL,
   1371       -1ULL,
   1372       -1ULL,
   1373       -1ULL
   1374     }
   1375 #endif
   1376   },
   1377   { "blezt", TILEPRO_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1,
   1378     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1379 #ifndef DISASM_ONLY
   1380     {
   1381       0ULL,
   1382       0xfc00000780000000ULL,
   1383       0ULL,
   1384       0ULL,
   1385       0ULL
   1386     },
   1387     {
   1388       -1ULL,
   1389       0x2800000580000000ULL,
   1390       -1ULL,
   1391       -1ULL,
   1392       -1ULL
   1393     }
   1394 #endif
   1395   },
   1396   { "blezt.sn", TILEPRO_OPC_BLEZT_SN, 0x2, 2, TREG_SN, 1,
   1397     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1398 #ifndef DISASM_ONLY
   1399     {
   1400       0ULL,
   1401       0xfc00000780000000ULL,
   1402       0ULL,
   1403       0ULL,
   1404       0ULL
   1405     },
   1406     {
   1407       -1ULL,
   1408       0x2c00000580000000ULL,
   1409       -1ULL,
   1410       -1ULL,
   1411       -1ULL
   1412     }
   1413 #endif
   1414   },
   1415   { "blz", TILEPRO_OPC_BLZ, 0x2, 2, TREG_ZERO, 1,
   1416     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1417 #ifndef DISASM_ONLY
   1418     {
   1419       0ULL,
   1420       0xfc00000780000000ULL,
   1421       0ULL,
   1422       0ULL,
   1423       0ULL
   1424     },
   1425     {
   1426       -1ULL,
   1427       0x2800000400000000ULL,
   1428       -1ULL,
   1429       -1ULL,
   1430       -1ULL
   1431     }
   1432 #endif
   1433   },
   1434   { "blz.sn", TILEPRO_OPC_BLZ_SN, 0x2, 2, TREG_SN, 1,
   1435     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1436 #ifndef DISASM_ONLY
   1437     {
   1438       0ULL,
   1439       0xfc00000780000000ULL,
   1440       0ULL,
   1441       0ULL,
   1442       0ULL
   1443     },
   1444     {
   1445       -1ULL,
   1446       0x2c00000400000000ULL,
   1447       -1ULL,
   1448       -1ULL,
   1449       -1ULL
   1450     }
   1451 #endif
   1452   },
   1453   { "blzt", TILEPRO_OPC_BLZT, 0x2, 2, TREG_ZERO, 1,
   1454     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1455 #ifndef DISASM_ONLY
   1456     {
   1457       0ULL,
   1458       0xfc00000780000000ULL,
   1459       0ULL,
   1460       0ULL,
   1461       0ULL
   1462     },
   1463     {
   1464       -1ULL,
   1465       0x2800000480000000ULL,
   1466       -1ULL,
   1467       -1ULL,
   1468       -1ULL
   1469     }
   1470 #endif
   1471   },
   1472   { "blzt.sn", TILEPRO_OPC_BLZT_SN, 0x2, 2, TREG_SN, 1,
   1473     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1474 #ifndef DISASM_ONLY
   1475     {
   1476       0ULL,
   1477       0xfc00000780000000ULL,
   1478       0ULL,
   1479       0ULL,
   1480       0ULL
   1481     },
   1482     {
   1483       -1ULL,
   1484       0x2c00000480000000ULL,
   1485       -1ULL,
   1486       -1ULL,
   1487       -1ULL
   1488     }
   1489 #endif
   1490   },
   1491   { "bnz", TILEPRO_OPC_BNZ, 0x2, 2, TREG_ZERO, 1,
   1492     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1493 #ifndef DISASM_ONLY
   1494     {
   1495       0ULL,
   1496       0xfc00000780000000ULL,
   1497       0ULL,
   1498       0ULL,
   1499       0ULL
   1500     },
   1501     {
   1502       -1ULL,
   1503       0x2800000100000000ULL,
   1504       -1ULL,
   1505       -1ULL,
   1506       -1ULL
   1507     }
   1508 #endif
   1509   },
   1510   { "bnz.sn", TILEPRO_OPC_BNZ_SN, 0x2, 2, TREG_SN, 1,
   1511     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1512 #ifndef DISASM_ONLY
   1513     {
   1514       0ULL,
   1515       0xfc00000780000000ULL,
   1516       0ULL,
   1517       0ULL,
   1518       0ULL
   1519     },
   1520     {
   1521       -1ULL,
   1522       0x2c00000100000000ULL,
   1523       -1ULL,
   1524       -1ULL,
   1525       -1ULL
   1526     }
   1527 #endif
   1528   },
   1529   { "bnzt", TILEPRO_OPC_BNZT, 0x2, 2, TREG_ZERO, 1,
   1530     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1531 #ifndef DISASM_ONLY
   1532     {
   1533       0ULL,
   1534       0xfc00000780000000ULL,
   1535       0ULL,
   1536       0ULL,
   1537       0ULL
   1538     },
   1539     {
   1540       -1ULL,
   1541       0x2800000180000000ULL,
   1542       -1ULL,
   1543       -1ULL,
   1544       -1ULL
   1545     }
   1546 #endif
   1547   },
   1548   { "bnzt.sn", TILEPRO_OPC_BNZT_SN, 0x2, 2, TREG_SN, 1,
   1549     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1550 #ifndef DISASM_ONLY
   1551     {
   1552       0ULL,
   1553       0xfc00000780000000ULL,
   1554       0ULL,
   1555       0ULL,
   1556       0ULL
   1557     },
   1558     {
   1559       -1ULL,
   1560       0x2c00000180000000ULL,
   1561       -1ULL,
   1562       -1ULL,
   1563       -1ULL
   1564     }
   1565 #endif
   1566   },
   1567   { "bytex", TILEPRO_OPC_BYTEX, 0x5, 2, TREG_ZERO, 1,
   1568     { { 9, 10 }, { 0, }, { 11, 12 }, { 0, }, { 0, } },
   1569 #ifndef DISASM_ONLY
   1570     {
   1571       0x800000007ffff000ULL,
   1572       0ULL,
   1573       0x80000000780ff000ULL,
   1574       0ULL,
   1575       0ULL
   1576     },
   1577     {
   1578       0x0000000070162000ULL,
   1579       -1ULL,
   1580       0x80000000680a2000ULL,
   1581       -1ULL,
   1582       -1ULL
   1583     }
   1584 #endif
   1585   },
   1586   { "bytex.sn", TILEPRO_OPC_BYTEX_SN, 0x1, 2, TREG_SN, 1,
   1587     { { 9, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1588 #ifndef DISASM_ONLY
   1589     {
   1590       0x800000007ffff000ULL,
   1591       0ULL,
   1592       0ULL,
   1593       0ULL,
   1594       0ULL
   1595     },
   1596     {
   1597       0x0000000078162000ULL,
   1598       -1ULL,
   1599       -1ULL,
   1600       -1ULL,
   1601       -1ULL
   1602     }
   1603 #endif
   1604   },
   1605   { "bz", TILEPRO_OPC_BZ, 0x2, 2, TREG_ZERO, 1,
   1606     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1607 #ifndef DISASM_ONLY
   1608     {
   1609       0ULL,
   1610       0xfc00000780000000ULL,
   1611       0ULL,
   1612       0ULL,
   1613       0ULL
   1614     },
   1615     {
   1616       -1ULL,
   1617       0x2800000000000000ULL,
   1618       -1ULL,
   1619       -1ULL,
   1620       -1ULL
   1621     }
   1622 #endif
   1623   },
   1624   { "bz.sn", TILEPRO_OPC_BZ_SN, 0x2, 2, TREG_SN, 1,
   1625     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1626 #ifndef DISASM_ONLY
   1627     {
   1628       0ULL,
   1629       0xfc00000780000000ULL,
   1630       0ULL,
   1631       0ULL,
   1632       0ULL
   1633     },
   1634     {
   1635       -1ULL,
   1636       0x2c00000000000000ULL,
   1637       -1ULL,
   1638       -1ULL,
   1639       -1ULL
   1640     }
   1641 #endif
   1642   },
   1643   { "bzt", TILEPRO_OPC_BZT, 0x2, 2, TREG_ZERO, 1,
   1644     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1645 #ifndef DISASM_ONLY
   1646     {
   1647       0ULL,
   1648       0xfc00000780000000ULL,
   1649       0ULL,
   1650       0ULL,
   1651       0ULL
   1652     },
   1653     {
   1654       -1ULL,
   1655       0x2800000080000000ULL,
   1656       -1ULL,
   1657       -1ULL,
   1658       -1ULL
   1659     }
   1660 #endif
   1661   },
   1662   { "bzt.sn", TILEPRO_OPC_BZT_SN, 0x2, 2, TREG_SN, 1,
   1663     { { 0, }, { 8, 20 }, { 0, }, { 0, }, { 0, } },
   1664 #ifndef DISASM_ONLY
   1665     {
   1666       0ULL,
   1667       0xfc00000780000000ULL,
   1668       0ULL,
   1669       0ULL,
   1670       0ULL
   1671     },
   1672     {
   1673       -1ULL,
   1674       0x2c00000080000000ULL,
   1675       -1ULL,
   1676       -1ULL,
   1677       -1ULL
   1678     }
   1679 #endif
   1680   },
   1681   { "clz", TILEPRO_OPC_CLZ, 0x5, 2, TREG_ZERO, 1,
   1682     { { 9, 10 }, { 0, }, { 11, 12 }, { 0, }, { 0, } },
   1683 #ifndef DISASM_ONLY
   1684     {
   1685       0x800000007ffff000ULL,
   1686       0ULL,
   1687       0x80000000780ff000ULL,
   1688       0ULL,
   1689       0ULL
   1690     },
   1691     {
   1692       0x0000000070163000ULL,
   1693       -1ULL,
   1694       0x80000000680a3000ULL,
   1695       -1ULL,
   1696       -1ULL
   1697     }
   1698 #endif
   1699   },
   1700   { "clz.sn", TILEPRO_OPC_CLZ_SN, 0x1, 2, TREG_SN, 1,
   1701     { { 9, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1702 #ifndef DISASM_ONLY
   1703     {
   1704       0x800000007ffff000ULL,
   1705       0ULL,
   1706       0ULL,
   1707       0ULL,
   1708       0ULL
   1709     },
   1710     {
   1711       0x0000000078163000ULL,
   1712       -1ULL,
   1713       -1ULL,
   1714       -1ULL,
   1715       -1ULL
   1716     }
   1717 #endif
   1718   },
   1719   { "crc32_32", TILEPRO_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1,
   1720     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1721 #ifndef DISASM_ONLY
   1722     {
   1723       0x800000007ffc0000ULL,
   1724       0ULL,
   1725       0ULL,
   1726       0ULL,
   1727       0ULL
   1728     },
   1729     {
   1730       0x0000000000240000ULL,
   1731       -1ULL,
   1732       -1ULL,
   1733       -1ULL,
   1734       -1ULL
   1735     }
   1736 #endif
   1737   },
   1738   { "crc32_32.sn", TILEPRO_OPC_CRC32_32_SN, 0x1, 3, TREG_SN, 1,
   1739     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1740 #ifndef DISASM_ONLY
   1741     {
   1742       0x800000007ffc0000ULL,
   1743       0ULL,
   1744       0ULL,
   1745       0ULL,
   1746       0ULL
   1747     },
   1748     {
   1749       0x0000000008240000ULL,
   1750       -1ULL,
   1751       -1ULL,
   1752       -1ULL,
   1753       -1ULL
   1754     }
   1755 #endif
   1756   },
   1757   { "crc32_8", TILEPRO_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1,
   1758     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1759 #ifndef DISASM_ONLY
   1760     {
   1761       0x800000007ffc0000ULL,
   1762       0ULL,
   1763       0ULL,
   1764       0ULL,
   1765       0ULL
   1766     },
   1767     {
   1768       0x0000000000280000ULL,
   1769       -1ULL,
   1770       -1ULL,
   1771       -1ULL,
   1772       -1ULL
   1773     }
   1774 #endif
   1775   },
   1776   { "crc32_8.sn", TILEPRO_OPC_CRC32_8_SN, 0x1, 3, TREG_SN, 1,
   1777     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1778 #ifndef DISASM_ONLY
   1779     {
   1780       0x800000007ffc0000ULL,
   1781       0ULL,
   1782       0ULL,
   1783       0ULL,
   1784       0ULL
   1785     },
   1786     {
   1787       0x0000000008280000ULL,
   1788       -1ULL,
   1789       -1ULL,
   1790       -1ULL,
   1791       -1ULL
   1792     }
   1793 #endif
   1794   },
   1795   { "ctz", TILEPRO_OPC_CTZ, 0x5, 2, TREG_ZERO, 1,
   1796     { { 9, 10 }, { 0, }, { 11, 12 }, { 0, }, { 0, } },
   1797 #ifndef DISASM_ONLY
   1798     {
   1799       0x800000007ffff000ULL,
   1800       0ULL,
   1801       0x80000000780ff000ULL,
   1802       0ULL,
   1803       0ULL
   1804     },
   1805     {
   1806       0x0000000070164000ULL,
   1807       -1ULL,
   1808       0x80000000680a4000ULL,
   1809       -1ULL,
   1810       -1ULL
   1811     }
   1812 #endif
   1813   },
   1814   { "ctz.sn", TILEPRO_OPC_CTZ_SN, 0x1, 2, TREG_SN, 1,
   1815     { { 9, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1816 #ifndef DISASM_ONLY
   1817     {
   1818       0x800000007ffff000ULL,
   1819       0ULL,
   1820       0ULL,
   1821       0ULL,
   1822       0ULL
   1823     },
   1824     {
   1825       0x0000000078164000ULL,
   1826       -1ULL,
   1827       -1ULL,
   1828       -1ULL,
   1829       -1ULL
   1830     }
   1831 #endif
   1832   },
   1833   { "drain", TILEPRO_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0,
   1834     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   1835 #ifndef DISASM_ONLY
   1836     {
   1837       0ULL,
   1838       0xfbfff80000000000ULL,
   1839       0ULL,
   1840       0ULL,
   1841       0ULL
   1842     },
   1843     {
   1844       -1ULL,
   1845       0x400b080000000000ULL,
   1846       -1ULL,
   1847       -1ULL,
   1848       -1ULL
   1849     }
   1850 #endif
   1851   },
   1852   { "dtlbpr", TILEPRO_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1,
   1853     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   1854 #ifndef DISASM_ONLY
   1855     {
   1856       0ULL,
   1857       0xfbfff80000000000ULL,
   1858       0ULL,
   1859       0ULL,
   1860       0ULL
   1861     },
   1862     {
   1863       -1ULL,
   1864       0x400b100000000000ULL,
   1865       -1ULL,
   1866       -1ULL,
   1867       -1ULL
   1868     }
   1869 #endif
   1870   },
   1871   { "dword_align", TILEPRO_OPC_DWORD_ALIGN, 0x1, 3, TREG_ZERO, 1,
   1872     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1873 #ifndef DISASM_ONLY
   1874     {
   1875       0x800000007ffc0000ULL,
   1876       0ULL,
   1877       0ULL,
   1878       0ULL,
   1879       0ULL
   1880     },
   1881     {
   1882       0x00000000017c0000ULL,
   1883       -1ULL,
   1884       -1ULL,
   1885       -1ULL,
   1886       -1ULL
   1887     }
   1888 #endif
   1889   },
   1890   { "dword_align.sn", TILEPRO_OPC_DWORD_ALIGN_SN, 0x1, 3, TREG_SN, 1,
   1891     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1892 #ifndef DISASM_ONLY
   1893     {
   1894       0x800000007ffc0000ULL,
   1895       0ULL,
   1896       0ULL,
   1897       0ULL,
   1898       0ULL
   1899     },
   1900     {
   1901       0x00000000097c0000ULL,
   1902       -1ULL,
   1903       -1ULL,
   1904       -1ULL,
   1905       -1ULL
   1906     }
   1907 #endif
   1908   },
   1909   { "finv", TILEPRO_OPC_FINV, 0x2, 1, TREG_ZERO, 1,
   1910     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   1911 #ifndef DISASM_ONLY
   1912     {
   1913       0ULL,
   1914       0xfbfff80000000000ULL,
   1915       0ULL,
   1916       0ULL,
   1917       0ULL
   1918     },
   1919     {
   1920       -1ULL,
   1921       0x400b180000000000ULL,
   1922       -1ULL,
   1923       -1ULL,
   1924       -1ULL
   1925     }
   1926 #endif
   1927   },
   1928   { "flush", TILEPRO_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1,
   1929     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   1930 #ifndef DISASM_ONLY
   1931     {
   1932       0ULL,
   1933       0xfbfff80000000000ULL,
   1934       0ULL,
   1935       0ULL,
   1936       0ULL
   1937     },
   1938     {
   1939       -1ULL,
   1940       0x400b200000000000ULL,
   1941       -1ULL,
   1942       -1ULL,
   1943       -1ULL
   1944     }
   1945 #endif
   1946   },
   1947   { "fnop", TILEPRO_OPC_FNOP, 0xf, 0, TREG_ZERO, 1,
   1948     { {  }, {  }, {  }, {  }, { 0, } },
   1949 #ifndef DISASM_ONLY
   1950     {
   1951       0x8000000077fff000ULL,
   1952       0xfbfff80000000000ULL,
   1953       0x80000000780ff000ULL,
   1954       0xf807f80000000000ULL,
   1955       0ULL
   1956     },
   1957     {
   1958       0x0000000070165000ULL,
   1959       0x400b280000000000ULL,
   1960       0x80000000680a5000ULL,
   1961       0xd805080000000000ULL,
   1962       -1ULL
   1963     }
   1964 #endif
   1965   },
   1966   { "icoh", TILEPRO_OPC_ICOH, 0x2, 1, TREG_ZERO, 1,
   1967     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   1968 #ifndef DISASM_ONLY
   1969     {
   1970       0ULL,
   1971       0xfbfff80000000000ULL,
   1972       0ULL,
   1973       0ULL,
   1974       0ULL
   1975     },
   1976     {
   1977       -1ULL,
   1978       0x400b300000000000ULL,
   1979       -1ULL,
   1980       -1ULL,
   1981       -1ULL
   1982     }
   1983 #endif
   1984   },
   1985   { "ill", TILEPRO_OPC_ILL, 0xa, 0, TREG_ZERO, 1,
   1986     { { 0, }, {  }, { 0, }, {  }, { 0, } },
   1987 #ifndef DISASM_ONLY
   1988     {
   1989       0ULL,
   1990       0xfbfff80000000000ULL,
   1991       0ULL,
   1992       0xf807f80000000000ULL,
   1993       0ULL
   1994     },
   1995     {
   1996       -1ULL,
   1997       0x400b380000000000ULL,
   1998       -1ULL,
   1999       0xd805100000000000ULL,
   2000       -1ULL
   2001     }
   2002 #endif
   2003   },
   2004   { "inthb", TILEPRO_OPC_INTHB, 0x3, 3, TREG_ZERO, 1,
   2005     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2006 #ifndef DISASM_ONLY
   2007     {
   2008       0x800000007ffc0000ULL,
   2009       0xfffe000000000000ULL,
   2010       0ULL,
   2011       0ULL,
   2012       0ULL
   2013     },
   2014     {
   2015       0x00000000002c0000ULL,
   2016       0x080a000000000000ULL,
   2017       -1ULL,
   2018       -1ULL,
   2019       -1ULL
   2020     }
   2021 #endif
   2022   },
   2023   { "inthb.sn", TILEPRO_OPC_INTHB_SN, 0x3, 3, TREG_SN, 1,
   2024     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2025 #ifndef DISASM_ONLY
   2026     {
   2027       0x800000007ffc0000ULL,
   2028       0xfffe000000000000ULL,
   2029       0ULL,
   2030       0ULL,
   2031       0ULL
   2032     },
   2033     {
   2034       0x00000000082c0000ULL,
   2035       0x0c0a000000000000ULL,
   2036       -1ULL,
   2037       -1ULL,
   2038       -1ULL
   2039     }
   2040 #endif
   2041   },
   2042   { "inthh", TILEPRO_OPC_INTHH, 0x3, 3, TREG_ZERO, 1,
   2043     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2044 #ifndef DISASM_ONLY
   2045     {
   2046       0x800000007ffc0000ULL,
   2047       0xfffe000000000000ULL,
   2048       0ULL,
   2049       0ULL,
   2050       0ULL
   2051     },
   2052     {
   2053       0x0000000000300000ULL,
   2054       0x080c000000000000ULL,
   2055       -1ULL,
   2056       -1ULL,
   2057       -1ULL
   2058     }
   2059 #endif
   2060   },
   2061   { "inthh.sn", TILEPRO_OPC_INTHH_SN, 0x3, 3, TREG_SN, 1,
   2062     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2063 #ifndef DISASM_ONLY
   2064     {
   2065       0x800000007ffc0000ULL,
   2066       0xfffe000000000000ULL,
   2067       0ULL,
   2068       0ULL,
   2069       0ULL
   2070     },
   2071     {
   2072       0x0000000008300000ULL,
   2073       0x0c0c000000000000ULL,
   2074       -1ULL,
   2075       -1ULL,
   2076       -1ULL
   2077     }
   2078 #endif
   2079   },
   2080   { "intlb", TILEPRO_OPC_INTLB, 0x3, 3, TREG_ZERO, 1,
   2081     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2082 #ifndef DISASM_ONLY
   2083     {
   2084       0x800000007ffc0000ULL,
   2085       0xfffe000000000000ULL,
   2086       0ULL,
   2087       0ULL,
   2088       0ULL
   2089     },
   2090     {
   2091       0x0000000000340000ULL,
   2092       0x080e000000000000ULL,
   2093       -1ULL,
   2094       -1ULL,
   2095       -1ULL
   2096     }
   2097 #endif
   2098   },
   2099   { "intlb.sn", TILEPRO_OPC_INTLB_SN, 0x3, 3, TREG_SN, 1,
   2100     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2101 #ifndef DISASM_ONLY
   2102     {
   2103       0x800000007ffc0000ULL,
   2104       0xfffe000000000000ULL,
   2105       0ULL,
   2106       0ULL,
   2107       0ULL
   2108     },
   2109     {
   2110       0x0000000008340000ULL,
   2111       0x0c0e000000000000ULL,
   2112       -1ULL,
   2113       -1ULL,
   2114       -1ULL
   2115     }
   2116 #endif
   2117   },
   2118   { "intlh", TILEPRO_OPC_INTLH, 0x3, 3, TREG_ZERO, 1,
   2119     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2120 #ifndef DISASM_ONLY
   2121     {
   2122       0x800000007ffc0000ULL,
   2123       0xfffe000000000000ULL,
   2124       0ULL,
   2125       0ULL,
   2126       0ULL
   2127     },
   2128     {
   2129       0x0000000000380000ULL,
   2130       0x0810000000000000ULL,
   2131       -1ULL,
   2132       -1ULL,
   2133       -1ULL
   2134     }
   2135 #endif
   2136   },
   2137   { "intlh.sn", TILEPRO_OPC_INTLH_SN, 0x3, 3, TREG_SN, 1,
   2138     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2139 #ifndef DISASM_ONLY
   2140     {
   2141       0x800000007ffc0000ULL,
   2142       0xfffe000000000000ULL,
   2143       0ULL,
   2144       0ULL,
   2145       0ULL
   2146     },
   2147     {
   2148       0x0000000008380000ULL,
   2149       0x0c10000000000000ULL,
   2150       -1ULL,
   2151       -1ULL,
   2152       -1ULL
   2153     }
   2154 #endif
   2155   },
   2156   { "inv", TILEPRO_OPC_INV, 0x2, 1, TREG_ZERO, 1,
   2157     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   2158 #ifndef DISASM_ONLY
   2159     {
   2160       0ULL,
   2161       0xfbfff80000000000ULL,
   2162       0ULL,
   2163       0ULL,
   2164       0ULL
   2165     },
   2166     {
   2167       -1ULL,
   2168       0x400b400000000000ULL,
   2169       -1ULL,
   2170       -1ULL,
   2171       -1ULL
   2172     }
   2173 #endif
   2174   },
   2175   { "iret", TILEPRO_OPC_IRET, 0x2, 0, TREG_ZERO, 1,
   2176     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   2177 #ifndef DISASM_ONLY
   2178     {
   2179       0ULL,
   2180       0xfbfff80000000000ULL,
   2181       0ULL,
   2182       0ULL,
   2183       0ULL
   2184     },
   2185     {
   2186       -1ULL,
   2187       0x400b480000000000ULL,
   2188       -1ULL,
   2189       -1ULL,
   2190       -1ULL
   2191     }
   2192 #endif
   2193   },
   2194   { "jalb", TILEPRO_OPC_JALB, 0x2, 1, TREG_LR, 1,
   2195     { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } },
   2196 #ifndef DISASM_ONLY
   2197     {
   2198       0ULL,
   2199       0xf800000000000000ULL,
   2200       0ULL,
   2201       0ULL,
   2202       0ULL
   2203     },
   2204     {
   2205       -1ULL,
   2206       0x6800000000000000ULL,
   2207       -1ULL,
   2208       -1ULL,
   2209       -1ULL
   2210     }
   2211 #endif
   2212   },
   2213   { "jalf", TILEPRO_OPC_JALF, 0x2, 1, TREG_LR, 1,
   2214     { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } },
   2215 #ifndef DISASM_ONLY
   2216     {
   2217       0ULL,
   2218       0xf800000000000000ULL,
   2219       0ULL,
   2220       0ULL,
   2221       0ULL
   2222     },
   2223     {
   2224       -1ULL,
   2225       0x6000000000000000ULL,
   2226       -1ULL,
   2227       -1ULL,
   2228       -1ULL
   2229     }
   2230 #endif
   2231   },
   2232   { "jalr", TILEPRO_OPC_JALR, 0x2, 1, TREG_LR, 1,
   2233     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   2234 #ifndef DISASM_ONLY
   2235     {
   2236       0ULL,
   2237       0xfbfe000000000000ULL,
   2238       0ULL,
   2239       0ULL,
   2240       0ULL
   2241     },
   2242     {
   2243       -1ULL,
   2244       0x0814000000000000ULL,
   2245       -1ULL,
   2246       -1ULL,
   2247       -1ULL
   2248     }
   2249 #endif
   2250   },
   2251   { "jalrp", TILEPRO_OPC_JALRP, 0x2, 1, TREG_LR, 1,
   2252     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   2253 #ifndef DISASM_ONLY
   2254     {
   2255       0ULL,
   2256       0xfbfe000000000000ULL,
   2257       0ULL,
   2258       0ULL,
   2259       0ULL
   2260     },
   2261     {
   2262       -1ULL,
   2263       0x0812000000000000ULL,
   2264       -1ULL,
   2265       -1ULL,
   2266       -1ULL
   2267     }
   2268 #endif
   2269   },
   2270   { "jb", TILEPRO_OPC_JB, 0x2, 1, TREG_ZERO, 1,
   2271     { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } },
   2272 #ifndef DISASM_ONLY
   2273     {
   2274       0ULL,
   2275       0xf800000000000000ULL,
   2276       0ULL,
   2277       0ULL,
   2278       0ULL
   2279     },
   2280     {
   2281       -1ULL,
   2282       0x5800000000000000ULL,
   2283       -1ULL,
   2284       -1ULL,
   2285       -1ULL
   2286     }
   2287 #endif
   2288   },
   2289   { "jf", TILEPRO_OPC_JF, 0x2, 1, TREG_ZERO, 1,
   2290     { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } },
   2291 #ifndef DISASM_ONLY
   2292     {
   2293       0ULL,
   2294       0xf800000000000000ULL,
   2295       0ULL,
   2296       0ULL,
   2297       0ULL
   2298     },
   2299     {
   2300       -1ULL,
   2301       0x5000000000000000ULL,
   2302       -1ULL,
   2303       -1ULL,
   2304       -1ULL
   2305     }
   2306 #endif
   2307   },
   2308   { "jr", TILEPRO_OPC_JR, 0x2, 1, TREG_ZERO, 1,
   2309     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   2310 #ifndef DISASM_ONLY
   2311     {
   2312       0ULL,
   2313       0xfbfe000000000000ULL,
   2314       0ULL,
   2315       0ULL,
   2316       0ULL
   2317     },
   2318     {
   2319       -1ULL,
   2320       0x0818000000000000ULL,
   2321       -1ULL,
   2322       -1ULL,
   2323       -1ULL
   2324     }
   2325 #endif
   2326   },
   2327   { "jrp", TILEPRO_OPC_JRP, 0x2, 1, TREG_ZERO, 1,
   2328     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   2329 #ifndef DISASM_ONLY
   2330     {
   2331       0ULL,
   2332       0xfbfe000000000000ULL,
   2333       0ULL,
   2334       0ULL,
   2335       0ULL
   2336     },
   2337     {
   2338       -1ULL,
   2339       0x0816000000000000ULL,
   2340       -1ULL,
   2341       -1ULL,
   2342       -1ULL
   2343     }
   2344 #endif
   2345   },
   2346   { "lb", TILEPRO_OPC_LB, 0x12, 2, TREG_ZERO, 1,
   2347     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 23, 15 } },
   2348 #ifndef DISASM_ONLY
   2349     {
   2350       0ULL,
   2351       0xfffff80000000000ULL,
   2352       0ULL,
   2353       0ULL,
   2354       0x8700000000000000ULL
   2355     },
   2356     {
   2357       -1ULL,
   2358       0x400b500000000000ULL,
   2359       -1ULL,
   2360       -1ULL,
   2361       0x8000000000000000ULL
   2362     }
   2363 #endif
   2364   },
   2365   { "lb.sn", TILEPRO_OPC_LB_SN, 0x2, 2, TREG_SN, 1,
   2366     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2367 #ifndef DISASM_ONLY
   2368     {
   2369       0ULL,
   2370       0xfffff80000000000ULL,
   2371       0ULL,
   2372       0ULL,
   2373       0ULL
   2374     },
   2375     {
   2376       -1ULL,
   2377       0x440b500000000000ULL,
   2378       -1ULL,
   2379       -1ULL,
   2380       -1ULL
   2381     }
   2382 #endif
   2383   },
   2384   { "lb_u", TILEPRO_OPC_LB_U, 0x12, 2, TREG_ZERO, 1,
   2385     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 23, 15 } },
   2386 #ifndef DISASM_ONLY
   2387     {
   2388       0ULL,
   2389       0xfffff80000000000ULL,
   2390       0ULL,
   2391       0ULL,
   2392       0x8700000000000000ULL
   2393     },
   2394     {
   2395       -1ULL,
   2396       0x400b580000000000ULL,
   2397       -1ULL,
   2398       -1ULL,
   2399       0x8100000000000000ULL
   2400     }
   2401 #endif
   2402   },
   2403   { "lb_u.sn", TILEPRO_OPC_LB_U_SN, 0x2, 2, TREG_SN, 1,
   2404     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2405 #ifndef DISASM_ONLY
   2406     {
   2407       0ULL,
   2408       0xfffff80000000000ULL,
   2409       0ULL,
   2410       0ULL,
   2411       0ULL
   2412     },
   2413     {
   2414       -1ULL,
   2415       0x440b580000000000ULL,
   2416       -1ULL,
   2417       -1ULL,
   2418       -1ULL
   2419     }
   2420 #endif
   2421   },
   2422   { "lbadd", TILEPRO_OPC_LBADD, 0x2, 3, TREG_ZERO, 1,
   2423     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2424 #ifndef DISASM_ONLY
   2425     {
   2426       0ULL,
   2427       0xfff8000000000000ULL,
   2428       0ULL,
   2429       0ULL,
   2430       0ULL
   2431     },
   2432     {
   2433       -1ULL,
   2434       0x30b0000000000000ULL,
   2435       -1ULL,
   2436       -1ULL,
   2437       -1ULL
   2438     }
   2439 #endif
   2440   },
   2441   { "lbadd.sn", TILEPRO_OPC_LBADD_SN, 0x2, 3, TREG_SN, 1,
   2442     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2443 #ifndef DISASM_ONLY
   2444     {
   2445       0ULL,
   2446       0xfff8000000000000ULL,
   2447       0ULL,
   2448       0ULL,
   2449       0ULL
   2450     },
   2451     {
   2452       -1ULL,
   2453       0x34b0000000000000ULL,
   2454       -1ULL,
   2455       -1ULL,
   2456       -1ULL
   2457     }
   2458 #endif
   2459   },
   2460   { "lbadd_u", TILEPRO_OPC_LBADD_U, 0x2, 3, TREG_ZERO, 1,
   2461     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2462 #ifndef DISASM_ONLY
   2463     {
   2464       0ULL,
   2465       0xfff8000000000000ULL,
   2466       0ULL,
   2467       0ULL,
   2468       0ULL
   2469     },
   2470     {
   2471       -1ULL,
   2472       0x30b8000000000000ULL,
   2473       -1ULL,
   2474       -1ULL,
   2475       -1ULL
   2476     }
   2477 #endif
   2478   },
   2479   { "lbadd_u.sn", TILEPRO_OPC_LBADD_U_SN, 0x2, 3, TREG_SN, 1,
   2480     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2481 #ifndef DISASM_ONLY
   2482     {
   2483       0ULL,
   2484       0xfff8000000000000ULL,
   2485       0ULL,
   2486       0ULL,
   2487       0ULL
   2488     },
   2489     {
   2490       -1ULL,
   2491       0x34b8000000000000ULL,
   2492       -1ULL,
   2493       -1ULL,
   2494       -1ULL
   2495     }
   2496 #endif
   2497   },
   2498   { "lh", TILEPRO_OPC_LH, 0x12, 2, TREG_ZERO, 1,
   2499     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 23, 15 } },
   2500 #ifndef DISASM_ONLY
   2501     {
   2502       0ULL,
   2503       0xfffff80000000000ULL,
   2504       0ULL,
   2505       0ULL,
   2506       0x8700000000000000ULL
   2507     },
   2508     {
   2509       -1ULL,
   2510       0x400b600000000000ULL,
   2511       -1ULL,
   2512       -1ULL,
   2513       0x8200000000000000ULL
   2514     }
   2515 #endif
   2516   },
   2517   { "lh.sn", TILEPRO_OPC_LH_SN, 0x2, 2, TREG_SN, 1,
   2518     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2519 #ifndef DISASM_ONLY
   2520     {
   2521       0ULL,
   2522       0xfffff80000000000ULL,
   2523       0ULL,
   2524       0ULL,
   2525       0ULL
   2526     },
   2527     {
   2528       -1ULL,
   2529       0x440b600000000000ULL,
   2530       -1ULL,
   2531       -1ULL,
   2532       -1ULL
   2533     }
   2534 #endif
   2535   },
   2536   { "lh_u", TILEPRO_OPC_LH_U, 0x12, 2, TREG_ZERO, 1,
   2537     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 23, 15 } },
   2538 #ifndef DISASM_ONLY
   2539     {
   2540       0ULL,
   2541       0xfffff80000000000ULL,
   2542       0ULL,
   2543       0ULL,
   2544       0x8700000000000000ULL
   2545     },
   2546     {
   2547       -1ULL,
   2548       0x400b680000000000ULL,
   2549       -1ULL,
   2550       -1ULL,
   2551       0x8300000000000000ULL
   2552     }
   2553 #endif
   2554   },
   2555   { "lh_u.sn", TILEPRO_OPC_LH_U_SN, 0x2, 2, TREG_SN, 1,
   2556     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2557 #ifndef DISASM_ONLY
   2558     {
   2559       0ULL,
   2560       0xfffff80000000000ULL,
   2561       0ULL,
   2562       0ULL,
   2563       0ULL
   2564     },
   2565     {
   2566       -1ULL,
   2567       0x440b680000000000ULL,
   2568       -1ULL,
   2569       -1ULL,
   2570       -1ULL
   2571     }
   2572 #endif
   2573   },
   2574   { "lhadd", TILEPRO_OPC_LHADD, 0x2, 3, TREG_ZERO, 1,
   2575     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2576 #ifndef DISASM_ONLY
   2577     {
   2578       0ULL,
   2579       0xfff8000000000000ULL,
   2580       0ULL,
   2581       0ULL,
   2582       0ULL
   2583     },
   2584     {
   2585       -1ULL,
   2586       0x30c0000000000000ULL,
   2587       -1ULL,
   2588       -1ULL,
   2589       -1ULL
   2590     }
   2591 #endif
   2592   },
   2593   { "lhadd.sn", TILEPRO_OPC_LHADD_SN, 0x2, 3, TREG_SN, 1,
   2594     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2595 #ifndef DISASM_ONLY
   2596     {
   2597       0ULL,
   2598       0xfff8000000000000ULL,
   2599       0ULL,
   2600       0ULL,
   2601       0ULL
   2602     },
   2603     {
   2604       -1ULL,
   2605       0x34c0000000000000ULL,
   2606       -1ULL,
   2607       -1ULL,
   2608       -1ULL
   2609     }
   2610 #endif
   2611   },
   2612   { "lhadd_u", TILEPRO_OPC_LHADD_U, 0x2, 3, TREG_ZERO, 1,
   2613     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2614 #ifndef DISASM_ONLY
   2615     {
   2616       0ULL,
   2617       0xfff8000000000000ULL,
   2618       0ULL,
   2619       0ULL,
   2620       0ULL
   2621     },
   2622     {
   2623       -1ULL,
   2624       0x30c8000000000000ULL,
   2625       -1ULL,
   2626       -1ULL,
   2627       -1ULL
   2628     }
   2629 #endif
   2630   },
   2631   { "lhadd_u.sn", TILEPRO_OPC_LHADD_U_SN, 0x2, 3, TREG_SN, 1,
   2632     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2633 #ifndef DISASM_ONLY
   2634     {
   2635       0ULL,
   2636       0xfff8000000000000ULL,
   2637       0ULL,
   2638       0ULL,
   2639       0ULL
   2640     },
   2641     {
   2642       -1ULL,
   2643       0x34c8000000000000ULL,
   2644       -1ULL,
   2645       -1ULL,
   2646       -1ULL
   2647     }
   2648 #endif
   2649   },
   2650   { "lnk", TILEPRO_OPC_LNK, 0x2, 1, TREG_ZERO, 1,
   2651     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   2652 #ifndef DISASM_ONLY
   2653     {
   2654       0ULL,
   2655       0xfffe000000000000ULL,
   2656       0ULL,
   2657       0ULL,
   2658       0ULL
   2659     },
   2660     {
   2661       -1ULL,
   2662       0x081a000000000000ULL,
   2663       -1ULL,
   2664       -1ULL,
   2665       -1ULL
   2666     }
   2667 #endif
   2668   },
   2669   { "lnk.sn", TILEPRO_OPC_LNK_SN, 0x2, 1, TREG_SN, 1,
   2670     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   2671 #ifndef DISASM_ONLY
   2672     {
   2673       0ULL,
   2674       0xfffe000000000000ULL,
   2675       0ULL,
   2676       0ULL,
   2677       0ULL
   2678     },
   2679     {
   2680       -1ULL,
   2681       0x0c1a000000000000ULL,
   2682       -1ULL,
   2683       -1ULL,
   2684       -1ULL
   2685     }
   2686 #endif
   2687   },
   2688   { "lw", TILEPRO_OPC_LW, 0x12, 2, TREG_ZERO, 1,
   2689     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 23, 15 } },
   2690 #ifndef DISASM_ONLY
   2691     {
   2692       0ULL,
   2693       0xfffff80000000000ULL,
   2694       0ULL,
   2695       0ULL,
   2696       0x8700000000000000ULL
   2697     },
   2698     {
   2699       -1ULL,
   2700       0x400b700000000000ULL,
   2701       -1ULL,
   2702       -1ULL,
   2703       0x8400000000000000ULL
   2704     }
   2705 #endif
   2706   },
   2707   { "lw.sn", TILEPRO_OPC_LW_SN, 0x2, 2, TREG_SN, 1,
   2708     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2709 #ifndef DISASM_ONLY
   2710     {
   2711       0ULL,
   2712       0xfffff80000000000ULL,
   2713       0ULL,
   2714       0ULL,
   2715       0ULL
   2716     },
   2717     {
   2718       -1ULL,
   2719       0x440b700000000000ULL,
   2720       -1ULL,
   2721       -1ULL,
   2722       -1ULL
   2723     }
   2724 #endif
   2725   },
   2726   { "lw_na", TILEPRO_OPC_LW_NA, 0x2, 2, TREG_ZERO, 1,
   2727     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2728 #ifndef DISASM_ONLY
   2729     {
   2730       0ULL,
   2731       0xfffff80000000000ULL,
   2732       0ULL,
   2733       0ULL,
   2734       0ULL
   2735     },
   2736     {
   2737       -1ULL,
   2738       0x400bc00000000000ULL,
   2739       -1ULL,
   2740       -1ULL,
   2741       -1ULL
   2742     }
   2743 #endif
   2744   },
   2745   { "lw_na.sn", TILEPRO_OPC_LW_NA_SN, 0x2, 2, TREG_SN, 1,
   2746     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   2747 #ifndef DISASM_ONLY
   2748     {
   2749       0ULL,
   2750       0xfffff80000000000ULL,
   2751       0ULL,
   2752       0ULL,
   2753       0ULL
   2754     },
   2755     {
   2756       -1ULL,
   2757       0x440bc00000000000ULL,
   2758       -1ULL,
   2759       -1ULL,
   2760       -1ULL
   2761     }
   2762 #endif
   2763   },
   2764   { "lwadd", TILEPRO_OPC_LWADD, 0x2, 3, TREG_ZERO, 1,
   2765     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2766 #ifndef DISASM_ONLY
   2767     {
   2768       0ULL,
   2769       0xfff8000000000000ULL,
   2770       0ULL,
   2771       0ULL,
   2772       0ULL
   2773     },
   2774     {
   2775       -1ULL,
   2776       0x30d0000000000000ULL,
   2777       -1ULL,
   2778       -1ULL,
   2779       -1ULL
   2780     }
   2781 #endif
   2782   },
   2783   { "lwadd.sn", TILEPRO_OPC_LWADD_SN, 0x2, 3, TREG_SN, 1,
   2784     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2785 #ifndef DISASM_ONLY
   2786     {
   2787       0ULL,
   2788       0xfff8000000000000ULL,
   2789       0ULL,
   2790       0ULL,
   2791       0ULL
   2792     },
   2793     {
   2794       -1ULL,
   2795       0x34d0000000000000ULL,
   2796       -1ULL,
   2797       -1ULL,
   2798       -1ULL
   2799     }
   2800 #endif
   2801   },
   2802   { "lwadd_na", TILEPRO_OPC_LWADD_NA, 0x2, 3, TREG_ZERO, 1,
   2803     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2804 #ifndef DISASM_ONLY
   2805     {
   2806       0ULL,
   2807       0xfff8000000000000ULL,
   2808       0ULL,
   2809       0ULL,
   2810       0ULL
   2811     },
   2812     {
   2813       -1ULL,
   2814       0x30d8000000000000ULL,
   2815       -1ULL,
   2816       -1ULL,
   2817       -1ULL
   2818     }
   2819 #endif
   2820   },
   2821   { "lwadd_na.sn", TILEPRO_OPC_LWADD_NA_SN, 0x2, 3, TREG_SN, 1,
   2822     { { 0, }, { 7, 24, 1 }, { 0, }, { 0, }, { 0, } },
   2823 #ifndef DISASM_ONLY
   2824     {
   2825       0ULL,
   2826       0xfff8000000000000ULL,
   2827       0ULL,
   2828       0ULL,
   2829       0ULL
   2830     },
   2831     {
   2832       -1ULL,
   2833       0x34d8000000000000ULL,
   2834       -1ULL,
   2835       -1ULL,
   2836       -1ULL
   2837     }
   2838 #endif
   2839   },
   2840   { "maxb_u", TILEPRO_OPC_MAXB_U, 0x3, 3, TREG_ZERO, 1,
   2841     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2842 #ifndef DISASM_ONLY
   2843     {
   2844       0x800000007ffc0000ULL,
   2845       0xfffe000000000000ULL,
   2846       0ULL,
   2847       0ULL,
   2848       0ULL
   2849     },
   2850     {
   2851       0x00000000003c0000ULL,
   2852       0x081c000000000000ULL,
   2853       -1ULL,
   2854       -1ULL,
   2855       -1ULL
   2856     }
   2857 #endif
   2858   },
   2859   { "maxb_u.sn", TILEPRO_OPC_MAXB_U_SN, 0x3, 3, TREG_SN, 1,
   2860     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2861 #ifndef DISASM_ONLY
   2862     {
   2863       0x800000007ffc0000ULL,
   2864       0xfffe000000000000ULL,
   2865       0ULL,
   2866       0ULL,
   2867       0ULL
   2868     },
   2869     {
   2870       0x00000000083c0000ULL,
   2871       0x0c1c000000000000ULL,
   2872       -1ULL,
   2873       -1ULL,
   2874       -1ULL
   2875     }
   2876 #endif
   2877   },
   2878   { "maxh", TILEPRO_OPC_MAXH, 0x3, 3, TREG_ZERO, 1,
   2879     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2880 #ifndef DISASM_ONLY
   2881     {
   2882       0x800000007ffc0000ULL,
   2883       0xfffe000000000000ULL,
   2884       0ULL,
   2885       0ULL,
   2886       0ULL
   2887     },
   2888     {
   2889       0x0000000000400000ULL,
   2890       0x081e000000000000ULL,
   2891       -1ULL,
   2892       -1ULL,
   2893       -1ULL
   2894     }
   2895 #endif
   2896   },
   2897   { "maxh.sn", TILEPRO_OPC_MAXH_SN, 0x3, 3, TREG_SN, 1,
   2898     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   2899 #ifndef DISASM_ONLY
   2900     {
   2901       0x800000007ffc0000ULL,
   2902       0xfffe000000000000ULL,
   2903       0ULL,
   2904       0ULL,
   2905       0ULL
   2906     },
   2907     {
   2908       0x0000000008400000ULL,
   2909       0x0c1e000000000000ULL,
   2910       -1ULL,
   2911       -1ULL,
   2912       -1ULL
   2913     }
   2914 #endif
   2915   },
   2916   { "maxib_u", TILEPRO_OPC_MAXIB_U, 0x3, 3, TREG_ZERO, 1,
   2917     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   2918 #ifndef DISASM_ONLY
   2919     {
   2920       0x800000007ff00000ULL,
   2921       0xfff8000000000000ULL,
   2922       0ULL,
   2923       0ULL,
   2924       0ULL
   2925     },
   2926     {
   2927       0x0000000040400000ULL,
   2928       0x3028000000000000ULL,
   2929       -1ULL,
   2930       -1ULL,
   2931       -1ULL
   2932     }
   2933 #endif
   2934   },
   2935   { "maxib_u.sn", TILEPRO_OPC_MAXIB_U_SN, 0x3, 3, TREG_SN, 1,
   2936     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   2937 #ifndef DISASM_ONLY
   2938     {
   2939       0x800000007ff00000ULL,
   2940       0xfff8000000000000ULL,
   2941       0ULL,
   2942       0ULL,
   2943       0ULL
   2944     },
   2945     {
   2946       0x0000000048400000ULL,
   2947       0x3428000000000000ULL,
   2948       -1ULL,
   2949       -1ULL,
   2950       -1ULL
   2951     }
   2952 #endif
   2953   },
   2954   { "maxih", TILEPRO_OPC_MAXIH, 0x3, 3, TREG_ZERO, 1,
   2955     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   2956 #ifndef DISASM_ONLY
   2957     {
   2958       0x800000007ff00000ULL,
   2959       0xfff8000000000000ULL,
   2960       0ULL,
   2961       0ULL,
   2962       0ULL
   2963     },
   2964     {
   2965       0x0000000040500000ULL,
   2966       0x3030000000000000ULL,
   2967       -1ULL,
   2968       -1ULL,
   2969       -1ULL
   2970     }
   2971 #endif
   2972   },
   2973   { "maxih.sn", TILEPRO_OPC_MAXIH_SN, 0x3, 3, TREG_SN, 1,
   2974     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   2975 #ifndef DISASM_ONLY
   2976     {
   2977       0x800000007ff00000ULL,
   2978       0xfff8000000000000ULL,
   2979       0ULL,
   2980       0ULL,
   2981       0ULL
   2982     },
   2983     {
   2984       0x0000000048500000ULL,
   2985       0x3430000000000000ULL,
   2986       -1ULL,
   2987       -1ULL,
   2988       -1ULL
   2989     }
   2990 #endif
   2991   },
   2992   { "mf", TILEPRO_OPC_MF, 0x2, 0, TREG_ZERO, 1,
   2993     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   2994 #ifndef DISASM_ONLY
   2995     {
   2996       0ULL,
   2997       0xfbfff80000000000ULL,
   2998       0ULL,
   2999       0ULL,
   3000       0ULL
   3001     },
   3002     {
   3003       -1ULL,
   3004       0x400b780000000000ULL,
   3005       -1ULL,
   3006       -1ULL,
   3007       -1ULL
   3008     }
   3009 #endif
   3010   },
   3011   { "mfspr", TILEPRO_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1,
   3012     { { 0, }, { 7, 25 }, { 0, }, { 0, }, { 0, } },
   3013 #ifndef DISASM_ONLY
   3014     {
   3015       0ULL,
   3016       0xfbf8000000000000ULL,
   3017       0ULL,
   3018       0ULL,
   3019       0ULL
   3020     },
   3021     {
   3022       -1ULL,
   3023       0x3038000000000000ULL,
   3024       -1ULL,
   3025       -1ULL,
   3026       -1ULL
   3027     }
   3028 #endif
   3029   },
   3030   { "minb_u", TILEPRO_OPC_MINB_U, 0x3, 3, TREG_ZERO, 1,
   3031     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3032 #ifndef DISASM_ONLY
   3033     {
   3034       0x800000007ffc0000ULL,
   3035       0xfffe000000000000ULL,
   3036       0ULL,
   3037       0ULL,
   3038       0ULL
   3039     },
   3040     {
   3041       0x0000000000440000ULL,
   3042       0x0820000000000000ULL,
   3043       -1ULL,
   3044       -1ULL,
   3045       -1ULL
   3046     }
   3047 #endif
   3048   },
   3049   { "minb_u.sn", TILEPRO_OPC_MINB_U_SN, 0x3, 3, TREG_SN, 1,
   3050     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3051 #ifndef DISASM_ONLY
   3052     {
   3053       0x800000007ffc0000ULL,
   3054       0xfffe000000000000ULL,
   3055       0ULL,
   3056       0ULL,
   3057       0ULL
   3058     },
   3059     {
   3060       0x0000000008440000ULL,
   3061       0x0c20000000000000ULL,
   3062       -1ULL,
   3063       -1ULL,
   3064       -1ULL
   3065     }
   3066 #endif
   3067   },
   3068   { "minh", TILEPRO_OPC_MINH, 0x3, 3, TREG_ZERO, 1,
   3069     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3070 #ifndef DISASM_ONLY
   3071     {
   3072       0x800000007ffc0000ULL,
   3073       0xfffe000000000000ULL,
   3074       0ULL,
   3075       0ULL,
   3076       0ULL
   3077     },
   3078     {
   3079       0x0000000000480000ULL,
   3080       0x0822000000000000ULL,
   3081       -1ULL,
   3082       -1ULL,
   3083       -1ULL
   3084     }
   3085 #endif
   3086   },
   3087   { "minh.sn", TILEPRO_OPC_MINH_SN, 0x3, 3, TREG_SN, 1,
   3088     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3089 #ifndef DISASM_ONLY
   3090     {
   3091       0x800000007ffc0000ULL,
   3092       0xfffe000000000000ULL,
   3093       0ULL,
   3094       0ULL,
   3095       0ULL
   3096     },
   3097     {
   3098       0x0000000008480000ULL,
   3099       0x0c22000000000000ULL,
   3100       -1ULL,
   3101       -1ULL,
   3102       -1ULL
   3103     }
   3104 #endif
   3105   },
   3106   { "minib_u", TILEPRO_OPC_MINIB_U, 0x3, 3, TREG_ZERO, 1,
   3107     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   3108 #ifndef DISASM_ONLY
   3109     {
   3110       0x800000007ff00000ULL,
   3111       0xfff8000000000000ULL,
   3112       0ULL,
   3113       0ULL,
   3114       0ULL
   3115     },
   3116     {
   3117       0x0000000040600000ULL,
   3118       0x3040000000000000ULL,
   3119       -1ULL,
   3120       -1ULL,
   3121       -1ULL
   3122     }
   3123 #endif
   3124   },
   3125   { "minib_u.sn", TILEPRO_OPC_MINIB_U_SN, 0x3, 3, TREG_SN, 1,
   3126     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   3127 #ifndef DISASM_ONLY
   3128     {
   3129       0x800000007ff00000ULL,
   3130       0xfff8000000000000ULL,
   3131       0ULL,
   3132       0ULL,
   3133       0ULL
   3134     },
   3135     {
   3136       0x0000000048600000ULL,
   3137       0x3440000000000000ULL,
   3138       -1ULL,
   3139       -1ULL,
   3140       -1ULL
   3141     }
   3142 #endif
   3143   },
   3144   { "minih", TILEPRO_OPC_MINIH, 0x3, 3, TREG_ZERO, 1,
   3145     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   3146 #ifndef DISASM_ONLY
   3147     {
   3148       0x800000007ff00000ULL,
   3149       0xfff8000000000000ULL,
   3150       0ULL,
   3151       0ULL,
   3152       0ULL
   3153     },
   3154     {
   3155       0x0000000040700000ULL,
   3156       0x3048000000000000ULL,
   3157       -1ULL,
   3158       -1ULL,
   3159       -1ULL
   3160     }
   3161 #endif
   3162   },
   3163   { "minih.sn", TILEPRO_OPC_MINIH_SN, 0x3, 3, TREG_SN, 1,
   3164     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   3165 #ifndef DISASM_ONLY
   3166     {
   3167       0x800000007ff00000ULL,
   3168       0xfff8000000000000ULL,
   3169       0ULL,
   3170       0ULL,
   3171       0ULL
   3172     },
   3173     {
   3174       0x0000000048700000ULL,
   3175       0x3448000000000000ULL,
   3176       -1ULL,
   3177       -1ULL,
   3178       -1ULL
   3179     }
   3180 #endif
   3181   },
   3182   { "mm", TILEPRO_OPC_MM, 0x3, 5, TREG_ZERO, 1,
   3183     { { 9, 10, 16, 26, 27 }, { 7, 8, 17, 28, 29 }, { 0, }, { 0, }, { 0, } },
   3184 #ifndef DISASM_ONLY
   3185     {
   3186       0x8000000070000000ULL,
   3187       0xf800000000000000ULL,
   3188       0ULL,
   3189       0ULL,
   3190       0ULL
   3191     },
   3192     {
   3193       0x0000000060000000ULL,
   3194       0x3800000000000000ULL,
   3195       -1ULL,
   3196       -1ULL,
   3197       -1ULL
   3198     }
   3199 #endif
   3200   },
   3201   { "mnz", TILEPRO_OPC_MNZ, 0xf, 3, TREG_ZERO, 1,
   3202     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   3203 #ifndef DISASM_ONLY
   3204     {
   3205       0x800000007ffc0000ULL,
   3206       0xfffe000000000000ULL,
   3207       0x80000000780c0000ULL,
   3208       0xf806000000000000ULL,
   3209       0ULL
   3210     },
   3211     {
   3212       0x0000000000540000ULL,
   3213       0x0828000000000000ULL,
   3214       0x8000000010000000ULL,
   3215       0x9002000000000000ULL,
   3216       -1ULL
   3217     }
   3218 #endif
   3219   },
   3220   { "mnz.sn", TILEPRO_OPC_MNZ_SN, 0x3, 3, TREG_SN, 1,
   3221     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3222 #ifndef DISASM_ONLY
   3223     {
   3224       0x800000007ffc0000ULL,
   3225       0xfffe000000000000ULL,
   3226       0ULL,
   3227       0ULL,
   3228       0ULL
   3229     },
   3230     {
   3231       0x0000000008540000ULL,
   3232       0x0c28000000000000ULL,
   3233       -1ULL,
   3234       -1ULL,
   3235       -1ULL
   3236     }
   3237 #endif
   3238   },
   3239   { "mnzb", TILEPRO_OPC_MNZB, 0x3, 3, TREG_ZERO, 1,
   3240     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3241 #ifndef DISASM_ONLY
   3242     {
   3243       0x800000007ffc0000ULL,
   3244       0xfffe000000000000ULL,
   3245       0ULL,
   3246       0ULL,
   3247       0ULL
   3248     },
   3249     {
   3250       0x00000000004c0000ULL,
   3251       0x0824000000000000ULL,
   3252       -1ULL,
   3253       -1ULL,
   3254       -1ULL
   3255     }
   3256 #endif
   3257   },
   3258   { "mnzb.sn", TILEPRO_OPC_MNZB_SN, 0x3, 3, TREG_SN, 1,
   3259     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3260 #ifndef DISASM_ONLY
   3261     {
   3262       0x800000007ffc0000ULL,
   3263       0xfffe000000000000ULL,
   3264       0ULL,
   3265       0ULL,
   3266       0ULL
   3267     },
   3268     {
   3269       0x00000000084c0000ULL,
   3270       0x0c24000000000000ULL,
   3271       -1ULL,
   3272       -1ULL,
   3273       -1ULL
   3274     }
   3275 #endif
   3276   },
   3277   { "mnzh", TILEPRO_OPC_MNZH, 0x3, 3, TREG_ZERO, 1,
   3278     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3279 #ifndef DISASM_ONLY
   3280     {
   3281       0x800000007ffc0000ULL,
   3282       0xfffe000000000000ULL,
   3283       0ULL,
   3284       0ULL,
   3285       0ULL
   3286     },
   3287     {
   3288       0x0000000000500000ULL,
   3289       0x0826000000000000ULL,
   3290       -1ULL,
   3291       -1ULL,
   3292       -1ULL
   3293     }
   3294 #endif
   3295   },
   3296   { "mnzh.sn", TILEPRO_OPC_MNZH_SN, 0x3, 3, TREG_SN, 1,
   3297     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   3298 #ifndef DISASM_ONLY
   3299     {
   3300       0x800000007ffc0000ULL,
   3301       0xfffe000000000000ULL,
   3302       0ULL,
   3303       0ULL,
   3304       0ULL
   3305     },
   3306     {
   3307       0x0000000008500000ULL,
   3308       0x0c26000000000000ULL,
   3309       -1ULL,
   3310       -1ULL,
   3311       -1ULL
   3312     }
   3313 #endif
   3314   },
   3315   { "mtspr", TILEPRO_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1,
   3316     { { 0, }, { 30, 8 }, { 0, }, { 0, }, { 0, } },
   3317 #ifndef DISASM_ONLY
   3318     {
   3319       0ULL,
   3320       0xfbf8000000000000ULL,
   3321       0ULL,
   3322       0ULL,
   3323       0ULL
   3324     },
   3325     {
   3326       -1ULL,
   3327       0x3050000000000000ULL,
   3328       -1ULL,
   3329       -1ULL,
   3330       -1ULL
   3331     }
   3332 #endif
   3333   },
   3334   { "mulhh_ss", TILEPRO_OPC_MULHH_SS, 0x5, 3, TREG_ZERO, 1,
   3335     { { 9, 10, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } },
   3336 #ifndef DISASM_ONLY
   3337     {
   3338       0x800000007ffc0000ULL,
   3339       0ULL,
   3340       0x80000000780c0000ULL,
   3341       0ULL,
   3342       0ULL
   3343     },
   3344     {
   3345       0x0000000000680000ULL,
   3346       -1ULL,
   3347       0x8000000038000000ULL,
   3348       -1ULL,
   3349       -1ULL
   3350     }
   3351 #endif
   3352   },
   3353   { "mulhh_ss.sn", TILEPRO_OPC_MULHH_SS_SN, 0x1, 3, TREG_SN, 1,
   3354     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3355 #ifndef DISASM_ONLY
   3356     {
   3357       0x800000007ffc0000ULL,
   3358       0ULL,
   3359       0ULL,
   3360       0ULL,
   3361       0ULL
   3362     },
   3363     {
   3364       0x0000000008680000ULL,
   3365       -1ULL,
   3366       -1ULL,
   3367       -1ULL,
   3368       -1ULL
   3369     }
   3370 #endif
   3371   },
   3372   { "mulhh_su", TILEPRO_OPC_MULHH_SU, 0x1, 3, TREG_ZERO, 1,
   3373     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3374 #ifndef DISASM_ONLY
   3375     {
   3376       0x800000007ffc0000ULL,
   3377       0ULL,
   3378       0ULL,
   3379       0ULL,
   3380       0ULL
   3381     },
   3382     {
   3383       0x00000000006c0000ULL,
   3384       -1ULL,
   3385       -1ULL,
   3386       -1ULL,
   3387       -1ULL
   3388     }
   3389 #endif
   3390   },
   3391   { "mulhh_su.sn", TILEPRO_OPC_MULHH_SU_SN, 0x1, 3, TREG_SN, 1,
   3392     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3393 #ifndef DISASM_ONLY
   3394     {
   3395       0x800000007ffc0000ULL,
   3396       0ULL,
   3397       0ULL,
   3398       0ULL,
   3399       0ULL
   3400     },
   3401     {
   3402       0x00000000086c0000ULL,
   3403       -1ULL,
   3404       -1ULL,
   3405       -1ULL,
   3406       -1ULL
   3407     }
   3408 #endif
   3409   },
   3410   { "mulhh_uu", TILEPRO_OPC_MULHH_UU, 0x5, 3, TREG_ZERO, 1,
   3411     { { 9, 10, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } },
   3412 #ifndef DISASM_ONLY
   3413     {
   3414       0x800000007ffc0000ULL,
   3415       0ULL,
   3416       0x80000000780c0000ULL,
   3417       0ULL,
   3418       0ULL
   3419     },
   3420     {
   3421       0x0000000000700000ULL,
   3422       -1ULL,
   3423       0x8000000038040000ULL,
   3424       -1ULL,
   3425       -1ULL
   3426     }
   3427 #endif
   3428   },
   3429   { "mulhh_uu.sn", TILEPRO_OPC_MULHH_UU_SN, 0x1, 3, TREG_SN, 1,
   3430     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3431 #ifndef DISASM_ONLY
   3432     {
   3433       0x800000007ffc0000ULL,
   3434       0ULL,
   3435       0ULL,
   3436       0ULL,
   3437       0ULL
   3438     },
   3439     {
   3440       0x0000000008700000ULL,
   3441       -1ULL,
   3442       -1ULL,
   3443       -1ULL,
   3444       -1ULL
   3445     }
   3446 #endif
   3447   },
   3448   { "mulhha_ss", TILEPRO_OPC_MULHHA_SS, 0x5, 3, TREG_ZERO, 1,
   3449     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   3450 #ifndef DISASM_ONLY
   3451     {
   3452       0x800000007ffc0000ULL,
   3453       0ULL,
   3454       0x80000000780c0000ULL,
   3455       0ULL,
   3456       0ULL
   3457     },
   3458     {
   3459       0x0000000000580000ULL,
   3460       -1ULL,
   3461       0x8000000040000000ULL,
   3462       -1ULL,
   3463       -1ULL
   3464     }
   3465 #endif
   3466   },
   3467   { "mulhha_ss.sn", TILEPRO_OPC_MULHHA_SS_SN, 0x1, 3, TREG_SN, 1,
   3468     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3469 #ifndef DISASM_ONLY
   3470     {
   3471       0x800000007ffc0000ULL,
   3472       0ULL,
   3473       0ULL,
   3474       0ULL,
   3475       0ULL
   3476     },
   3477     {
   3478       0x0000000008580000ULL,
   3479       -1ULL,
   3480       -1ULL,
   3481       -1ULL,
   3482       -1ULL
   3483     }
   3484 #endif
   3485   },
   3486   { "mulhha_su", TILEPRO_OPC_MULHHA_SU, 0x1, 3, TREG_ZERO, 1,
   3487     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3488 #ifndef DISASM_ONLY
   3489     {
   3490       0x800000007ffc0000ULL,
   3491       0ULL,
   3492       0ULL,
   3493       0ULL,
   3494       0ULL
   3495     },
   3496     {
   3497       0x00000000005c0000ULL,
   3498       -1ULL,
   3499       -1ULL,
   3500       -1ULL,
   3501       -1ULL
   3502     }
   3503 #endif
   3504   },
   3505   { "mulhha_su.sn", TILEPRO_OPC_MULHHA_SU_SN, 0x1, 3, TREG_SN, 1,
   3506     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3507 #ifndef DISASM_ONLY
   3508     {
   3509       0x800000007ffc0000ULL,
   3510       0ULL,
   3511       0ULL,
   3512       0ULL,
   3513       0ULL
   3514     },
   3515     {
   3516       0x00000000085c0000ULL,
   3517       -1ULL,
   3518       -1ULL,
   3519       -1ULL,
   3520       -1ULL
   3521     }
   3522 #endif
   3523   },
   3524   { "mulhha_uu", TILEPRO_OPC_MULHHA_UU, 0x5, 3, TREG_ZERO, 1,
   3525     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   3526 #ifndef DISASM_ONLY
   3527     {
   3528       0x800000007ffc0000ULL,
   3529       0ULL,
   3530       0x80000000780c0000ULL,
   3531       0ULL,
   3532       0ULL
   3533     },
   3534     {
   3535       0x0000000000600000ULL,
   3536       -1ULL,
   3537       0x8000000040040000ULL,
   3538       -1ULL,
   3539       -1ULL
   3540     }
   3541 #endif
   3542   },
   3543   { "mulhha_uu.sn", TILEPRO_OPC_MULHHA_UU_SN, 0x1, 3, TREG_SN, 1,
   3544     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3545 #ifndef DISASM_ONLY
   3546     {
   3547       0x800000007ffc0000ULL,
   3548       0ULL,
   3549       0ULL,
   3550       0ULL,
   3551       0ULL
   3552     },
   3553     {
   3554       0x0000000008600000ULL,
   3555       -1ULL,
   3556       -1ULL,
   3557       -1ULL,
   3558       -1ULL
   3559     }
   3560 #endif
   3561   },
   3562   { "mulhhsa_uu", TILEPRO_OPC_MULHHSA_UU, 0x1, 3, TREG_ZERO, 1,
   3563     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3564 #ifndef DISASM_ONLY
   3565     {
   3566       0x800000007ffc0000ULL,
   3567       0ULL,
   3568       0ULL,
   3569       0ULL,
   3570       0ULL
   3571     },
   3572     {
   3573       0x0000000000640000ULL,
   3574       -1ULL,
   3575       -1ULL,
   3576       -1ULL,
   3577       -1ULL
   3578     }
   3579 #endif
   3580   },
   3581   { "mulhhsa_uu.sn", TILEPRO_OPC_MULHHSA_UU_SN, 0x1, 3, TREG_SN, 1,
   3582     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3583 #ifndef DISASM_ONLY
   3584     {
   3585       0x800000007ffc0000ULL,
   3586       0ULL,
   3587       0ULL,
   3588       0ULL,
   3589       0ULL
   3590     },
   3591     {
   3592       0x0000000008640000ULL,
   3593       -1ULL,
   3594       -1ULL,
   3595       -1ULL,
   3596       -1ULL
   3597     }
   3598 #endif
   3599   },
   3600   { "mulhl_ss", TILEPRO_OPC_MULHL_SS, 0x1, 3, TREG_ZERO, 1,
   3601     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3602 #ifndef DISASM_ONLY
   3603     {
   3604       0x800000007ffc0000ULL,
   3605       0ULL,
   3606       0ULL,
   3607       0ULL,
   3608       0ULL
   3609     },
   3610     {
   3611       0x0000000000880000ULL,
   3612       -1ULL,
   3613       -1ULL,
   3614       -1ULL,
   3615       -1ULL
   3616     }
   3617 #endif
   3618   },
   3619   { "mulhl_ss.sn", TILEPRO_OPC_MULHL_SS_SN, 0x1, 3, TREG_SN, 1,
   3620     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3621 #ifndef DISASM_ONLY
   3622     {
   3623       0x800000007ffc0000ULL,
   3624       0ULL,
   3625       0ULL,
   3626       0ULL,
   3627       0ULL
   3628     },
   3629     {
   3630       0x0000000008880000ULL,
   3631       -1ULL,
   3632       -1ULL,
   3633       -1ULL,
   3634       -1ULL
   3635     }
   3636 #endif
   3637   },
   3638   { "mulhl_su", TILEPRO_OPC_MULHL_SU, 0x1, 3, TREG_ZERO, 1,
   3639     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3640 #ifndef DISASM_ONLY
   3641     {
   3642       0x800000007ffc0000ULL,
   3643       0ULL,
   3644       0ULL,
   3645       0ULL,
   3646       0ULL
   3647     },
   3648     {
   3649       0x00000000008c0000ULL,
   3650       -1ULL,
   3651       -1ULL,
   3652       -1ULL,
   3653       -1ULL
   3654     }
   3655 #endif
   3656   },
   3657   { "mulhl_su.sn", TILEPRO_OPC_MULHL_SU_SN, 0x1, 3, TREG_SN, 1,
   3658     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3659 #ifndef DISASM_ONLY
   3660     {
   3661       0x800000007ffc0000ULL,
   3662       0ULL,
   3663       0ULL,
   3664       0ULL,
   3665       0ULL
   3666     },
   3667     {
   3668       0x00000000088c0000ULL,
   3669       -1ULL,
   3670       -1ULL,
   3671       -1ULL,
   3672       -1ULL
   3673     }
   3674 #endif
   3675   },
   3676   { "mulhl_us", TILEPRO_OPC_MULHL_US, 0x1, 3, TREG_ZERO, 1,
   3677     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3678 #ifndef DISASM_ONLY
   3679     {
   3680       0x800000007ffc0000ULL,
   3681       0ULL,
   3682       0ULL,
   3683       0ULL,
   3684       0ULL
   3685     },
   3686     {
   3687       0x0000000000900000ULL,
   3688       -1ULL,
   3689       -1ULL,
   3690       -1ULL,
   3691       -1ULL
   3692     }
   3693 #endif
   3694   },
   3695   { "mulhl_us.sn", TILEPRO_OPC_MULHL_US_SN, 0x1, 3, TREG_SN, 1,
   3696     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3697 #ifndef DISASM_ONLY
   3698     {
   3699       0x800000007ffc0000ULL,
   3700       0ULL,
   3701       0ULL,
   3702       0ULL,
   3703       0ULL
   3704     },
   3705     {
   3706       0x0000000008900000ULL,
   3707       -1ULL,
   3708       -1ULL,
   3709       -1ULL,
   3710       -1ULL
   3711     }
   3712 #endif
   3713   },
   3714   { "mulhl_uu", TILEPRO_OPC_MULHL_UU, 0x1, 3, TREG_ZERO, 1,
   3715     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3716 #ifndef DISASM_ONLY
   3717     {
   3718       0x800000007ffc0000ULL,
   3719       0ULL,
   3720       0ULL,
   3721       0ULL,
   3722       0ULL
   3723     },
   3724     {
   3725       0x0000000000940000ULL,
   3726       -1ULL,
   3727       -1ULL,
   3728       -1ULL,
   3729       -1ULL
   3730     }
   3731 #endif
   3732   },
   3733   { "mulhl_uu.sn", TILEPRO_OPC_MULHL_UU_SN, 0x1, 3, TREG_SN, 1,
   3734     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3735 #ifndef DISASM_ONLY
   3736     {
   3737       0x800000007ffc0000ULL,
   3738       0ULL,
   3739       0ULL,
   3740       0ULL,
   3741       0ULL
   3742     },
   3743     {
   3744       0x0000000008940000ULL,
   3745       -1ULL,
   3746       -1ULL,
   3747       -1ULL,
   3748       -1ULL
   3749     }
   3750 #endif
   3751   },
   3752   { "mulhla_ss", TILEPRO_OPC_MULHLA_SS, 0x1, 3, TREG_ZERO, 1,
   3753     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3754 #ifndef DISASM_ONLY
   3755     {
   3756       0x800000007ffc0000ULL,
   3757       0ULL,
   3758       0ULL,
   3759       0ULL,
   3760       0ULL
   3761     },
   3762     {
   3763       0x0000000000740000ULL,
   3764       -1ULL,
   3765       -1ULL,
   3766       -1ULL,
   3767       -1ULL
   3768     }
   3769 #endif
   3770   },
   3771   { "mulhla_ss.sn", TILEPRO_OPC_MULHLA_SS_SN, 0x1, 3, TREG_SN, 1,
   3772     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3773 #ifndef DISASM_ONLY
   3774     {
   3775       0x800000007ffc0000ULL,
   3776       0ULL,
   3777       0ULL,
   3778       0ULL,
   3779       0ULL
   3780     },
   3781     {
   3782       0x0000000008740000ULL,
   3783       -1ULL,
   3784       -1ULL,
   3785       -1ULL,
   3786       -1ULL
   3787     }
   3788 #endif
   3789   },
   3790   { "mulhla_su", TILEPRO_OPC_MULHLA_SU, 0x1, 3, TREG_ZERO, 1,
   3791     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3792 #ifndef DISASM_ONLY
   3793     {
   3794       0x800000007ffc0000ULL,
   3795       0ULL,
   3796       0ULL,
   3797       0ULL,
   3798       0ULL
   3799     },
   3800     {
   3801       0x0000000000780000ULL,
   3802       -1ULL,
   3803       -1ULL,
   3804       -1ULL,
   3805       -1ULL
   3806     }
   3807 #endif
   3808   },
   3809   { "mulhla_su.sn", TILEPRO_OPC_MULHLA_SU_SN, 0x1, 3, TREG_SN, 1,
   3810     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3811 #ifndef DISASM_ONLY
   3812     {
   3813       0x800000007ffc0000ULL,
   3814       0ULL,
   3815       0ULL,
   3816       0ULL,
   3817       0ULL
   3818     },
   3819     {
   3820       0x0000000008780000ULL,
   3821       -1ULL,
   3822       -1ULL,
   3823       -1ULL,
   3824       -1ULL
   3825     }
   3826 #endif
   3827   },
   3828   { "mulhla_us", TILEPRO_OPC_MULHLA_US, 0x1, 3, TREG_ZERO, 1,
   3829     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3830 #ifndef DISASM_ONLY
   3831     {
   3832       0x800000007ffc0000ULL,
   3833       0ULL,
   3834       0ULL,
   3835       0ULL,
   3836       0ULL
   3837     },
   3838     {
   3839       0x00000000007c0000ULL,
   3840       -1ULL,
   3841       -1ULL,
   3842       -1ULL,
   3843       -1ULL
   3844     }
   3845 #endif
   3846   },
   3847   { "mulhla_us.sn", TILEPRO_OPC_MULHLA_US_SN, 0x1, 3, TREG_SN, 1,
   3848     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3849 #ifndef DISASM_ONLY
   3850     {
   3851       0x800000007ffc0000ULL,
   3852       0ULL,
   3853       0ULL,
   3854       0ULL,
   3855       0ULL
   3856     },
   3857     {
   3858       0x00000000087c0000ULL,
   3859       -1ULL,
   3860       -1ULL,
   3861       -1ULL,
   3862       -1ULL
   3863     }
   3864 #endif
   3865   },
   3866   { "mulhla_uu", TILEPRO_OPC_MULHLA_UU, 0x1, 3, TREG_ZERO, 1,
   3867     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3868 #ifndef DISASM_ONLY
   3869     {
   3870       0x800000007ffc0000ULL,
   3871       0ULL,
   3872       0ULL,
   3873       0ULL,
   3874       0ULL
   3875     },
   3876     {
   3877       0x0000000000800000ULL,
   3878       -1ULL,
   3879       -1ULL,
   3880       -1ULL,
   3881       -1ULL
   3882     }
   3883 #endif
   3884   },
   3885   { "mulhla_uu.sn", TILEPRO_OPC_MULHLA_UU_SN, 0x1, 3, TREG_SN, 1,
   3886     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3887 #ifndef DISASM_ONLY
   3888     {
   3889       0x800000007ffc0000ULL,
   3890       0ULL,
   3891       0ULL,
   3892       0ULL,
   3893       0ULL
   3894     },
   3895     {
   3896       0x0000000008800000ULL,
   3897       -1ULL,
   3898       -1ULL,
   3899       -1ULL,
   3900       -1ULL
   3901     }
   3902 #endif
   3903   },
   3904   { "mulhlsa_uu", TILEPRO_OPC_MULHLSA_UU, 0x5, 3, TREG_ZERO, 1,
   3905     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   3906 #ifndef DISASM_ONLY
   3907     {
   3908       0x800000007ffc0000ULL,
   3909       0ULL,
   3910       0x80000000780c0000ULL,
   3911       0ULL,
   3912       0ULL
   3913     },
   3914     {
   3915       0x0000000000840000ULL,
   3916       -1ULL,
   3917       0x8000000030000000ULL,
   3918       -1ULL,
   3919       -1ULL
   3920     }
   3921 #endif
   3922   },
   3923   { "mulhlsa_uu.sn", TILEPRO_OPC_MULHLSA_UU_SN, 0x1, 3, TREG_SN, 1,
   3924     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3925 #ifndef DISASM_ONLY
   3926     {
   3927       0x800000007ffc0000ULL,
   3928       0ULL,
   3929       0ULL,
   3930       0ULL,
   3931       0ULL
   3932     },
   3933     {
   3934       0x0000000008840000ULL,
   3935       -1ULL,
   3936       -1ULL,
   3937       -1ULL,
   3938       -1ULL
   3939     }
   3940 #endif
   3941   },
   3942   { "mulll_ss", TILEPRO_OPC_MULLL_SS, 0x5, 3, TREG_ZERO, 1,
   3943     { { 9, 10, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } },
   3944 #ifndef DISASM_ONLY
   3945     {
   3946       0x800000007ffc0000ULL,
   3947       0ULL,
   3948       0x80000000780c0000ULL,
   3949       0ULL,
   3950       0ULL
   3951     },
   3952     {
   3953       0x0000000000a80000ULL,
   3954       -1ULL,
   3955       0x8000000038080000ULL,
   3956       -1ULL,
   3957       -1ULL
   3958     }
   3959 #endif
   3960   },
   3961   { "mulll_ss.sn", TILEPRO_OPC_MULLL_SS_SN, 0x1, 3, TREG_SN, 1,
   3962     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3963 #ifndef DISASM_ONLY
   3964     {
   3965       0x800000007ffc0000ULL,
   3966       0ULL,
   3967       0ULL,
   3968       0ULL,
   3969       0ULL
   3970     },
   3971     {
   3972       0x0000000008a80000ULL,
   3973       -1ULL,
   3974       -1ULL,
   3975       -1ULL,
   3976       -1ULL
   3977     }
   3978 #endif
   3979   },
   3980   { "mulll_su", TILEPRO_OPC_MULLL_SU, 0x1, 3, TREG_ZERO, 1,
   3981     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3982 #ifndef DISASM_ONLY
   3983     {
   3984       0x800000007ffc0000ULL,
   3985       0ULL,
   3986       0ULL,
   3987       0ULL,
   3988       0ULL
   3989     },
   3990     {
   3991       0x0000000000ac0000ULL,
   3992       -1ULL,
   3993       -1ULL,
   3994       -1ULL,
   3995       -1ULL
   3996     }
   3997 #endif
   3998   },
   3999   { "mulll_su.sn", TILEPRO_OPC_MULLL_SU_SN, 0x1, 3, TREG_SN, 1,
   4000     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4001 #ifndef DISASM_ONLY
   4002     {
   4003       0x800000007ffc0000ULL,
   4004       0ULL,
   4005       0ULL,
   4006       0ULL,
   4007       0ULL
   4008     },
   4009     {
   4010       0x0000000008ac0000ULL,
   4011       -1ULL,
   4012       -1ULL,
   4013       -1ULL,
   4014       -1ULL
   4015     }
   4016 #endif
   4017   },
   4018   { "mulll_uu", TILEPRO_OPC_MULLL_UU, 0x5, 3, TREG_ZERO, 1,
   4019     { { 9, 10, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } },
   4020 #ifndef DISASM_ONLY
   4021     {
   4022       0x800000007ffc0000ULL,
   4023       0ULL,
   4024       0x80000000780c0000ULL,
   4025       0ULL,
   4026       0ULL
   4027     },
   4028     {
   4029       0x0000000000b00000ULL,
   4030       -1ULL,
   4031       0x80000000380c0000ULL,
   4032       -1ULL,
   4033       -1ULL
   4034     }
   4035 #endif
   4036   },
   4037   { "mulll_uu.sn", TILEPRO_OPC_MULLL_UU_SN, 0x1, 3, TREG_SN, 1,
   4038     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4039 #ifndef DISASM_ONLY
   4040     {
   4041       0x800000007ffc0000ULL,
   4042       0ULL,
   4043       0ULL,
   4044       0ULL,
   4045       0ULL
   4046     },
   4047     {
   4048       0x0000000008b00000ULL,
   4049       -1ULL,
   4050       -1ULL,
   4051       -1ULL,
   4052       -1ULL
   4053     }
   4054 #endif
   4055   },
   4056   { "mullla_ss", TILEPRO_OPC_MULLLA_SS, 0x5, 3, TREG_ZERO, 1,
   4057     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   4058 #ifndef DISASM_ONLY
   4059     {
   4060       0x800000007ffc0000ULL,
   4061       0ULL,
   4062       0x80000000780c0000ULL,
   4063       0ULL,
   4064       0ULL
   4065     },
   4066     {
   4067       0x0000000000980000ULL,
   4068       -1ULL,
   4069       0x8000000040080000ULL,
   4070       -1ULL,
   4071       -1ULL
   4072     }
   4073 #endif
   4074   },
   4075   { "mullla_ss.sn", TILEPRO_OPC_MULLLA_SS_SN, 0x1, 3, TREG_SN, 1,
   4076     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4077 #ifndef DISASM_ONLY
   4078     {
   4079       0x800000007ffc0000ULL,
   4080       0ULL,
   4081       0ULL,
   4082       0ULL,
   4083       0ULL
   4084     },
   4085     {
   4086       0x0000000008980000ULL,
   4087       -1ULL,
   4088       -1ULL,
   4089       -1ULL,
   4090       -1ULL
   4091     }
   4092 #endif
   4093   },
   4094   { "mullla_su", TILEPRO_OPC_MULLLA_SU, 0x1, 3, TREG_ZERO, 1,
   4095     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4096 #ifndef DISASM_ONLY
   4097     {
   4098       0x800000007ffc0000ULL,
   4099       0ULL,
   4100       0ULL,
   4101       0ULL,
   4102       0ULL
   4103     },
   4104     {
   4105       0x00000000009c0000ULL,
   4106       -1ULL,
   4107       -1ULL,
   4108       -1ULL,
   4109       -1ULL
   4110     }
   4111 #endif
   4112   },
   4113   { "mullla_su.sn", TILEPRO_OPC_MULLLA_SU_SN, 0x1, 3, TREG_SN, 1,
   4114     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4115 #ifndef DISASM_ONLY
   4116     {
   4117       0x800000007ffc0000ULL,
   4118       0ULL,
   4119       0ULL,
   4120       0ULL,
   4121       0ULL
   4122     },
   4123     {
   4124       0x00000000089c0000ULL,
   4125       -1ULL,
   4126       -1ULL,
   4127       -1ULL,
   4128       -1ULL
   4129     }
   4130 #endif
   4131   },
   4132   { "mullla_uu", TILEPRO_OPC_MULLLA_UU, 0x5, 3, TREG_ZERO, 1,
   4133     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   4134 #ifndef DISASM_ONLY
   4135     {
   4136       0x800000007ffc0000ULL,
   4137       0ULL,
   4138       0x80000000780c0000ULL,
   4139       0ULL,
   4140       0ULL
   4141     },
   4142     {
   4143       0x0000000000a00000ULL,
   4144       -1ULL,
   4145       0x80000000400c0000ULL,
   4146       -1ULL,
   4147       -1ULL
   4148     }
   4149 #endif
   4150   },
   4151   { "mullla_uu.sn", TILEPRO_OPC_MULLLA_UU_SN, 0x1, 3, TREG_SN, 1,
   4152     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4153 #ifndef DISASM_ONLY
   4154     {
   4155       0x800000007ffc0000ULL,
   4156       0ULL,
   4157       0ULL,
   4158       0ULL,
   4159       0ULL
   4160     },
   4161     {
   4162       0x0000000008a00000ULL,
   4163       -1ULL,
   4164       -1ULL,
   4165       -1ULL,
   4166       -1ULL
   4167     }
   4168 #endif
   4169   },
   4170   { "mulllsa_uu", TILEPRO_OPC_MULLLSA_UU, 0x1, 3, TREG_ZERO, 1,
   4171     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4172 #ifndef DISASM_ONLY
   4173     {
   4174       0x800000007ffc0000ULL,
   4175       0ULL,
   4176       0ULL,
   4177       0ULL,
   4178       0ULL
   4179     },
   4180     {
   4181       0x0000000000a40000ULL,
   4182       -1ULL,
   4183       -1ULL,
   4184       -1ULL,
   4185       -1ULL
   4186     }
   4187 #endif
   4188   },
   4189   { "mulllsa_uu.sn", TILEPRO_OPC_MULLLSA_UU_SN, 0x1, 3, TREG_SN, 1,
   4190     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4191 #ifndef DISASM_ONLY
   4192     {
   4193       0x800000007ffc0000ULL,
   4194       0ULL,
   4195       0ULL,
   4196       0ULL,
   4197       0ULL
   4198     },
   4199     {
   4200       0x0000000008a40000ULL,
   4201       -1ULL,
   4202       -1ULL,
   4203       -1ULL,
   4204       -1ULL
   4205     }
   4206 #endif
   4207   },
   4208   { "mvnz", TILEPRO_OPC_MVNZ, 0x5, 3, TREG_ZERO, 1,
   4209     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   4210 #ifndef DISASM_ONLY
   4211     {
   4212       0x800000007ffc0000ULL,
   4213       0ULL,
   4214       0x80000000780c0000ULL,
   4215       0ULL,
   4216       0ULL
   4217     },
   4218     {
   4219       0x0000000000b40000ULL,
   4220       -1ULL,
   4221       0x8000000010040000ULL,
   4222       -1ULL,
   4223       -1ULL
   4224     }
   4225 #endif
   4226   },
   4227   { "mvnz.sn", TILEPRO_OPC_MVNZ_SN, 0x1, 3, TREG_SN, 1,
   4228     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4229 #ifndef DISASM_ONLY
   4230     {
   4231       0x800000007ffc0000ULL,
   4232       0ULL,
   4233       0ULL,
   4234       0ULL,
   4235       0ULL
   4236     },
   4237     {
   4238       0x0000000008b40000ULL,
   4239       -1ULL,
   4240       -1ULL,
   4241       -1ULL,
   4242       -1ULL
   4243     }
   4244 #endif
   4245   },
   4246   { "mvz", TILEPRO_OPC_MVZ, 0x5, 3, TREG_ZERO, 1,
   4247     { { 21, 10, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } },
   4248 #ifndef DISASM_ONLY
   4249     {
   4250       0x800000007ffc0000ULL,
   4251       0ULL,
   4252       0x80000000780c0000ULL,
   4253       0ULL,
   4254       0ULL
   4255     },
   4256     {
   4257       0x0000000000b80000ULL,
   4258       -1ULL,
   4259       0x8000000010080000ULL,
   4260       -1ULL,
   4261       -1ULL
   4262     }
   4263 #endif
   4264   },
   4265   { "mvz.sn", TILEPRO_OPC_MVZ_SN, 0x1, 3, TREG_SN, 1,
   4266     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4267 #ifndef DISASM_ONLY
   4268     {
   4269       0x800000007ffc0000ULL,
   4270       0ULL,
   4271       0ULL,
   4272       0ULL,
   4273       0ULL
   4274     },
   4275     {
   4276       0x0000000008b80000ULL,
   4277       -1ULL,
   4278       -1ULL,
   4279       -1ULL,
   4280       -1ULL
   4281     }
   4282 #endif
   4283   },
   4284   { "mz", TILEPRO_OPC_MZ, 0xf, 3, TREG_ZERO, 1,
   4285     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4286 #ifndef DISASM_ONLY
   4287     {
   4288       0x800000007ffc0000ULL,
   4289       0xfffe000000000000ULL,
   4290       0x80000000780c0000ULL,
   4291       0xf806000000000000ULL,
   4292       0ULL
   4293     },
   4294     {
   4295       0x0000000000c40000ULL,
   4296       0x082e000000000000ULL,
   4297       0x80000000100c0000ULL,
   4298       0x9004000000000000ULL,
   4299       -1ULL
   4300     }
   4301 #endif
   4302   },
   4303   { "mz.sn", TILEPRO_OPC_MZ_SN, 0x3, 3, TREG_SN, 1,
   4304     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4305 #ifndef DISASM_ONLY
   4306     {
   4307       0x800000007ffc0000ULL,
   4308       0xfffe000000000000ULL,
   4309       0ULL,
   4310       0ULL,
   4311       0ULL
   4312     },
   4313     {
   4314       0x0000000008c40000ULL,
   4315       0x0c2e000000000000ULL,
   4316       -1ULL,
   4317       -1ULL,
   4318       -1ULL
   4319     }
   4320 #endif
   4321   },
   4322   { "mzb", TILEPRO_OPC_MZB, 0x3, 3, TREG_ZERO, 1,
   4323     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4324 #ifndef DISASM_ONLY
   4325     {
   4326       0x800000007ffc0000ULL,
   4327       0xfffe000000000000ULL,
   4328       0ULL,
   4329       0ULL,
   4330       0ULL
   4331     },
   4332     {
   4333       0x0000000000bc0000ULL,
   4334       0x082a000000000000ULL,
   4335       -1ULL,
   4336       -1ULL,
   4337       -1ULL
   4338     }
   4339 #endif
   4340   },
   4341   { "mzb.sn", TILEPRO_OPC_MZB_SN, 0x3, 3, TREG_SN, 1,
   4342     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4343 #ifndef DISASM_ONLY
   4344     {
   4345       0x800000007ffc0000ULL,
   4346       0xfffe000000000000ULL,
   4347       0ULL,
   4348       0ULL,
   4349       0ULL
   4350     },
   4351     {
   4352       0x0000000008bc0000ULL,
   4353       0x0c2a000000000000ULL,
   4354       -1ULL,
   4355       -1ULL,
   4356       -1ULL
   4357     }
   4358 #endif
   4359   },
   4360   { "mzh", TILEPRO_OPC_MZH, 0x3, 3, TREG_ZERO, 1,
   4361     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4362 #ifndef DISASM_ONLY
   4363     {
   4364       0x800000007ffc0000ULL,
   4365       0xfffe000000000000ULL,
   4366       0ULL,
   4367       0ULL,
   4368       0ULL
   4369     },
   4370     {
   4371       0x0000000000c00000ULL,
   4372       0x082c000000000000ULL,
   4373       -1ULL,
   4374       -1ULL,
   4375       -1ULL
   4376     }
   4377 #endif
   4378   },
   4379   { "mzh.sn", TILEPRO_OPC_MZH_SN, 0x3, 3, TREG_SN, 1,
   4380     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4381 #ifndef DISASM_ONLY
   4382     {
   4383       0x800000007ffc0000ULL,
   4384       0xfffe000000000000ULL,
   4385       0ULL,
   4386       0ULL,
   4387       0ULL
   4388     },
   4389     {
   4390       0x0000000008c00000ULL,
   4391       0x0c2c000000000000ULL,
   4392       -1ULL,
   4393       -1ULL,
   4394       -1ULL
   4395     }
   4396 #endif
   4397   },
   4398   { "nap", TILEPRO_OPC_NAP, 0x2, 0, TREG_ZERO, 0,
   4399     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   4400 #ifndef DISASM_ONLY
   4401     {
   4402       0ULL,
   4403       0xfbfff80000000000ULL,
   4404       0ULL,
   4405       0ULL,
   4406       0ULL
   4407     },
   4408     {
   4409       -1ULL,
   4410       0x400b800000000000ULL,
   4411       -1ULL,
   4412       -1ULL,
   4413       -1ULL
   4414     }
   4415 #endif
   4416   },
   4417   { "nop", TILEPRO_OPC_NOP, 0xf, 0, TREG_ZERO, 1,
   4418     { {  }, {  }, {  }, {  }, { 0, } },
   4419 #ifndef DISASM_ONLY
   4420     {
   4421       0x8000000077fff000ULL,
   4422       0xfbfff80000000000ULL,
   4423       0x80000000780ff000ULL,
   4424       0xf807f80000000000ULL,
   4425       0ULL
   4426     },
   4427     {
   4428       0x0000000070166000ULL,
   4429       0x400b880000000000ULL,
   4430       0x80000000680a6000ULL,
   4431       0xd805180000000000ULL,
   4432       -1ULL
   4433     }
   4434 #endif
   4435   },
   4436   { "nor", TILEPRO_OPC_NOR, 0xf, 3, TREG_ZERO, 1,
   4437     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4438 #ifndef DISASM_ONLY
   4439     {
   4440       0x800000007ffc0000ULL,
   4441       0xfffe000000000000ULL,
   4442       0x80000000780c0000ULL,
   4443       0xf806000000000000ULL,
   4444       0ULL
   4445     },
   4446     {
   4447       0x0000000000c80000ULL,
   4448       0x0830000000000000ULL,
   4449       0x8000000018040000ULL,
   4450       0x9802000000000000ULL,
   4451       -1ULL
   4452     }
   4453 #endif
   4454   },
   4455   { "nor.sn", TILEPRO_OPC_NOR_SN, 0x3, 3, TREG_SN, 1,
   4456     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4457 #ifndef DISASM_ONLY
   4458     {
   4459       0x800000007ffc0000ULL,
   4460       0xfffe000000000000ULL,
   4461       0ULL,
   4462       0ULL,
   4463       0ULL
   4464     },
   4465     {
   4466       0x0000000008c80000ULL,
   4467       0x0c30000000000000ULL,
   4468       -1ULL,
   4469       -1ULL,
   4470       -1ULL
   4471     }
   4472 #endif
   4473   },
   4474   { "or", TILEPRO_OPC_OR, 0xf, 3, TREG_ZERO, 1,
   4475     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4476 #ifndef DISASM_ONLY
   4477     {
   4478       0x800000007ffc0000ULL,
   4479       0xfffe000000000000ULL,
   4480       0x80000000780c0000ULL,
   4481       0xf806000000000000ULL,
   4482       0ULL
   4483     },
   4484     {
   4485       0x0000000000cc0000ULL,
   4486       0x0832000000000000ULL,
   4487       0x8000000018080000ULL,
   4488       0x9804000000000000ULL,
   4489       -1ULL
   4490     }
   4491 #endif
   4492   },
   4493   { "or.sn", TILEPRO_OPC_OR_SN, 0x3, 3, TREG_SN, 1,
   4494     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4495 #ifndef DISASM_ONLY
   4496     {
   4497       0x800000007ffc0000ULL,
   4498       0xfffe000000000000ULL,
   4499       0ULL,
   4500       0ULL,
   4501       0ULL
   4502     },
   4503     {
   4504       0x0000000008cc0000ULL,
   4505       0x0c32000000000000ULL,
   4506       -1ULL,
   4507       -1ULL,
   4508       -1ULL
   4509     }
   4510 #endif
   4511   },
   4512   { "ori", TILEPRO_OPC_ORI, 0xf, 3, TREG_ZERO, 1,
   4513     { { 9, 10, 0 }, { 7, 8, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
   4514 #ifndef DISASM_ONLY
   4515     {
   4516       0x800000007ff00000ULL,
   4517       0xfff8000000000000ULL,
   4518       0x8000000078000000ULL,
   4519       0xf800000000000000ULL,
   4520       0ULL
   4521     },
   4522     {
   4523       0x0000000040800000ULL,
   4524       0x3058000000000000ULL,
   4525       0x8000000058000000ULL,
   4526       0xc800000000000000ULL,
   4527       -1ULL
   4528     }
   4529 #endif
   4530   },
   4531   { "ori.sn", TILEPRO_OPC_ORI_SN, 0x3, 3, TREG_SN, 1,
   4532     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   4533 #ifndef DISASM_ONLY
   4534     {
   4535       0x800000007ff00000ULL,
   4536       0xfff8000000000000ULL,
   4537       0ULL,
   4538       0ULL,
   4539       0ULL
   4540     },
   4541     {
   4542       0x0000000048800000ULL,
   4543       0x3458000000000000ULL,
   4544       -1ULL,
   4545       -1ULL,
   4546       -1ULL
   4547     }
   4548 #endif
   4549   },
   4550   { "packbs_u", TILEPRO_OPC_PACKBS_U, 0x3, 3, TREG_ZERO, 1,
   4551     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4552 #ifndef DISASM_ONLY
   4553     {
   4554       0x800000007ffc0000ULL,
   4555       0xfffe000000000000ULL,
   4556       0ULL,
   4557       0ULL,
   4558       0ULL
   4559     },
   4560     {
   4561       0x00000000019c0000ULL,
   4562       0x0892000000000000ULL,
   4563       -1ULL,
   4564       -1ULL,
   4565       -1ULL
   4566     }
   4567 #endif
   4568   },
   4569   { "packbs_u.sn", TILEPRO_OPC_PACKBS_U_SN, 0x3, 3, TREG_SN, 1,
   4570     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4571 #ifndef DISASM_ONLY
   4572     {
   4573       0x800000007ffc0000ULL,
   4574       0xfffe000000000000ULL,
   4575       0ULL,
   4576       0ULL,
   4577       0ULL
   4578     },
   4579     {
   4580       0x00000000099c0000ULL,
   4581       0x0c92000000000000ULL,
   4582       -1ULL,
   4583       -1ULL,
   4584       -1ULL
   4585     }
   4586 #endif
   4587   },
   4588   { "packhb", TILEPRO_OPC_PACKHB, 0x3, 3, TREG_ZERO, 1,
   4589     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4590 #ifndef DISASM_ONLY
   4591     {
   4592       0x800000007ffc0000ULL,
   4593       0xfffe000000000000ULL,
   4594       0ULL,
   4595       0ULL,
   4596       0ULL
   4597     },
   4598     {
   4599       0x0000000000d00000ULL,
   4600       0x0834000000000000ULL,
   4601       -1ULL,
   4602       -1ULL,
   4603       -1ULL
   4604     }
   4605 #endif
   4606   },
   4607   { "packhb.sn", TILEPRO_OPC_PACKHB_SN, 0x3, 3, TREG_SN, 1,
   4608     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4609 #ifndef DISASM_ONLY
   4610     {
   4611       0x800000007ffc0000ULL,
   4612       0xfffe000000000000ULL,
   4613       0ULL,
   4614       0ULL,
   4615       0ULL
   4616     },
   4617     {
   4618       0x0000000008d00000ULL,
   4619       0x0c34000000000000ULL,
   4620       -1ULL,
   4621       -1ULL,
   4622       -1ULL
   4623     }
   4624 #endif
   4625   },
   4626   { "packhs", TILEPRO_OPC_PACKHS, 0x3, 3, TREG_ZERO, 1,
   4627     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4628 #ifndef DISASM_ONLY
   4629     {
   4630       0x800000007ffc0000ULL,
   4631       0xfffe000000000000ULL,
   4632       0ULL,
   4633       0ULL,
   4634       0ULL
   4635     },
   4636     {
   4637       0x0000000001980000ULL,
   4638       0x0890000000000000ULL,
   4639       -1ULL,
   4640       -1ULL,
   4641       -1ULL
   4642     }
   4643 #endif
   4644   },
   4645   { "packhs.sn", TILEPRO_OPC_PACKHS_SN, 0x3, 3, TREG_SN, 1,
   4646     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4647 #ifndef DISASM_ONLY
   4648     {
   4649       0x800000007ffc0000ULL,
   4650       0xfffe000000000000ULL,
   4651       0ULL,
   4652       0ULL,
   4653       0ULL
   4654     },
   4655     {
   4656       0x0000000009980000ULL,
   4657       0x0c90000000000000ULL,
   4658       -1ULL,
   4659       -1ULL,
   4660       -1ULL
   4661     }
   4662 #endif
   4663   },
   4664   { "packlb", TILEPRO_OPC_PACKLB, 0x3, 3, TREG_ZERO, 1,
   4665     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4666 #ifndef DISASM_ONLY
   4667     {
   4668       0x800000007ffc0000ULL,
   4669       0xfffe000000000000ULL,
   4670       0ULL,
   4671       0ULL,
   4672       0ULL
   4673     },
   4674     {
   4675       0x0000000000d40000ULL,
   4676       0x0836000000000000ULL,
   4677       -1ULL,
   4678       -1ULL,
   4679       -1ULL
   4680     }
   4681 #endif
   4682   },
   4683   { "packlb.sn", TILEPRO_OPC_PACKLB_SN, 0x3, 3, TREG_SN, 1,
   4684     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4685 #ifndef DISASM_ONLY
   4686     {
   4687       0x800000007ffc0000ULL,
   4688       0xfffe000000000000ULL,
   4689       0ULL,
   4690       0ULL,
   4691       0ULL
   4692     },
   4693     {
   4694       0x0000000008d40000ULL,
   4695       0x0c36000000000000ULL,
   4696       -1ULL,
   4697       -1ULL,
   4698       -1ULL
   4699     }
   4700 #endif
   4701   },
   4702   { "pcnt", TILEPRO_OPC_PCNT, 0x5, 2, TREG_ZERO, 1,
   4703     { { 9, 10 }, { 0, }, { 11, 12 }, { 0, }, { 0, } },
   4704 #ifndef DISASM_ONLY
   4705     {
   4706       0x800000007ffff000ULL,
   4707       0ULL,
   4708       0x80000000780ff000ULL,
   4709       0ULL,
   4710       0ULL
   4711     },
   4712     {
   4713       0x0000000070167000ULL,
   4714       -1ULL,
   4715       0x80000000680a7000ULL,
   4716       -1ULL,
   4717       -1ULL
   4718     }
   4719 #endif
   4720   },
   4721   { "pcnt.sn", TILEPRO_OPC_PCNT_SN, 0x1, 2, TREG_SN, 1,
   4722     { { 9, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4723 #ifndef DISASM_ONLY
   4724     {
   4725       0x800000007ffff000ULL,
   4726       0ULL,
   4727       0ULL,
   4728       0ULL,
   4729       0ULL
   4730     },
   4731     {
   4732       0x0000000078167000ULL,
   4733       -1ULL,
   4734       -1ULL,
   4735       -1ULL,
   4736       -1ULL
   4737     }
   4738 #endif
   4739   },
   4740   { "rl", TILEPRO_OPC_RL, 0xf, 3, TREG_ZERO, 1,
   4741     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4742 #ifndef DISASM_ONLY
   4743     {
   4744       0x800000007ffc0000ULL,
   4745       0xfffe000000000000ULL,
   4746       0x80000000780c0000ULL,
   4747       0xf806000000000000ULL,
   4748       0ULL
   4749     },
   4750     {
   4751       0x0000000000d80000ULL,
   4752       0x0838000000000000ULL,
   4753       0x8000000020000000ULL,
   4754       0xa000000000000000ULL,
   4755       -1ULL
   4756     }
   4757 #endif
   4758   },
   4759   { "rl.sn", TILEPRO_OPC_RL_SN, 0x3, 3, TREG_SN, 1,
   4760     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4761 #ifndef DISASM_ONLY
   4762     {
   4763       0x800000007ffc0000ULL,
   4764       0xfffe000000000000ULL,
   4765       0ULL,
   4766       0ULL,
   4767       0ULL
   4768     },
   4769     {
   4770       0x0000000008d80000ULL,
   4771       0x0c38000000000000ULL,
   4772       -1ULL,
   4773       -1ULL,
   4774       -1ULL
   4775     }
   4776 #endif
   4777   },
   4778   { "rli", TILEPRO_OPC_RLI, 0xf, 3, TREG_ZERO, 1,
   4779     { { 9, 10, 32 }, { 7, 8, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } },
   4780 #ifndef DISASM_ONLY
   4781     {
   4782       0x800000007ffe0000ULL,
   4783       0xffff000000000000ULL,
   4784       0x80000000780e0000ULL,
   4785       0xf807000000000000ULL,
   4786       0ULL
   4787     },
   4788     {
   4789       0x0000000070020000ULL,
   4790       0x4001000000000000ULL,
   4791       0x8000000068020000ULL,
   4792       0xd801000000000000ULL,
   4793       -1ULL
   4794     }
   4795 #endif
   4796   },
   4797   { "rli.sn", TILEPRO_OPC_RLI_SN, 0x3, 3, TREG_SN, 1,
   4798     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   4799 #ifndef DISASM_ONLY
   4800     {
   4801       0x800000007ffe0000ULL,
   4802       0xffff000000000000ULL,
   4803       0ULL,
   4804       0ULL,
   4805       0ULL
   4806     },
   4807     {
   4808       0x0000000078020000ULL,
   4809       0x4401000000000000ULL,
   4810       -1ULL,
   4811       -1ULL,
   4812       -1ULL
   4813     }
   4814 #endif
   4815   },
   4816   { "s1a", TILEPRO_OPC_S1A, 0xf, 3, TREG_ZERO, 1,
   4817     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4818 #ifndef DISASM_ONLY
   4819     {
   4820       0x800000007ffc0000ULL,
   4821       0xfffe000000000000ULL,
   4822       0x80000000780c0000ULL,
   4823       0xf806000000000000ULL,
   4824       0ULL
   4825     },
   4826     {
   4827       0x0000000000dc0000ULL,
   4828       0x083a000000000000ULL,
   4829       0x8000000008040000ULL,
   4830       0x8802000000000000ULL,
   4831       -1ULL
   4832     }
   4833 #endif
   4834   },
   4835   { "s1a.sn", TILEPRO_OPC_S1A_SN, 0x3, 3, TREG_SN, 1,
   4836     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4837 #ifndef DISASM_ONLY
   4838     {
   4839       0x800000007ffc0000ULL,
   4840       0xfffe000000000000ULL,
   4841       0ULL,
   4842       0ULL,
   4843       0ULL
   4844     },
   4845     {
   4846       0x0000000008dc0000ULL,
   4847       0x0c3a000000000000ULL,
   4848       -1ULL,
   4849       -1ULL,
   4850       -1ULL
   4851     }
   4852 #endif
   4853   },
   4854   { "s2a", TILEPRO_OPC_S2A, 0xf, 3, TREG_ZERO, 1,
   4855     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4856 #ifndef DISASM_ONLY
   4857     {
   4858       0x800000007ffc0000ULL,
   4859       0xfffe000000000000ULL,
   4860       0x80000000780c0000ULL,
   4861       0xf806000000000000ULL,
   4862       0ULL
   4863     },
   4864     {
   4865       0x0000000000e00000ULL,
   4866       0x083c000000000000ULL,
   4867       0x8000000008080000ULL,
   4868       0x8804000000000000ULL,
   4869       -1ULL
   4870     }
   4871 #endif
   4872   },
   4873   { "s2a.sn", TILEPRO_OPC_S2A_SN, 0x3, 3, TREG_SN, 1,
   4874     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4875 #ifndef DISASM_ONLY
   4876     {
   4877       0x800000007ffc0000ULL,
   4878       0xfffe000000000000ULL,
   4879       0ULL,
   4880       0ULL,
   4881       0ULL
   4882     },
   4883     {
   4884       0x0000000008e00000ULL,
   4885       0x0c3c000000000000ULL,
   4886       -1ULL,
   4887       -1ULL,
   4888       -1ULL
   4889     }
   4890 #endif
   4891   },
   4892   { "s3a", TILEPRO_OPC_S3A, 0xf, 3, TREG_ZERO, 1,
   4893     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   4894 #ifndef DISASM_ONLY
   4895     {
   4896       0x800000007ffc0000ULL,
   4897       0xfffe000000000000ULL,
   4898       0x80000000780c0000ULL,
   4899       0xf806000000000000ULL,
   4900       0ULL
   4901     },
   4902     {
   4903       0x0000000000e40000ULL,
   4904       0x083e000000000000ULL,
   4905       0x8000000030040000ULL,
   4906       0xb002000000000000ULL,
   4907       -1ULL
   4908     }
   4909 #endif
   4910   },
   4911   { "s3a.sn", TILEPRO_OPC_S3A_SN, 0x3, 3, TREG_SN, 1,
   4912     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   4913 #ifndef DISASM_ONLY
   4914     {
   4915       0x800000007ffc0000ULL,
   4916       0xfffe000000000000ULL,
   4917       0ULL,
   4918       0ULL,
   4919       0ULL
   4920     },
   4921     {
   4922       0x0000000008e40000ULL,
   4923       0x0c3e000000000000ULL,
   4924       -1ULL,
   4925       -1ULL,
   4926       -1ULL
   4927     }
   4928 #endif
   4929   },
   4930   { "sadab_u", TILEPRO_OPC_SADAB_U, 0x1, 3, TREG_ZERO, 1,
   4931     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4932 #ifndef DISASM_ONLY
   4933     {
   4934       0x800000007ffc0000ULL,
   4935       0ULL,
   4936       0ULL,
   4937       0ULL,
   4938       0ULL
   4939     },
   4940     {
   4941       0x0000000000e80000ULL,
   4942       -1ULL,
   4943       -1ULL,
   4944       -1ULL,
   4945       -1ULL
   4946     }
   4947 #endif
   4948   },
   4949   { "sadab_u.sn", TILEPRO_OPC_SADAB_U_SN, 0x1, 3, TREG_SN, 1,
   4950     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4951 #ifndef DISASM_ONLY
   4952     {
   4953       0x800000007ffc0000ULL,
   4954       0ULL,
   4955       0ULL,
   4956       0ULL,
   4957       0ULL
   4958     },
   4959     {
   4960       0x0000000008e80000ULL,
   4961       -1ULL,
   4962       -1ULL,
   4963       -1ULL,
   4964       -1ULL
   4965     }
   4966 #endif
   4967   },
   4968   { "sadah", TILEPRO_OPC_SADAH, 0x1, 3, TREG_ZERO, 1,
   4969     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4970 #ifndef DISASM_ONLY
   4971     {
   4972       0x800000007ffc0000ULL,
   4973       0ULL,
   4974       0ULL,
   4975       0ULL,
   4976       0ULL
   4977     },
   4978     {
   4979       0x0000000000ec0000ULL,
   4980       -1ULL,
   4981       -1ULL,
   4982       -1ULL,
   4983       -1ULL
   4984     }
   4985 #endif
   4986   },
   4987   { "sadah.sn", TILEPRO_OPC_SADAH_SN, 0x1, 3, TREG_SN, 1,
   4988     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4989 #ifndef DISASM_ONLY
   4990     {
   4991       0x800000007ffc0000ULL,
   4992       0ULL,
   4993       0ULL,
   4994       0ULL,
   4995       0ULL
   4996     },
   4997     {
   4998       0x0000000008ec0000ULL,
   4999       -1ULL,
   5000       -1ULL,
   5001       -1ULL,
   5002       -1ULL
   5003     }
   5004 #endif
   5005   },
   5006   { "sadah_u", TILEPRO_OPC_SADAH_U, 0x1, 3, TREG_ZERO, 1,
   5007     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5008 #ifndef DISASM_ONLY
   5009     {
   5010       0x800000007ffc0000ULL,
   5011       0ULL,
   5012       0ULL,
   5013       0ULL,
   5014       0ULL
   5015     },
   5016     {
   5017       0x0000000000f00000ULL,
   5018       -1ULL,
   5019       -1ULL,
   5020       -1ULL,
   5021       -1ULL
   5022     }
   5023 #endif
   5024   },
   5025   { "sadah_u.sn", TILEPRO_OPC_SADAH_U_SN, 0x1, 3, TREG_SN, 1,
   5026     { { 21, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5027 #ifndef DISASM_ONLY
   5028     {
   5029       0x800000007ffc0000ULL,
   5030       0ULL,
   5031       0ULL,
   5032       0ULL,
   5033       0ULL
   5034     },
   5035     {
   5036       0x0000000008f00000ULL,
   5037       -1ULL,
   5038       -1ULL,
   5039       -1ULL,
   5040       -1ULL
   5041     }
   5042 #endif
   5043   },
   5044   { "sadb_u", TILEPRO_OPC_SADB_U, 0x1, 3, TREG_ZERO, 1,
   5045     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5046 #ifndef DISASM_ONLY
   5047     {
   5048       0x800000007ffc0000ULL,
   5049       0ULL,
   5050       0ULL,
   5051       0ULL,
   5052       0ULL
   5053     },
   5054     {
   5055       0x0000000000f40000ULL,
   5056       -1ULL,
   5057       -1ULL,
   5058       -1ULL,
   5059       -1ULL
   5060     }
   5061 #endif
   5062   },
   5063   { "sadb_u.sn", TILEPRO_OPC_SADB_U_SN, 0x1, 3, TREG_SN, 1,
   5064     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5065 #ifndef DISASM_ONLY
   5066     {
   5067       0x800000007ffc0000ULL,
   5068       0ULL,
   5069       0ULL,
   5070       0ULL,
   5071       0ULL
   5072     },
   5073     {
   5074       0x0000000008f40000ULL,
   5075       -1ULL,
   5076       -1ULL,
   5077       -1ULL,
   5078       -1ULL
   5079     }
   5080 #endif
   5081   },
   5082   { "sadh", TILEPRO_OPC_SADH, 0x1, 3, TREG_ZERO, 1,
   5083     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5084 #ifndef DISASM_ONLY
   5085     {
   5086       0x800000007ffc0000ULL,
   5087       0ULL,
   5088       0ULL,
   5089       0ULL,
   5090       0ULL
   5091     },
   5092     {
   5093       0x0000000000f80000ULL,
   5094       -1ULL,
   5095       -1ULL,
   5096       -1ULL,
   5097       -1ULL
   5098     }
   5099 #endif
   5100   },
   5101   { "sadh.sn", TILEPRO_OPC_SADH_SN, 0x1, 3, TREG_SN, 1,
   5102     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5103 #ifndef DISASM_ONLY
   5104     {
   5105       0x800000007ffc0000ULL,
   5106       0ULL,
   5107       0ULL,
   5108       0ULL,
   5109       0ULL
   5110     },
   5111     {
   5112       0x0000000008f80000ULL,
   5113       -1ULL,
   5114       -1ULL,
   5115       -1ULL,
   5116       -1ULL
   5117     }
   5118 #endif
   5119   },
   5120   { "sadh_u", TILEPRO_OPC_SADH_U, 0x1, 3, TREG_ZERO, 1,
   5121     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5122 #ifndef DISASM_ONLY
   5123     {
   5124       0x800000007ffc0000ULL,
   5125       0ULL,
   5126       0ULL,
   5127       0ULL,
   5128       0ULL
   5129     },
   5130     {
   5131       0x0000000000fc0000ULL,
   5132       -1ULL,
   5133       -1ULL,
   5134       -1ULL,
   5135       -1ULL
   5136     }
   5137 #endif
   5138   },
   5139   { "sadh_u.sn", TILEPRO_OPC_SADH_U_SN, 0x1, 3, TREG_SN, 1,
   5140     { { 9, 10, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5141 #ifndef DISASM_ONLY
   5142     {
   5143       0x800000007ffc0000ULL,
   5144       0ULL,
   5145       0ULL,
   5146       0ULL,
   5147       0ULL
   5148     },
   5149     {
   5150       0x0000000008fc0000ULL,
   5151       -1ULL,
   5152       -1ULL,
   5153       -1ULL,
   5154       -1ULL
   5155     }
   5156 #endif
   5157   },
   5158   { "sb", TILEPRO_OPC_SB, 0x12, 2, TREG_ZERO, 1,
   5159     { { 0, }, { 8, 17 }, { 0, }, { 0, }, { 15, 36 } },
   5160 #ifndef DISASM_ONLY
   5161     {
   5162       0ULL,
   5163       0xfbfe000000000000ULL,
   5164       0ULL,
   5165       0ULL,
   5166       0x8700000000000000ULL
   5167     },
   5168     {
   5169       -1ULL,
   5170       0x0840000000000000ULL,
   5171       -1ULL,
   5172       -1ULL,
   5173       0x8500000000000000ULL
   5174     }
   5175 #endif
   5176   },
   5177   { "sbadd", TILEPRO_OPC_SBADD, 0x2, 3, TREG_ZERO, 1,
   5178     { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } },
   5179 #ifndef DISASM_ONLY
   5180     {
   5181       0ULL,
   5182       0xfbf8000000000000ULL,
   5183       0ULL,
   5184       0ULL,
   5185       0ULL
   5186     },
   5187     {
   5188       -1ULL,
   5189       0x30e0000000000000ULL,
   5190       -1ULL,
   5191       -1ULL,
   5192       -1ULL
   5193     }
   5194 #endif
   5195   },
   5196   { "seq", TILEPRO_OPC_SEQ, 0xf, 3, TREG_ZERO, 1,
   5197     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   5198 #ifndef DISASM_ONLY
   5199     {
   5200       0x800000007ffc0000ULL,
   5201       0xfffe000000000000ULL,
   5202       0x80000000780c0000ULL,
   5203       0xf806000000000000ULL,
   5204       0ULL
   5205     },
   5206     {
   5207       0x0000000001080000ULL,
   5208       0x0846000000000000ULL,
   5209       0x8000000030080000ULL,
   5210       0xb004000000000000ULL,
   5211       -1ULL
   5212     }
   5213 #endif
   5214   },
   5215   { "seq.sn", TILEPRO_OPC_SEQ_SN, 0x3, 3, TREG_SN, 1,
   5216     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5217 #ifndef DISASM_ONLY
   5218     {
   5219       0x800000007ffc0000ULL,
   5220       0xfffe000000000000ULL,
   5221       0ULL,
   5222       0ULL,
   5223       0ULL
   5224     },
   5225     {
   5226       0x0000000009080000ULL,
   5227       0x0c46000000000000ULL,
   5228       -1ULL,
   5229       -1ULL,
   5230       -1ULL
   5231     }
   5232 #endif
   5233   },
   5234   { "seqb", TILEPRO_OPC_SEQB, 0x3, 3, TREG_ZERO, 1,
   5235     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5236 #ifndef DISASM_ONLY
   5237     {
   5238       0x800000007ffc0000ULL,
   5239       0xfffe000000000000ULL,
   5240       0ULL,
   5241       0ULL,
   5242       0ULL
   5243     },
   5244     {
   5245       0x0000000001000000ULL,
   5246       0x0842000000000000ULL,
   5247       -1ULL,
   5248       -1ULL,
   5249       -1ULL
   5250     }
   5251 #endif
   5252   },
   5253   { "seqb.sn", TILEPRO_OPC_SEQB_SN, 0x3, 3, TREG_SN, 1,
   5254     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5255 #ifndef DISASM_ONLY
   5256     {
   5257       0x800000007ffc0000ULL,
   5258       0xfffe000000000000ULL,
   5259       0ULL,
   5260       0ULL,
   5261       0ULL
   5262     },
   5263     {
   5264       0x0000000009000000ULL,
   5265       0x0c42000000000000ULL,
   5266       -1ULL,
   5267       -1ULL,
   5268       -1ULL
   5269     }
   5270 #endif
   5271   },
   5272   { "seqh", TILEPRO_OPC_SEQH, 0x3, 3, TREG_ZERO, 1,
   5273     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5274 #ifndef DISASM_ONLY
   5275     {
   5276       0x800000007ffc0000ULL,
   5277       0xfffe000000000000ULL,
   5278       0ULL,
   5279       0ULL,
   5280       0ULL
   5281     },
   5282     {
   5283       0x0000000001040000ULL,
   5284       0x0844000000000000ULL,
   5285       -1ULL,
   5286       -1ULL,
   5287       -1ULL
   5288     }
   5289 #endif
   5290   },
   5291   { "seqh.sn", TILEPRO_OPC_SEQH_SN, 0x3, 3, TREG_SN, 1,
   5292     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5293 #ifndef DISASM_ONLY
   5294     {
   5295       0x800000007ffc0000ULL,
   5296       0xfffe000000000000ULL,
   5297       0ULL,
   5298       0ULL,
   5299       0ULL
   5300     },
   5301     {
   5302       0x0000000009040000ULL,
   5303       0x0c44000000000000ULL,
   5304       -1ULL,
   5305       -1ULL,
   5306       -1ULL
   5307     }
   5308 #endif
   5309   },
   5310   { "seqi", TILEPRO_OPC_SEQI, 0xf, 3, TREG_ZERO, 1,
   5311     { { 9, 10, 0 }, { 7, 8, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
   5312 #ifndef DISASM_ONLY
   5313     {
   5314       0x800000007ff00000ULL,
   5315       0xfff8000000000000ULL,
   5316       0x8000000078000000ULL,
   5317       0xf800000000000000ULL,
   5318       0ULL
   5319     },
   5320     {
   5321       0x0000000040b00000ULL,
   5322       0x3070000000000000ULL,
   5323       0x8000000060000000ULL,
   5324       0xd000000000000000ULL,
   5325       -1ULL
   5326     }
   5327 #endif
   5328   },
   5329   { "seqi.sn", TILEPRO_OPC_SEQI_SN, 0x3, 3, TREG_SN, 1,
   5330     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   5331 #ifndef DISASM_ONLY
   5332     {
   5333       0x800000007ff00000ULL,
   5334       0xfff8000000000000ULL,
   5335       0ULL,
   5336       0ULL,
   5337       0ULL
   5338     },
   5339     {
   5340       0x0000000048b00000ULL,
   5341       0x3470000000000000ULL,
   5342       -1ULL,
   5343       -1ULL,
   5344       -1ULL
   5345     }
   5346 #endif
   5347   },
   5348   { "seqib", TILEPRO_OPC_SEQIB, 0x3, 3, TREG_ZERO, 1,
   5349     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   5350 #ifndef DISASM_ONLY
   5351     {
   5352       0x800000007ff00000ULL,
   5353       0xfff8000000000000ULL,
   5354       0ULL,
   5355       0ULL,
   5356       0ULL
   5357     },
   5358     {
   5359       0x0000000040900000ULL,
   5360       0x3060000000000000ULL,
   5361       -1ULL,
   5362       -1ULL,
   5363       -1ULL
   5364     }
   5365 #endif
   5366   },
   5367   { "seqib.sn", TILEPRO_OPC_SEQIB_SN, 0x3, 3, TREG_SN, 1,
   5368     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   5369 #ifndef DISASM_ONLY
   5370     {
   5371       0x800000007ff00000ULL,
   5372       0xfff8000000000000ULL,
   5373       0ULL,
   5374       0ULL,
   5375       0ULL
   5376     },
   5377     {
   5378       0x0000000048900000ULL,
   5379       0x3460000000000000ULL,
   5380       -1ULL,
   5381       -1ULL,
   5382       -1ULL
   5383     }
   5384 #endif
   5385   },
   5386   { "seqih", TILEPRO_OPC_SEQIH, 0x3, 3, TREG_ZERO, 1,
   5387     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   5388 #ifndef DISASM_ONLY
   5389     {
   5390       0x800000007ff00000ULL,
   5391       0xfff8000000000000ULL,
   5392       0ULL,
   5393       0ULL,
   5394       0ULL
   5395     },
   5396     {
   5397       0x0000000040a00000ULL,
   5398       0x3068000000000000ULL,
   5399       -1ULL,
   5400       -1ULL,
   5401       -1ULL
   5402     }
   5403 #endif
   5404   },
   5405   { "seqih.sn", TILEPRO_OPC_SEQIH_SN, 0x3, 3, TREG_SN, 1,
   5406     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   5407 #ifndef DISASM_ONLY
   5408     {
   5409       0x800000007ff00000ULL,
   5410       0xfff8000000000000ULL,
   5411       0ULL,
   5412       0ULL,
   5413       0ULL
   5414     },
   5415     {
   5416       0x0000000048a00000ULL,
   5417       0x3468000000000000ULL,
   5418       -1ULL,
   5419       -1ULL,
   5420       -1ULL
   5421     }
   5422 #endif
   5423   },
   5424   { "sh", TILEPRO_OPC_SH, 0x12, 2, TREG_ZERO, 1,
   5425     { { 0, }, { 8, 17 }, { 0, }, { 0, }, { 15, 36 } },
   5426 #ifndef DISASM_ONLY
   5427     {
   5428       0ULL,
   5429       0xfbfe000000000000ULL,
   5430       0ULL,
   5431       0ULL,
   5432       0x8700000000000000ULL
   5433     },
   5434     {
   5435       -1ULL,
   5436       0x0854000000000000ULL,
   5437       -1ULL,
   5438       -1ULL,
   5439       0x8600000000000000ULL
   5440     }
   5441 #endif
   5442   },
   5443   { "shadd", TILEPRO_OPC_SHADD, 0x2, 3, TREG_ZERO, 1,
   5444     { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } },
   5445 #ifndef DISASM_ONLY
   5446     {
   5447       0ULL,
   5448       0xfbf8000000000000ULL,
   5449       0ULL,
   5450       0ULL,
   5451       0ULL
   5452     },
   5453     {
   5454       -1ULL,
   5455       0x30e8000000000000ULL,
   5456       -1ULL,
   5457       -1ULL,
   5458       -1ULL
   5459     }
   5460 #endif
   5461   },
   5462   { "shl", TILEPRO_OPC_SHL, 0xf, 3, TREG_ZERO, 1,
   5463     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   5464 #ifndef DISASM_ONLY
   5465     {
   5466       0x800000007ffc0000ULL,
   5467       0xfffe000000000000ULL,
   5468       0x80000000780c0000ULL,
   5469       0xf806000000000000ULL,
   5470       0ULL
   5471     },
   5472     {
   5473       0x0000000001140000ULL,
   5474       0x084c000000000000ULL,
   5475       0x8000000020040000ULL,
   5476       0xa002000000000000ULL,
   5477       -1ULL
   5478     }
   5479 #endif
   5480   },
   5481   { "shl.sn", TILEPRO_OPC_SHL_SN, 0x3, 3, TREG_SN, 1,
   5482     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5483 #ifndef DISASM_ONLY
   5484     {
   5485       0x800000007ffc0000ULL,
   5486       0xfffe000000000000ULL,
   5487       0ULL,
   5488       0ULL,
   5489       0ULL
   5490     },
   5491     {
   5492       0x0000000009140000ULL,
   5493       0x0c4c000000000000ULL,
   5494       -1ULL,
   5495       -1ULL,
   5496       -1ULL
   5497     }
   5498 #endif
   5499   },
   5500   { "shlb", TILEPRO_OPC_SHLB, 0x3, 3, TREG_ZERO, 1,
   5501     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5502 #ifndef DISASM_ONLY
   5503     {
   5504       0x800000007ffc0000ULL,
   5505       0xfffe000000000000ULL,
   5506       0ULL,
   5507       0ULL,
   5508       0ULL
   5509     },
   5510     {
   5511       0x00000000010c0000ULL,
   5512       0x0848000000000000ULL,
   5513       -1ULL,
   5514       -1ULL,
   5515       -1ULL
   5516     }
   5517 #endif
   5518   },
   5519   { "shlb.sn", TILEPRO_OPC_SHLB_SN, 0x3, 3, TREG_SN, 1,
   5520     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5521 #ifndef DISASM_ONLY
   5522     {
   5523       0x800000007ffc0000ULL,
   5524       0xfffe000000000000ULL,
   5525       0ULL,
   5526       0ULL,
   5527       0ULL
   5528     },
   5529     {
   5530       0x00000000090c0000ULL,
   5531       0x0c48000000000000ULL,
   5532       -1ULL,
   5533       -1ULL,
   5534       -1ULL
   5535     }
   5536 #endif
   5537   },
   5538   { "shlh", TILEPRO_OPC_SHLH, 0x3, 3, TREG_ZERO, 1,
   5539     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5540 #ifndef DISASM_ONLY
   5541     {
   5542       0x800000007ffc0000ULL,
   5543       0xfffe000000000000ULL,
   5544       0ULL,
   5545       0ULL,
   5546       0ULL
   5547     },
   5548     {
   5549       0x0000000001100000ULL,
   5550       0x084a000000000000ULL,
   5551       -1ULL,
   5552       -1ULL,
   5553       -1ULL
   5554     }
   5555 #endif
   5556   },
   5557   { "shlh.sn", TILEPRO_OPC_SHLH_SN, 0x3, 3, TREG_SN, 1,
   5558     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5559 #ifndef DISASM_ONLY
   5560     {
   5561       0x800000007ffc0000ULL,
   5562       0xfffe000000000000ULL,
   5563       0ULL,
   5564       0ULL,
   5565       0ULL
   5566     },
   5567     {
   5568       0x0000000009100000ULL,
   5569       0x0c4a000000000000ULL,
   5570       -1ULL,
   5571       -1ULL,
   5572       -1ULL
   5573     }
   5574 #endif
   5575   },
   5576   { "shli", TILEPRO_OPC_SHLI, 0xf, 3, TREG_ZERO, 1,
   5577     { { 9, 10, 32 }, { 7, 8, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } },
   5578 #ifndef DISASM_ONLY
   5579     {
   5580       0x800000007ffe0000ULL,
   5581       0xffff000000000000ULL,
   5582       0x80000000780e0000ULL,
   5583       0xf807000000000000ULL,
   5584       0ULL
   5585     },
   5586     {
   5587       0x0000000070080000ULL,
   5588       0x4004000000000000ULL,
   5589       0x8000000068040000ULL,
   5590       0xd802000000000000ULL,
   5591       -1ULL
   5592     }
   5593 #endif
   5594   },
   5595   { "shli.sn", TILEPRO_OPC_SHLI_SN, 0x3, 3, TREG_SN, 1,
   5596     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5597 #ifndef DISASM_ONLY
   5598     {
   5599       0x800000007ffe0000ULL,
   5600       0xffff000000000000ULL,
   5601       0ULL,
   5602       0ULL,
   5603       0ULL
   5604     },
   5605     {
   5606       0x0000000078080000ULL,
   5607       0x4404000000000000ULL,
   5608       -1ULL,
   5609       -1ULL,
   5610       -1ULL
   5611     }
   5612 #endif
   5613   },
   5614   { "shlib", TILEPRO_OPC_SHLIB, 0x3, 3, TREG_ZERO, 1,
   5615     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5616 #ifndef DISASM_ONLY
   5617     {
   5618       0x800000007ffe0000ULL,
   5619       0xffff000000000000ULL,
   5620       0ULL,
   5621       0ULL,
   5622       0ULL
   5623     },
   5624     {
   5625       0x0000000070040000ULL,
   5626       0x4002000000000000ULL,
   5627       -1ULL,
   5628       -1ULL,
   5629       -1ULL
   5630     }
   5631 #endif
   5632   },
   5633   { "shlib.sn", TILEPRO_OPC_SHLIB_SN, 0x3, 3, TREG_SN, 1,
   5634     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5635 #ifndef DISASM_ONLY
   5636     {
   5637       0x800000007ffe0000ULL,
   5638       0xffff000000000000ULL,
   5639       0ULL,
   5640       0ULL,
   5641       0ULL
   5642     },
   5643     {
   5644       0x0000000078040000ULL,
   5645       0x4402000000000000ULL,
   5646       -1ULL,
   5647       -1ULL,
   5648       -1ULL
   5649     }
   5650 #endif
   5651   },
   5652   { "shlih", TILEPRO_OPC_SHLIH, 0x3, 3, TREG_ZERO, 1,
   5653     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5654 #ifndef DISASM_ONLY
   5655     {
   5656       0x800000007ffe0000ULL,
   5657       0xffff000000000000ULL,
   5658       0ULL,
   5659       0ULL,
   5660       0ULL
   5661     },
   5662     {
   5663       0x0000000070060000ULL,
   5664       0x4003000000000000ULL,
   5665       -1ULL,
   5666       -1ULL,
   5667       -1ULL
   5668     }
   5669 #endif
   5670   },
   5671   { "shlih.sn", TILEPRO_OPC_SHLIH_SN, 0x3, 3, TREG_SN, 1,
   5672     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5673 #ifndef DISASM_ONLY
   5674     {
   5675       0x800000007ffe0000ULL,
   5676       0xffff000000000000ULL,
   5677       0ULL,
   5678       0ULL,
   5679       0ULL
   5680     },
   5681     {
   5682       0x0000000078060000ULL,
   5683       0x4403000000000000ULL,
   5684       -1ULL,
   5685       -1ULL,
   5686       -1ULL
   5687     }
   5688 #endif
   5689   },
   5690   { "shr", TILEPRO_OPC_SHR, 0xf, 3, TREG_ZERO, 1,
   5691     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   5692 #ifndef DISASM_ONLY
   5693     {
   5694       0x800000007ffc0000ULL,
   5695       0xfffe000000000000ULL,
   5696       0x80000000780c0000ULL,
   5697       0xf806000000000000ULL,
   5698       0ULL
   5699     },
   5700     {
   5701       0x0000000001200000ULL,
   5702       0x0852000000000000ULL,
   5703       0x8000000020080000ULL,
   5704       0xa004000000000000ULL,
   5705       -1ULL
   5706     }
   5707 #endif
   5708   },
   5709   { "shr.sn", TILEPRO_OPC_SHR_SN, 0x3, 3, TREG_SN, 1,
   5710     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5711 #ifndef DISASM_ONLY
   5712     {
   5713       0x800000007ffc0000ULL,
   5714       0xfffe000000000000ULL,
   5715       0ULL,
   5716       0ULL,
   5717       0ULL
   5718     },
   5719     {
   5720       0x0000000009200000ULL,
   5721       0x0c52000000000000ULL,
   5722       -1ULL,
   5723       -1ULL,
   5724       -1ULL
   5725     }
   5726 #endif
   5727   },
   5728   { "shrb", TILEPRO_OPC_SHRB, 0x3, 3, TREG_ZERO, 1,
   5729     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5730 #ifndef DISASM_ONLY
   5731     {
   5732       0x800000007ffc0000ULL,
   5733       0xfffe000000000000ULL,
   5734       0ULL,
   5735       0ULL,
   5736       0ULL
   5737     },
   5738     {
   5739       0x0000000001180000ULL,
   5740       0x084e000000000000ULL,
   5741       -1ULL,
   5742       -1ULL,
   5743       -1ULL
   5744     }
   5745 #endif
   5746   },
   5747   { "shrb.sn", TILEPRO_OPC_SHRB_SN, 0x3, 3, TREG_SN, 1,
   5748     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5749 #ifndef DISASM_ONLY
   5750     {
   5751       0x800000007ffc0000ULL,
   5752       0xfffe000000000000ULL,
   5753       0ULL,
   5754       0ULL,
   5755       0ULL
   5756     },
   5757     {
   5758       0x0000000009180000ULL,
   5759       0x0c4e000000000000ULL,
   5760       -1ULL,
   5761       -1ULL,
   5762       -1ULL
   5763     }
   5764 #endif
   5765   },
   5766   { "shrh", TILEPRO_OPC_SHRH, 0x3, 3, TREG_ZERO, 1,
   5767     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5768 #ifndef DISASM_ONLY
   5769     {
   5770       0x800000007ffc0000ULL,
   5771       0xfffe000000000000ULL,
   5772       0ULL,
   5773       0ULL,
   5774       0ULL
   5775     },
   5776     {
   5777       0x00000000011c0000ULL,
   5778       0x0850000000000000ULL,
   5779       -1ULL,
   5780       -1ULL,
   5781       -1ULL
   5782     }
   5783 #endif
   5784   },
   5785   { "shrh.sn", TILEPRO_OPC_SHRH_SN, 0x3, 3, TREG_SN, 1,
   5786     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5787 #ifndef DISASM_ONLY
   5788     {
   5789       0x800000007ffc0000ULL,
   5790       0xfffe000000000000ULL,
   5791       0ULL,
   5792       0ULL,
   5793       0ULL
   5794     },
   5795     {
   5796       0x00000000091c0000ULL,
   5797       0x0c50000000000000ULL,
   5798       -1ULL,
   5799       -1ULL,
   5800       -1ULL
   5801     }
   5802 #endif
   5803   },
   5804   { "shri", TILEPRO_OPC_SHRI, 0xf, 3, TREG_ZERO, 1,
   5805     { { 9, 10, 32 }, { 7, 8, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } },
   5806 #ifndef DISASM_ONLY
   5807     {
   5808       0x800000007ffe0000ULL,
   5809       0xffff000000000000ULL,
   5810       0x80000000780e0000ULL,
   5811       0xf807000000000000ULL,
   5812       0ULL
   5813     },
   5814     {
   5815       0x00000000700e0000ULL,
   5816       0x4007000000000000ULL,
   5817       0x8000000068060000ULL,
   5818       0xd803000000000000ULL,
   5819       -1ULL
   5820     }
   5821 #endif
   5822   },
   5823   { "shri.sn", TILEPRO_OPC_SHRI_SN, 0x3, 3, TREG_SN, 1,
   5824     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5825 #ifndef DISASM_ONLY
   5826     {
   5827       0x800000007ffe0000ULL,
   5828       0xffff000000000000ULL,
   5829       0ULL,
   5830       0ULL,
   5831       0ULL
   5832     },
   5833     {
   5834       0x00000000780e0000ULL,
   5835       0x4407000000000000ULL,
   5836       -1ULL,
   5837       -1ULL,
   5838       -1ULL
   5839     }
   5840 #endif
   5841   },
   5842   { "shrib", TILEPRO_OPC_SHRIB, 0x3, 3, TREG_ZERO, 1,
   5843     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5844 #ifndef DISASM_ONLY
   5845     {
   5846       0x800000007ffe0000ULL,
   5847       0xffff000000000000ULL,
   5848       0ULL,
   5849       0ULL,
   5850       0ULL
   5851     },
   5852     {
   5853       0x00000000700a0000ULL,
   5854       0x4005000000000000ULL,
   5855       -1ULL,
   5856       -1ULL,
   5857       -1ULL
   5858     }
   5859 #endif
   5860   },
   5861   { "shrib.sn", TILEPRO_OPC_SHRIB_SN, 0x3, 3, TREG_SN, 1,
   5862     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5863 #ifndef DISASM_ONLY
   5864     {
   5865       0x800000007ffe0000ULL,
   5866       0xffff000000000000ULL,
   5867       0ULL,
   5868       0ULL,
   5869       0ULL
   5870     },
   5871     {
   5872       0x00000000780a0000ULL,
   5873       0x4405000000000000ULL,
   5874       -1ULL,
   5875       -1ULL,
   5876       -1ULL
   5877     }
   5878 #endif
   5879   },
   5880   { "shrih", TILEPRO_OPC_SHRIH, 0x3, 3, TREG_ZERO, 1,
   5881     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5882 #ifndef DISASM_ONLY
   5883     {
   5884       0x800000007ffe0000ULL,
   5885       0xffff000000000000ULL,
   5886       0ULL,
   5887       0ULL,
   5888       0ULL
   5889     },
   5890     {
   5891       0x00000000700c0000ULL,
   5892       0x4006000000000000ULL,
   5893       -1ULL,
   5894       -1ULL,
   5895       -1ULL
   5896     }
   5897 #endif
   5898   },
   5899   { "shrih.sn", TILEPRO_OPC_SHRIH_SN, 0x3, 3, TREG_SN, 1,
   5900     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   5901 #ifndef DISASM_ONLY
   5902     {
   5903       0x800000007ffe0000ULL,
   5904       0xffff000000000000ULL,
   5905       0ULL,
   5906       0ULL,
   5907       0ULL
   5908     },
   5909     {
   5910       0x00000000780c0000ULL,
   5911       0x4406000000000000ULL,
   5912       -1ULL,
   5913       -1ULL,
   5914       -1ULL
   5915     }
   5916 #endif
   5917   },
   5918   { "slt", TILEPRO_OPC_SLT, 0xf, 3, TREG_ZERO, 1,
   5919     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   5920 #ifndef DISASM_ONLY
   5921     {
   5922       0x800000007ffc0000ULL,
   5923       0xfffe000000000000ULL,
   5924       0x80000000780c0000ULL,
   5925       0xf806000000000000ULL,
   5926       0ULL
   5927     },
   5928     {
   5929       0x00000000014c0000ULL,
   5930       0x086a000000000000ULL,
   5931       0x8000000028080000ULL,
   5932       0xa804000000000000ULL,
   5933       -1ULL
   5934     }
   5935 #endif
   5936   },
   5937   { "slt.sn", TILEPRO_OPC_SLT_SN, 0x3, 3, TREG_SN, 1,
   5938     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5939 #ifndef DISASM_ONLY
   5940     {
   5941       0x800000007ffc0000ULL,
   5942       0xfffe000000000000ULL,
   5943       0ULL,
   5944       0ULL,
   5945       0ULL
   5946     },
   5947     {
   5948       0x00000000094c0000ULL,
   5949       0x0c6a000000000000ULL,
   5950       -1ULL,
   5951       -1ULL,
   5952       -1ULL
   5953     }
   5954 #endif
   5955   },
   5956   { "slt_u", TILEPRO_OPC_SLT_U, 0xf, 3, TREG_ZERO, 1,
   5957     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   5958 #ifndef DISASM_ONLY
   5959     {
   5960       0x800000007ffc0000ULL,
   5961       0xfffe000000000000ULL,
   5962       0x80000000780c0000ULL,
   5963       0xf806000000000000ULL,
   5964       0ULL
   5965     },
   5966     {
   5967       0x0000000001500000ULL,
   5968       0x086c000000000000ULL,
   5969       0x80000000280c0000ULL,
   5970       0xa806000000000000ULL,
   5971       -1ULL
   5972     }
   5973 #endif
   5974   },
   5975   { "slt_u.sn", TILEPRO_OPC_SLT_U_SN, 0x3, 3, TREG_SN, 1,
   5976     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5977 #ifndef DISASM_ONLY
   5978     {
   5979       0x800000007ffc0000ULL,
   5980       0xfffe000000000000ULL,
   5981       0ULL,
   5982       0ULL,
   5983       0ULL
   5984     },
   5985     {
   5986       0x0000000009500000ULL,
   5987       0x0c6c000000000000ULL,
   5988       -1ULL,
   5989       -1ULL,
   5990       -1ULL
   5991     }
   5992 #endif
   5993   },
   5994   { "sltb", TILEPRO_OPC_SLTB, 0x3, 3, TREG_ZERO, 1,
   5995     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   5996 #ifndef DISASM_ONLY
   5997     {
   5998       0x800000007ffc0000ULL,
   5999       0xfffe000000000000ULL,
   6000       0ULL,
   6001       0ULL,
   6002       0ULL
   6003     },
   6004     {
   6005       0x0000000001240000ULL,
   6006       0x0856000000000000ULL,
   6007       -1ULL,
   6008       -1ULL,
   6009       -1ULL
   6010     }
   6011 #endif
   6012   },
   6013   { "sltb.sn", TILEPRO_OPC_SLTB_SN, 0x3, 3, TREG_SN, 1,
   6014     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6015 #ifndef DISASM_ONLY
   6016     {
   6017       0x800000007ffc0000ULL,
   6018       0xfffe000000000000ULL,
   6019       0ULL,
   6020       0ULL,
   6021       0ULL
   6022     },
   6023     {
   6024       0x0000000009240000ULL,
   6025       0x0c56000000000000ULL,
   6026       -1ULL,
   6027       -1ULL,
   6028       -1ULL
   6029     }
   6030 #endif
   6031   },
   6032   { "sltb_u", TILEPRO_OPC_SLTB_U, 0x3, 3, TREG_ZERO, 1,
   6033     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6034 #ifndef DISASM_ONLY
   6035     {
   6036       0x800000007ffc0000ULL,
   6037       0xfffe000000000000ULL,
   6038       0ULL,
   6039       0ULL,
   6040       0ULL
   6041     },
   6042     {
   6043       0x0000000001280000ULL,
   6044       0x0858000000000000ULL,
   6045       -1ULL,
   6046       -1ULL,
   6047       -1ULL
   6048     }
   6049 #endif
   6050   },
   6051   { "sltb_u.sn", TILEPRO_OPC_SLTB_U_SN, 0x3, 3, TREG_SN, 1,
   6052     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6053 #ifndef DISASM_ONLY
   6054     {
   6055       0x800000007ffc0000ULL,
   6056       0xfffe000000000000ULL,
   6057       0ULL,
   6058       0ULL,
   6059       0ULL
   6060     },
   6061     {
   6062       0x0000000009280000ULL,
   6063       0x0c58000000000000ULL,
   6064       -1ULL,
   6065       -1ULL,
   6066       -1ULL
   6067     }
   6068 #endif
   6069   },
   6070   { "slte", TILEPRO_OPC_SLTE, 0xf, 3, TREG_ZERO, 1,
   6071     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   6072 #ifndef DISASM_ONLY
   6073     {
   6074       0x800000007ffc0000ULL,
   6075       0xfffe000000000000ULL,
   6076       0x80000000780c0000ULL,
   6077       0xf806000000000000ULL,
   6078       0ULL
   6079     },
   6080     {
   6081       0x00000000013c0000ULL,
   6082       0x0862000000000000ULL,
   6083       0x8000000028000000ULL,
   6084       0xa800000000000000ULL,
   6085       -1ULL
   6086     }
   6087 #endif
   6088   },
   6089   { "slte.sn", TILEPRO_OPC_SLTE_SN, 0x3, 3, TREG_SN, 1,
   6090     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6091 #ifndef DISASM_ONLY
   6092     {
   6093       0x800000007ffc0000ULL,
   6094       0xfffe000000000000ULL,
   6095       0ULL,
   6096       0ULL,
   6097       0ULL
   6098     },
   6099     {
   6100       0x00000000093c0000ULL,
   6101       0x0c62000000000000ULL,
   6102       -1ULL,
   6103       -1ULL,
   6104       -1ULL
   6105     }
   6106 #endif
   6107   },
   6108   { "slte_u", TILEPRO_OPC_SLTE_U, 0xf, 3, TREG_ZERO, 1,
   6109     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   6110 #ifndef DISASM_ONLY
   6111     {
   6112       0x800000007ffc0000ULL,
   6113       0xfffe000000000000ULL,
   6114       0x80000000780c0000ULL,
   6115       0xf806000000000000ULL,
   6116       0ULL
   6117     },
   6118     {
   6119       0x0000000001400000ULL,
   6120       0x0864000000000000ULL,
   6121       0x8000000028040000ULL,
   6122       0xa802000000000000ULL,
   6123       -1ULL
   6124     }
   6125 #endif
   6126   },
   6127   { "slte_u.sn", TILEPRO_OPC_SLTE_U_SN, 0x3, 3, TREG_SN, 1,
   6128     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6129 #ifndef DISASM_ONLY
   6130     {
   6131       0x800000007ffc0000ULL,
   6132       0xfffe000000000000ULL,
   6133       0ULL,
   6134       0ULL,
   6135       0ULL
   6136     },
   6137     {
   6138       0x0000000009400000ULL,
   6139       0x0c64000000000000ULL,
   6140       -1ULL,
   6141       -1ULL,
   6142       -1ULL
   6143     }
   6144 #endif
   6145   },
   6146   { "slteb", TILEPRO_OPC_SLTEB, 0x3, 3, TREG_ZERO, 1,
   6147     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6148 #ifndef DISASM_ONLY
   6149     {
   6150       0x800000007ffc0000ULL,
   6151       0xfffe000000000000ULL,
   6152       0ULL,
   6153       0ULL,
   6154       0ULL
   6155     },
   6156     {
   6157       0x00000000012c0000ULL,
   6158       0x085a000000000000ULL,
   6159       -1ULL,
   6160       -1ULL,
   6161       -1ULL
   6162     }
   6163 #endif
   6164   },
   6165   { "slteb.sn", TILEPRO_OPC_SLTEB_SN, 0x3, 3, TREG_SN, 1,
   6166     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6167 #ifndef DISASM_ONLY
   6168     {
   6169       0x800000007ffc0000ULL,
   6170       0xfffe000000000000ULL,
   6171       0ULL,
   6172       0ULL,
   6173       0ULL
   6174     },
   6175     {
   6176       0x00000000092c0000ULL,
   6177       0x0c5a000000000000ULL,
   6178       -1ULL,
   6179       -1ULL,
   6180       -1ULL
   6181     }
   6182 #endif
   6183   },
   6184   { "slteb_u", TILEPRO_OPC_SLTEB_U, 0x3, 3, TREG_ZERO, 1,
   6185     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6186 #ifndef DISASM_ONLY
   6187     {
   6188       0x800000007ffc0000ULL,
   6189       0xfffe000000000000ULL,
   6190       0ULL,
   6191       0ULL,
   6192       0ULL
   6193     },
   6194     {
   6195       0x0000000001300000ULL,
   6196       0x085c000000000000ULL,
   6197       -1ULL,
   6198       -1ULL,
   6199       -1ULL
   6200     }
   6201 #endif
   6202   },
   6203   { "slteb_u.sn", TILEPRO_OPC_SLTEB_U_SN, 0x3, 3, TREG_SN, 1,
   6204     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6205 #ifndef DISASM_ONLY
   6206     {
   6207       0x800000007ffc0000ULL,
   6208       0xfffe000000000000ULL,
   6209       0ULL,
   6210       0ULL,
   6211       0ULL
   6212     },
   6213     {
   6214       0x0000000009300000ULL,
   6215       0x0c5c000000000000ULL,
   6216       -1ULL,
   6217       -1ULL,
   6218       -1ULL
   6219     }
   6220 #endif
   6221   },
   6222   { "slteh", TILEPRO_OPC_SLTEH, 0x3, 3, TREG_ZERO, 1,
   6223     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6224 #ifndef DISASM_ONLY
   6225     {
   6226       0x800000007ffc0000ULL,
   6227       0xfffe000000000000ULL,
   6228       0ULL,
   6229       0ULL,
   6230       0ULL
   6231     },
   6232     {
   6233       0x0000000001340000ULL,
   6234       0x085e000000000000ULL,
   6235       -1ULL,
   6236       -1ULL,
   6237       -1ULL
   6238     }
   6239 #endif
   6240   },
   6241   { "slteh.sn", TILEPRO_OPC_SLTEH_SN, 0x3, 3, TREG_SN, 1,
   6242     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6243 #ifndef DISASM_ONLY
   6244     {
   6245       0x800000007ffc0000ULL,
   6246       0xfffe000000000000ULL,
   6247       0ULL,
   6248       0ULL,
   6249       0ULL
   6250     },
   6251     {
   6252       0x0000000009340000ULL,
   6253       0x0c5e000000000000ULL,
   6254       -1ULL,
   6255       -1ULL,
   6256       -1ULL
   6257     }
   6258 #endif
   6259   },
   6260   { "slteh_u", TILEPRO_OPC_SLTEH_U, 0x3, 3, TREG_ZERO, 1,
   6261     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6262 #ifndef DISASM_ONLY
   6263     {
   6264       0x800000007ffc0000ULL,
   6265       0xfffe000000000000ULL,
   6266       0ULL,
   6267       0ULL,
   6268       0ULL
   6269     },
   6270     {
   6271       0x0000000001380000ULL,
   6272       0x0860000000000000ULL,
   6273       -1ULL,
   6274       -1ULL,
   6275       -1ULL
   6276     }
   6277 #endif
   6278   },
   6279   { "slteh_u.sn", TILEPRO_OPC_SLTEH_U_SN, 0x3, 3, TREG_SN, 1,
   6280     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6281 #ifndef DISASM_ONLY
   6282     {
   6283       0x800000007ffc0000ULL,
   6284       0xfffe000000000000ULL,
   6285       0ULL,
   6286       0ULL,
   6287       0ULL
   6288     },
   6289     {
   6290       0x0000000009380000ULL,
   6291       0x0c60000000000000ULL,
   6292       -1ULL,
   6293       -1ULL,
   6294       -1ULL
   6295     }
   6296 #endif
   6297   },
   6298   { "slth", TILEPRO_OPC_SLTH, 0x3, 3, TREG_ZERO, 1,
   6299     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6300 #ifndef DISASM_ONLY
   6301     {
   6302       0x800000007ffc0000ULL,
   6303       0xfffe000000000000ULL,
   6304       0ULL,
   6305       0ULL,
   6306       0ULL
   6307     },
   6308     {
   6309       0x0000000001440000ULL,
   6310       0x0866000000000000ULL,
   6311       -1ULL,
   6312       -1ULL,
   6313       -1ULL
   6314     }
   6315 #endif
   6316   },
   6317   { "slth.sn", TILEPRO_OPC_SLTH_SN, 0x3, 3, TREG_SN, 1,
   6318     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6319 #ifndef DISASM_ONLY
   6320     {
   6321       0x800000007ffc0000ULL,
   6322       0xfffe000000000000ULL,
   6323       0ULL,
   6324       0ULL,
   6325       0ULL
   6326     },
   6327     {
   6328       0x0000000009440000ULL,
   6329       0x0c66000000000000ULL,
   6330       -1ULL,
   6331       -1ULL,
   6332       -1ULL
   6333     }
   6334 #endif
   6335   },
   6336   { "slth_u", TILEPRO_OPC_SLTH_U, 0x3, 3, TREG_ZERO, 1,
   6337     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6338 #ifndef DISASM_ONLY
   6339     {
   6340       0x800000007ffc0000ULL,
   6341       0xfffe000000000000ULL,
   6342       0ULL,
   6343       0ULL,
   6344       0ULL
   6345     },
   6346     {
   6347       0x0000000001480000ULL,
   6348       0x0868000000000000ULL,
   6349       -1ULL,
   6350       -1ULL,
   6351       -1ULL
   6352     }
   6353 #endif
   6354   },
   6355   { "slth_u.sn", TILEPRO_OPC_SLTH_U_SN, 0x3, 3, TREG_SN, 1,
   6356     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6357 #ifndef DISASM_ONLY
   6358     {
   6359       0x800000007ffc0000ULL,
   6360       0xfffe000000000000ULL,
   6361       0ULL,
   6362       0ULL,
   6363       0ULL
   6364     },
   6365     {
   6366       0x0000000009480000ULL,
   6367       0x0c68000000000000ULL,
   6368       -1ULL,
   6369       -1ULL,
   6370       -1ULL
   6371     }
   6372 #endif
   6373   },
   6374   { "slti", TILEPRO_OPC_SLTI, 0xf, 3, TREG_ZERO, 1,
   6375     { { 9, 10, 0 }, { 7, 8, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
   6376 #ifndef DISASM_ONLY
   6377     {
   6378       0x800000007ff00000ULL,
   6379       0xfff8000000000000ULL,
   6380       0x8000000078000000ULL,
   6381       0xf800000000000000ULL,
   6382       0ULL
   6383     },
   6384     {
   6385       0x0000000041000000ULL,
   6386       0x3098000000000000ULL,
   6387       0x8000000070000000ULL,
   6388       0xe000000000000000ULL,
   6389       -1ULL
   6390     }
   6391 #endif
   6392   },
   6393   { "slti.sn", TILEPRO_OPC_SLTI_SN, 0x3, 3, TREG_SN, 1,
   6394     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6395 #ifndef DISASM_ONLY
   6396     {
   6397       0x800000007ff00000ULL,
   6398       0xfff8000000000000ULL,
   6399       0ULL,
   6400       0ULL,
   6401       0ULL
   6402     },
   6403     {
   6404       0x0000000049000000ULL,
   6405       0x3498000000000000ULL,
   6406       -1ULL,
   6407       -1ULL,
   6408       -1ULL
   6409     }
   6410 #endif
   6411   },
   6412   { "slti_u", TILEPRO_OPC_SLTI_U, 0xf, 3, TREG_ZERO, 1,
   6413     { { 9, 10, 0 }, { 7, 8, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
   6414 #ifndef DISASM_ONLY
   6415     {
   6416       0x800000007ff00000ULL,
   6417       0xfff8000000000000ULL,
   6418       0x8000000078000000ULL,
   6419       0xf800000000000000ULL,
   6420       0ULL
   6421     },
   6422     {
   6423       0x0000000041100000ULL,
   6424       0x30a0000000000000ULL,
   6425       0x8000000078000000ULL,
   6426       0xe800000000000000ULL,
   6427       -1ULL
   6428     }
   6429 #endif
   6430   },
   6431   { "slti_u.sn", TILEPRO_OPC_SLTI_U_SN, 0x3, 3, TREG_SN, 1,
   6432     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6433 #ifndef DISASM_ONLY
   6434     {
   6435       0x800000007ff00000ULL,
   6436       0xfff8000000000000ULL,
   6437       0ULL,
   6438       0ULL,
   6439       0ULL
   6440     },
   6441     {
   6442       0x0000000049100000ULL,
   6443       0x34a0000000000000ULL,
   6444       -1ULL,
   6445       -1ULL,
   6446       -1ULL
   6447     }
   6448 #endif
   6449   },
   6450   { "sltib", TILEPRO_OPC_SLTIB, 0x3, 3, TREG_ZERO, 1,
   6451     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6452 #ifndef DISASM_ONLY
   6453     {
   6454       0x800000007ff00000ULL,
   6455       0xfff8000000000000ULL,
   6456       0ULL,
   6457       0ULL,
   6458       0ULL
   6459     },
   6460     {
   6461       0x0000000040c00000ULL,
   6462       0x3078000000000000ULL,
   6463       -1ULL,
   6464       -1ULL,
   6465       -1ULL
   6466     }
   6467 #endif
   6468   },
   6469   { "sltib.sn", TILEPRO_OPC_SLTIB_SN, 0x3, 3, TREG_SN, 1,
   6470     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6471 #ifndef DISASM_ONLY
   6472     {
   6473       0x800000007ff00000ULL,
   6474       0xfff8000000000000ULL,
   6475       0ULL,
   6476       0ULL,
   6477       0ULL
   6478     },
   6479     {
   6480       0x0000000048c00000ULL,
   6481       0x3478000000000000ULL,
   6482       -1ULL,
   6483       -1ULL,
   6484       -1ULL
   6485     }
   6486 #endif
   6487   },
   6488   { "sltib_u", TILEPRO_OPC_SLTIB_U, 0x3, 3, TREG_ZERO, 1,
   6489     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6490 #ifndef DISASM_ONLY
   6491     {
   6492       0x800000007ff00000ULL,
   6493       0xfff8000000000000ULL,
   6494       0ULL,
   6495       0ULL,
   6496       0ULL
   6497     },
   6498     {
   6499       0x0000000040d00000ULL,
   6500       0x3080000000000000ULL,
   6501       -1ULL,
   6502       -1ULL,
   6503       -1ULL
   6504     }
   6505 #endif
   6506   },
   6507   { "sltib_u.sn", TILEPRO_OPC_SLTIB_U_SN, 0x3, 3, TREG_SN, 1,
   6508     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6509 #ifndef DISASM_ONLY
   6510     {
   6511       0x800000007ff00000ULL,
   6512       0xfff8000000000000ULL,
   6513       0ULL,
   6514       0ULL,
   6515       0ULL
   6516     },
   6517     {
   6518       0x0000000048d00000ULL,
   6519       0x3480000000000000ULL,
   6520       -1ULL,
   6521       -1ULL,
   6522       -1ULL
   6523     }
   6524 #endif
   6525   },
   6526   { "sltih", TILEPRO_OPC_SLTIH, 0x3, 3, TREG_ZERO, 1,
   6527     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6528 #ifndef DISASM_ONLY
   6529     {
   6530       0x800000007ff00000ULL,
   6531       0xfff8000000000000ULL,
   6532       0ULL,
   6533       0ULL,
   6534       0ULL
   6535     },
   6536     {
   6537       0x0000000040e00000ULL,
   6538       0x3088000000000000ULL,
   6539       -1ULL,
   6540       -1ULL,
   6541       -1ULL
   6542     }
   6543 #endif
   6544   },
   6545   { "sltih.sn", TILEPRO_OPC_SLTIH_SN, 0x3, 3, TREG_SN, 1,
   6546     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6547 #ifndef DISASM_ONLY
   6548     {
   6549       0x800000007ff00000ULL,
   6550       0xfff8000000000000ULL,
   6551       0ULL,
   6552       0ULL,
   6553       0ULL
   6554     },
   6555     {
   6556       0x0000000048e00000ULL,
   6557       0x3488000000000000ULL,
   6558       -1ULL,
   6559       -1ULL,
   6560       -1ULL
   6561     }
   6562 #endif
   6563   },
   6564   { "sltih_u", TILEPRO_OPC_SLTIH_U, 0x3, 3, TREG_ZERO, 1,
   6565     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6566 #ifndef DISASM_ONLY
   6567     {
   6568       0x800000007ff00000ULL,
   6569       0xfff8000000000000ULL,
   6570       0ULL,
   6571       0ULL,
   6572       0ULL
   6573     },
   6574     {
   6575       0x0000000040f00000ULL,
   6576       0x3090000000000000ULL,
   6577       -1ULL,
   6578       -1ULL,
   6579       -1ULL
   6580     }
   6581 #endif
   6582   },
   6583   { "sltih_u.sn", TILEPRO_OPC_SLTIH_U_SN, 0x3, 3, TREG_SN, 1,
   6584     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   6585 #ifndef DISASM_ONLY
   6586     {
   6587       0x800000007ff00000ULL,
   6588       0xfff8000000000000ULL,
   6589       0ULL,
   6590       0ULL,
   6591       0ULL
   6592     },
   6593     {
   6594       0x0000000048f00000ULL,
   6595       0x3490000000000000ULL,
   6596       -1ULL,
   6597       -1ULL,
   6598       -1ULL
   6599     }
   6600 #endif
   6601   },
   6602   { "sne", TILEPRO_OPC_SNE, 0xf, 3, TREG_ZERO, 1,
   6603     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   6604 #ifndef DISASM_ONLY
   6605     {
   6606       0x800000007ffc0000ULL,
   6607       0xfffe000000000000ULL,
   6608       0x80000000780c0000ULL,
   6609       0xf806000000000000ULL,
   6610       0ULL
   6611     },
   6612     {
   6613       0x00000000015c0000ULL,
   6614       0x0872000000000000ULL,
   6615       0x80000000300c0000ULL,
   6616       0xb006000000000000ULL,
   6617       -1ULL
   6618     }
   6619 #endif
   6620   },
   6621   { "sne.sn", TILEPRO_OPC_SNE_SN, 0x3, 3, TREG_SN, 1,
   6622     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6623 #ifndef DISASM_ONLY
   6624     {
   6625       0x800000007ffc0000ULL,
   6626       0xfffe000000000000ULL,
   6627       0ULL,
   6628       0ULL,
   6629       0ULL
   6630     },
   6631     {
   6632       0x00000000095c0000ULL,
   6633       0x0c72000000000000ULL,
   6634       -1ULL,
   6635       -1ULL,
   6636       -1ULL
   6637     }
   6638 #endif
   6639   },
   6640   { "sneb", TILEPRO_OPC_SNEB, 0x3, 3, TREG_ZERO, 1,
   6641     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6642 #ifndef DISASM_ONLY
   6643     {
   6644       0x800000007ffc0000ULL,
   6645       0xfffe000000000000ULL,
   6646       0ULL,
   6647       0ULL,
   6648       0ULL
   6649     },
   6650     {
   6651       0x0000000001540000ULL,
   6652       0x086e000000000000ULL,
   6653       -1ULL,
   6654       -1ULL,
   6655       -1ULL
   6656     }
   6657 #endif
   6658   },
   6659   { "sneb.sn", TILEPRO_OPC_SNEB_SN, 0x3, 3, TREG_SN, 1,
   6660     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6661 #ifndef DISASM_ONLY
   6662     {
   6663       0x800000007ffc0000ULL,
   6664       0xfffe000000000000ULL,
   6665       0ULL,
   6666       0ULL,
   6667       0ULL
   6668     },
   6669     {
   6670       0x0000000009540000ULL,
   6671       0x0c6e000000000000ULL,
   6672       -1ULL,
   6673       -1ULL,
   6674       -1ULL
   6675     }
   6676 #endif
   6677   },
   6678   { "sneh", TILEPRO_OPC_SNEH, 0x3, 3, TREG_ZERO, 1,
   6679     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6680 #ifndef DISASM_ONLY
   6681     {
   6682       0x800000007ffc0000ULL,
   6683       0xfffe000000000000ULL,
   6684       0ULL,
   6685       0ULL,
   6686       0ULL
   6687     },
   6688     {
   6689       0x0000000001580000ULL,
   6690       0x0870000000000000ULL,
   6691       -1ULL,
   6692       -1ULL,
   6693       -1ULL
   6694     }
   6695 #endif
   6696   },
   6697   { "sneh.sn", TILEPRO_OPC_SNEH_SN, 0x3, 3, TREG_SN, 1,
   6698     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6699 #ifndef DISASM_ONLY
   6700     {
   6701       0x800000007ffc0000ULL,
   6702       0xfffe000000000000ULL,
   6703       0ULL,
   6704       0ULL,
   6705       0ULL
   6706     },
   6707     {
   6708       0x0000000009580000ULL,
   6709       0x0c70000000000000ULL,
   6710       -1ULL,
   6711       -1ULL,
   6712       -1ULL
   6713     }
   6714 #endif
   6715   },
   6716   { "sra", TILEPRO_OPC_SRA, 0xf, 3, TREG_ZERO, 1,
   6717     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   6718 #ifndef DISASM_ONLY
   6719     {
   6720       0x800000007ffc0000ULL,
   6721       0xfffe000000000000ULL,
   6722       0x80000000780c0000ULL,
   6723       0xf806000000000000ULL,
   6724       0ULL
   6725     },
   6726     {
   6727       0x0000000001680000ULL,
   6728       0x0878000000000000ULL,
   6729       0x80000000200c0000ULL,
   6730       0xa006000000000000ULL,
   6731       -1ULL
   6732     }
   6733 #endif
   6734   },
   6735   { "sra.sn", TILEPRO_OPC_SRA_SN, 0x3, 3, TREG_SN, 1,
   6736     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6737 #ifndef DISASM_ONLY
   6738     {
   6739       0x800000007ffc0000ULL,
   6740       0xfffe000000000000ULL,
   6741       0ULL,
   6742       0ULL,
   6743       0ULL
   6744     },
   6745     {
   6746       0x0000000009680000ULL,
   6747       0x0c78000000000000ULL,
   6748       -1ULL,
   6749       -1ULL,
   6750       -1ULL
   6751     }
   6752 #endif
   6753   },
   6754   { "srab", TILEPRO_OPC_SRAB, 0x3, 3, TREG_ZERO, 1,
   6755     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6756 #ifndef DISASM_ONLY
   6757     {
   6758       0x800000007ffc0000ULL,
   6759       0xfffe000000000000ULL,
   6760       0ULL,
   6761       0ULL,
   6762       0ULL
   6763     },
   6764     {
   6765       0x0000000001600000ULL,
   6766       0x0874000000000000ULL,
   6767       -1ULL,
   6768       -1ULL,
   6769       -1ULL
   6770     }
   6771 #endif
   6772   },
   6773   { "srab.sn", TILEPRO_OPC_SRAB_SN, 0x3, 3, TREG_SN, 1,
   6774     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6775 #ifndef DISASM_ONLY
   6776     {
   6777       0x800000007ffc0000ULL,
   6778       0xfffe000000000000ULL,
   6779       0ULL,
   6780       0ULL,
   6781       0ULL
   6782     },
   6783     {
   6784       0x0000000009600000ULL,
   6785       0x0c74000000000000ULL,
   6786       -1ULL,
   6787       -1ULL,
   6788       -1ULL
   6789     }
   6790 #endif
   6791   },
   6792   { "srah", TILEPRO_OPC_SRAH, 0x3, 3, TREG_ZERO, 1,
   6793     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6794 #ifndef DISASM_ONLY
   6795     {
   6796       0x800000007ffc0000ULL,
   6797       0xfffe000000000000ULL,
   6798       0ULL,
   6799       0ULL,
   6800       0ULL
   6801     },
   6802     {
   6803       0x0000000001640000ULL,
   6804       0x0876000000000000ULL,
   6805       -1ULL,
   6806       -1ULL,
   6807       -1ULL
   6808     }
   6809 #endif
   6810   },
   6811   { "srah.sn", TILEPRO_OPC_SRAH_SN, 0x3, 3, TREG_SN, 1,
   6812     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6813 #ifndef DISASM_ONLY
   6814     {
   6815       0x800000007ffc0000ULL,
   6816       0xfffe000000000000ULL,
   6817       0ULL,
   6818       0ULL,
   6819       0ULL
   6820     },
   6821     {
   6822       0x0000000009640000ULL,
   6823       0x0c76000000000000ULL,
   6824       -1ULL,
   6825       -1ULL,
   6826       -1ULL
   6827     }
   6828 #endif
   6829   },
   6830   { "srai", TILEPRO_OPC_SRAI, 0xf, 3, TREG_ZERO, 1,
   6831     { { 9, 10, 32 }, { 7, 8, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } },
   6832 #ifndef DISASM_ONLY
   6833     {
   6834       0x800000007ffe0000ULL,
   6835       0xffff000000000000ULL,
   6836       0x80000000780e0000ULL,
   6837       0xf807000000000000ULL,
   6838       0ULL
   6839     },
   6840     {
   6841       0x0000000070140000ULL,
   6842       0x400a000000000000ULL,
   6843       0x8000000068080000ULL,
   6844       0xd804000000000000ULL,
   6845       -1ULL
   6846     }
   6847 #endif
   6848   },
   6849   { "srai.sn", TILEPRO_OPC_SRAI_SN, 0x3, 3, TREG_SN, 1,
   6850     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   6851 #ifndef DISASM_ONLY
   6852     {
   6853       0x800000007ffe0000ULL,
   6854       0xffff000000000000ULL,
   6855       0ULL,
   6856       0ULL,
   6857       0ULL
   6858     },
   6859     {
   6860       0x0000000078140000ULL,
   6861       0x440a000000000000ULL,
   6862       -1ULL,
   6863       -1ULL,
   6864       -1ULL
   6865     }
   6866 #endif
   6867   },
   6868   { "sraib", TILEPRO_OPC_SRAIB, 0x3, 3, TREG_ZERO, 1,
   6869     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   6870 #ifndef DISASM_ONLY
   6871     {
   6872       0x800000007ffe0000ULL,
   6873       0xffff000000000000ULL,
   6874       0ULL,
   6875       0ULL,
   6876       0ULL
   6877     },
   6878     {
   6879       0x0000000070100000ULL,
   6880       0x4008000000000000ULL,
   6881       -1ULL,
   6882       -1ULL,
   6883       -1ULL
   6884     }
   6885 #endif
   6886   },
   6887   { "sraib.sn", TILEPRO_OPC_SRAIB_SN, 0x3, 3, TREG_SN, 1,
   6888     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   6889 #ifndef DISASM_ONLY
   6890     {
   6891       0x800000007ffe0000ULL,
   6892       0xffff000000000000ULL,
   6893       0ULL,
   6894       0ULL,
   6895       0ULL
   6896     },
   6897     {
   6898       0x0000000078100000ULL,
   6899       0x4408000000000000ULL,
   6900       -1ULL,
   6901       -1ULL,
   6902       -1ULL
   6903     }
   6904 #endif
   6905   },
   6906   { "sraih", TILEPRO_OPC_SRAIH, 0x3, 3, TREG_ZERO, 1,
   6907     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   6908 #ifndef DISASM_ONLY
   6909     {
   6910       0x800000007ffe0000ULL,
   6911       0xffff000000000000ULL,
   6912       0ULL,
   6913       0ULL,
   6914       0ULL
   6915     },
   6916     {
   6917       0x0000000070120000ULL,
   6918       0x4009000000000000ULL,
   6919       -1ULL,
   6920       -1ULL,
   6921       -1ULL
   6922     }
   6923 #endif
   6924   },
   6925   { "sraih.sn", TILEPRO_OPC_SRAIH_SN, 0x3, 3, TREG_SN, 1,
   6926     { { 9, 10, 32 }, { 7, 8, 33 }, { 0, }, { 0, }, { 0, } },
   6927 #ifndef DISASM_ONLY
   6928     {
   6929       0x800000007ffe0000ULL,
   6930       0xffff000000000000ULL,
   6931       0ULL,
   6932       0ULL,
   6933       0ULL
   6934     },
   6935     {
   6936       0x0000000078120000ULL,
   6937       0x4409000000000000ULL,
   6938       -1ULL,
   6939       -1ULL,
   6940       -1ULL
   6941     }
   6942 #endif
   6943   },
   6944   { "sub", TILEPRO_OPC_SUB, 0xf, 3, TREG_ZERO, 1,
   6945     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   6946 #ifndef DISASM_ONLY
   6947     {
   6948       0x800000007ffc0000ULL,
   6949       0xfffe000000000000ULL,
   6950       0x80000000780c0000ULL,
   6951       0xf806000000000000ULL,
   6952       0ULL
   6953     },
   6954     {
   6955       0x0000000001740000ULL,
   6956       0x087e000000000000ULL,
   6957       0x80000000080c0000ULL,
   6958       0x8806000000000000ULL,
   6959       -1ULL
   6960     }
   6961 #endif
   6962   },
   6963   { "sub.sn", TILEPRO_OPC_SUB_SN, 0x3, 3, TREG_SN, 1,
   6964     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6965 #ifndef DISASM_ONLY
   6966     {
   6967       0x800000007ffc0000ULL,
   6968       0xfffe000000000000ULL,
   6969       0ULL,
   6970       0ULL,
   6971       0ULL
   6972     },
   6973     {
   6974       0x0000000009740000ULL,
   6975       0x0c7e000000000000ULL,
   6976       -1ULL,
   6977       -1ULL,
   6978       -1ULL
   6979     }
   6980 #endif
   6981   },
   6982   { "subb", TILEPRO_OPC_SUBB, 0x3, 3, TREG_ZERO, 1,
   6983     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   6984 #ifndef DISASM_ONLY
   6985     {
   6986       0x800000007ffc0000ULL,
   6987       0xfffe000000000000ULL,
   6988       0ULL,
   6989       0ULL,
   6990       0ULL
   6991     },
   6992     {
   6993       0x00000000016c0000ULL,
   6994       0x087a000000000000ULL,
   6995       -1ULL,
   6996       -1ULL,
   6997       -1ULL
   6998     }
   6999 #endif
   7000   },
   7001   { "subb.sn", TILEPRO_OPC_SUBB_SN, 0x3, 3, TREG_SN, 1,
   7002     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7003 #ifndef DISASM_ONLY
   7004     {
   7005       0x800000007ffc0000ULL,
   7006       0xfffe000000000000ULL,
   7007       0ULL,
   7008       0ULL,
   7009       0ULL
   7010     },
   7011     {
   7012       0x00000000096c0000ULL,
   7013       0x0c7a000000000000ULL,
   7014       -1ULL,
   7015       -1ULL,
   7016       -1ULL
   7017     }
   7018 #endif
   7019   },
   7020   { "subbs_u", TILEPRO_OPC_SUBBS_U, 0x3, 3, TREG_ZERO, 1,
   7021     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7022 #ifndef DISASM_ONLY
   7023     {
   7024       0x800000007ffc0000ULL,
   7025       0xfffe000000000000ULL,
   7026       0ULL,
   7027       0ULL,
   7028       0ULL
   7029     },
   7030     {
   7031       0x0000000001900000ULL,
   7032       0x088c000000000000ULL,
   7033       -1ULL,
   7034       -1ULL,
   7035       -1ULL
   7036     }
   7037 #endif
   7038   },
   7039   { "subbs_u.sn", TILEPRO_OPC_SUBBS_U_SN, 0x3, 3, TREG_SN, 1,
   7040     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7041 #ifndef DISASM_ONLY
   7042     {
   7043       0x800000007ffc0000ULL,
   7044       0xfffe000000000000ULL,
   7045       0ULL,
   7046       0ULL,
   7047       0ULL
   7048     },
   7049     {
   7050       0x0000000009900000ULL,
   7051       0x0c8c000000000000ULL,
   7052       -1ULL,
   7053       -1ULL,
   7054       -1ULL
   7055     }
   7056 #endif
   7057   },
   7058   { "subh", TILEPRO_OPC_SUBH, 0x3, 3, TREG_ZERO, 1,
   7059     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7060 #ifndef DISASM_ONLY
   7061     {
   7062       0x800000007ffc0000ULL,
   7063       0xfffe000000000000ULL,
   7064       0ULL,
   7065       0ULL,
   7066       0ULL
   7067     },
   7068     {
   7069       0x0000000001700000ULL,
   7070       0x087c000000000000ULL,
   7071       -1ULL,
   7072       -1ULL,
   7073       -1ULL
   7074     }
   7075 #endif
   7076   },
   7077   { "subh.sn", TILEPRO_OPC_SUBH_SN, 0x3, 3, TREG_SN, 1,
   7078     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7079 #ifndef DISASM_ONLY
   7080     {
   7081       0x800000007ffc0000ULL,
   7082       0xfffe000000000000ULL,
   7083       0ULL,
   7084       0ULL,
   7085       0ULL
   7086     },
   7087     {
   7088       0x0000000009700000ULL,
   7089       0x0c7c000000000000ULL,
   7090       -1ULL,
   7091       -1ULL,
   7092       -1ULL
   7093     }
   7094 #endif
   7095   },
   7096   { "subhs", TILEPRO_OPC_SUBHS, 0x3, 3, TREG_ZERO, 1,
   7097     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7098 #ifndef DISASM_ONLY
   7099     {
   7100       0x800000007ffc0000ULL,
   7101       0xfffe000000000000ULL,
   7102       0ULL,
   7103       0ULL,
   7104       0ULL
   7105     },
   7106     {
   7107       0x0000000001940000ULL,
   7108       0x088e000000000000ULL,
   7109       -1ULL,
   7110       -1ULL,
   7111       -1ULL
   7112     }
   7113 #endif
   7114   },
   7115   { "subhs.sn", TILEPRO_OPC_SUBHS_SN, 0x3, 3, TREG_SN, 1,
   7116     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7117 #ifndef DISASM_ONLY
   7118     {
   7119       0x800000007ffc0000ULL,
   7120       0xfffe000000000000ULL,
   7121       0ULL,
   7122       0ULL,
   7123       0ULL
   7124     },
   7125     {
   7126       0x0000000009940000ULL,
   7127       0x0c8e000000000000ULL,
   7128       -1ULL,
   7129       -1ULL,
   7130       -1ULL
   7131     }
   7132 #endif
   7133   },
   7134   { "subs", TILEPRO_OPC_SUBS, 0x3, 3, TREG_ZERO, 1,
   7135     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7136 #ifndef DISASM_ONLY
   7137     {
   7138       0x800000007ffc0000ULL,
   7139       0xfffe000000000000ULL,
   7140       0ULL,
   7141       0ULL,
   7142       0ULL
   7143     },
   7144     {
   7145       0x0000000001840000ULL,
   7146       0x0886000000000000ULL,
   7147       -1ULL,
   7148       -1ULL,
   7149       -1ULL
   7150     }
   7151 #endif
   7152   },
   7153   { "subs.sn", TILEPRO_OPC_SUBS_SN, 0x3, 3, TREG_SN, 1,
   7154     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7155 #ifndef DISASM_ONLY
   7156     {
   7157       0x800000007ffc0000ULL,
   7158       0xfffe000000000000ULL,
   7159       0ULL,
   7160       0ULL,
   7161       0ULL
   7162     },
   7163     {
   7164       0x0000000009840000ULL,
   7165       0x0c86000000000000ULL,
   7166       -1ULL,
   7167       -1ULL,
   7168       -1ULL
   7169     }
   7170 #endif
   7171   },
   7172   { "sw", TILEPRO_OPC_SW, 0x12, 2, TREG_ZERO, 1,
   7173     { { 0, }, { 8, 17 }, { 0, }, { 0, }, { 15, 36 } },
   7174 #ifndef DISASM_ONLY
   7175     {
   7176       0ULL,
   7177       0xfbfe000000000000ULL,
   7178       0ULL,
   7179       0ULL,
   7180       0x8700000000000000ULL
   7181     },
   7182     {
   7183       -1ULL,
   7184       0x0880000000000000ULL,
   7185       -1ULL,
   7186       -1ULL,
   7187       0x8700000000000000ULL
   7188     }
   7189 #endif
   7190   },
   7191   { "swadd", TILEPRO_OPC_SWADD, 0x2, 3, TREG_ZERO, 1,
   7192     { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } },
   7193 #ifndef DISASM_ONLY
   7194     {
   7195       0ULL,
   7196       0xfbf8000000000000ULL,
   7197       0ULL,
   7198       0ULL,
   7199       0ULL
   7200     },
   7201     {
   7202       -1ULL,
   7203       0x30f0000000000000ULL,
   7204       -1ULL,
   7205       -1ULL,
   7206       -1ULL
   7207     }
   7208 #endif
   7209   },
   7210   { "swint0", TILEPRO_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0,
   7211     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   7212 #ifndef DISASM_ONLY
   7213     {
   7214       0ULL,
   7215       0xfbfff80000000000ULL,
   7216       0ULL,
   7217       0ULL,
   7218       0ULL
   7219     },
   7220     {
   7221       -1ULL,
   7222       0x400b900000000000ULL,
   7223       -1ULL,
   7224       -1ULL,
   7225       -1ULL
   7226     }
   7227 #endif
   7228   },
   7229   { "swint1", TILEPRO_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0,
   7230     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   7231 #ifndef DISASM_ONLY
   7232     {
   7233       0ULL,
   7234       0xfbfff80000000000ULL,
   7235       0ULL,
   7236       0ULL,
   7237       0ULL
   7238     },
   7239     {
   7240       -1ULL,
   7241       0x400b980000000000ULL,
   7242       -1ULL,
   7243       -1ULL,
   7244       -1ULL
   7245     }
   7246 #endif
   7247   },
   7248   { "swint2", TILEPRO_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0,
   7249     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   7250 #ifndef DISASM_ONLY
   7251     {
   7252       0ULL,
   7253       0xfbfff80000000000ULL,
   7254       0ULL,
   7255       0ULL,
   7256       0ULL
   7257     },
   7258     {
   7259       -1ULL,
   7260       0x400ba00000000000ULL,
   7261       -1ULL,
   7262       -1ULL,
   7263       -1ULL
   7264     }
   7265 #endif
   7266   },
   7267   { "swint3", TILEPRO_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0,
   7268     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   7269 #ifndef DISASM_ONLY
   7270     {
   7271       0ULL,
   7272       0xfbfff80000000000ULL,
   7273       0ULL,
   7274       0ULL,
   7275       0ULL
   7276     },
   7277     {
   7278       -1ULL,
   7279       0x400ba80000000000ULL,
   7280       -1ULL,
   7281       -1ULL,
   7282       -1ULL
   7283     }
   7284 #endif
   7285   },
   7286   { "tblidxb0", TILEPRO_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1,
   7287     { { 21, 10 }, { 0, }, { 31, 12 }, { 0, }, { 0, } },
   7288 #ifndef DISASM_ONLY
   7289     {
   7290       0x800000007ffff000ULL,
   7291       0ULL,
   7292       0x80000000780ff000ULL,
   7293       0ULL,
   7294       0ULL
   7295     },
   7296     {
   7297       0x0000000070168000ULL,
   7298       -1ULL,
   7299       0x80000000680a8000ULL,
   7300       -1ULL,
   7301       -1ULL
   7302     }
   7303 #endif
   7304   },
   7305   { "tblidxb0.sn", TILEPRO_OPC_TBLIDXB0_SN, 0x1, 2, TREG_SN, 1,
   7306     { { 21, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   7307 #ifndef DISASM_ONLY
   7308     {
   7309       0x800000007ffff000ULL,
   7310       0ULL,
   7311       0ULL,
   7312       0ULL,
   7313       0ULL
   7314     },
   7315     {
   7316       0x0000000078168000ULL,
   7317       -1ULL,
   7318       -1ULL,
   7319       -1ULL,
   7320       -1ULL
   7321     }
   7322 #endif
   7323   },
   7324   { "tblidxb1", TILEPRO_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1,
   7325     { { 21, 10 }, { 0, }, { 31, 12 }, { 0, }, { 0, } },
   7326 #ifndef DISASM_ONLY
   7327     {
   7328       0x800000007ffff000ULL,
   7329       0ULL,
   7330       0x80000000780ff000ULL,
   7331       0ULL,
   7332       0ULL
   7333     },
   7334     {
   7335       0x0000000070169000ULL,
   7336       -1ULL,
   7337       0x80000000680a9000ULL,
   7338       -1ULL,
   7339       -1ULL
   7340     }
   7341 #endif
   7342   },
   7343   { "tblidxb1.sn", TILEPRO_OPC_TBLIDXB1_SN, 0x1, 2, TREG_SN, 1,
   7344     { { 21, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   7345 #ifndef DISASM_ONLY
   7346     {
   7347       0x800000007ffff000ULL,
   7348       0ULL,
   7349       0ULL,
   7350       0ULL,
   7351       0ULL
   7352     },
   7353     {
   7354       0x0000000078169000ULL,
   7355       -1ULL,
   7356       -1ULL,
   7357       -1ULL,
   7358       -1ULL
   7359     }
   7360 #endif
   7361   },
   7362   { "tblidxb2", TILEPRO_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1,
   7363     { { 21, 10 }, { 0, }, { 31, 12 }, { 0, }, { 0, } },
   7364 #ifndef DISASM_ONLY
   7365     {
   7366       0x800000007ffff000ULL,
   7367       0ULL,
   7368       0x80000000780ff000ULL,
   7369       0ULL,
   7370       0ULL
   7371     },
   7372     {
   7373       0x000000007016a000ULL,
   7374       -1ULL,
   7375       0x80000000680aa000ULL,
   7376       -1ULL,
   7377       -1ULL
   7378     }
   7379 #endif
   7380   },
   7381   { "tblidxb2.sn", TILEPRO_OPC_TBLIDXB2_SN, 0x1, 2, TREG_SN, 1,
   7382     { { 21, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   7383 #ifndef DISASM_ONLY
   7384     {
   7385       0x800000007ffff000ULL,
   7386       0ULL,
   7387       0ULL,
   7388       0ULL,
   7389       0ULL
   7390     },
   7391     {
   7392       0x000000007816a000ULL,
   7393       -1ULL,
   7394       -1ULL,
   7395       -1ULL,
   7396       -1ULL
   7397     }
   7398 #endif
   7399   },
   7400   { "tblidxb3", TILEPRO_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1,
   7401     { { 21, 10 }, { 0, }, { 31, 12 }, { 0, }, { 0, } },
   7402 #ifndef DISASM_ONLY
   7403     {
   7404       0x800000007ffff000ULL,
   7405       0ULL,
   7406       0x80000000780ff000ULL,
   7407       0ULL,
   7408       0ULL
   7409     },
   7410     {
   7411       0x000000007016b000ULL,
   7412       -1ULL,
   7413       0x80000000680ab000ULL,
   7414       -1ULL,
   7415       -1ULL
   7416     }
   7417 #endif
   7418   },
   7419   { "tblidxb3.sn", TILEPRO_OPC_TBLIDXB3_SN, 0x1, 2, TREG_SN, 1,
   7420     { { 21, 10 }, { 0, }, { 0, }, { 0, }, { 0, } },
   7421 #ifndef DISASM_ONLY
   7422     {
   7423       0x800000007ffff000ULL,
   7424       0ULL,
   7425       0ULL,
   7426       0ULL,
   7427       0ULL
   7428     },
   7429     {
   7430       0x000000007816b000ULL,
   7431       -1ULL,
   7432       -1ULL,
   7433       -1ULL,
   7434       -1ULL
   7435     }
   7436 #endif
   7437   },
   7438   { "tns", TILEPRO_OPC_TNS, 0x2, 2, TREG_ZERO, 1,
   7439     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   7440 #ifndef DISASM_ONLY
   7441     {
   7442       0ULL,
   7443       0xfffff80000000000ULL,
   7444       0ULL,
   7445       0ULL,
   7446       0ULL
   7447     },
   7448     {
   7449       -1ULL,
   7450       0x400bb00000000000ULL,
   7451       -1ULL,
   7452       -1ULL,
   7453       -1ULL
   7454     }
   7455 #endif
   7456   },
   7457   { "tns.sn", TILEPRO_OPC_TNS_SN, 0x2, 2, TREG_SN, 1,
   7458     { { 0, }, { 7, 8 }, { 0, }, { 0, }, { 0, } },
   7459 #ifndef DISASM_ONLY
   7460     {
   7461       0ULL,
   7462       0xfffff80000000000ULL,
   7463       0ULL,
   7464       0ULL,
   7465       0ULL
   7466     },
   7467     {
   7468       -1ULL,
   7469       0x440bb00000000000ULL,
   7470       -1ULL,
   7471       -1ULL,
   7472       -1ULL
   7473     }
   7474 #endif
   7475   },
   7476   { "wh64", TILEPRO_OPC_WH64, 0x2, 1, TREG_ZERO, 1,
   7477     { { 0, }, { 8 }, { 0, }, { 0, }, { 0, } },
   7478 #ifndef DISASM_ONLY
   7479     {
   7480       0ULL,
   7481       0xfbfff80000000000ULL,
   7482       0ULL,
   7483       0ULL,
   7484       0ULL
   7485     },
   7486     {
   7487       -1ULL,
   7488       0x400bb80000000000ULL,
   7489       -1ULL,
   7490       -1ULL,
   7491       -1ULL
   7492     }
   7493 #endif
   7494   },
   7495   { "xor", TILEPRO_OPC_XOR, 0xf, 3, TREG_ZERO, 1,
   7496     { { 9, 10, 16 }, { 7, 8, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   7497 #ifndef DISASM_ONLY
   7498     {
   7499       0x800000007ffc0000ULL,
   7500       0xfffe000000000000ULL,
   7501       0x80000000780c0000ULL,
   7502       0xf806000000000000ULL,
   7503       0ULL
   7504     },
   7505     {
   7506       0x0000000001780000ULL,
   7507       0x0882000000000000ULL,
   7508       0x80000000180c0000ULL,
   7509       0x9806000000000000ULL,
   7510       -1ULL
   7511     }
   7512 #endif
   7513   },
   7514   { "xor.sn", TILEPRO_OPC_XOR_SN, 0x3, 3, TREG_SN, 1,
   7515     { { 9, 10, 16 }, { 7, 8, 17 }, { 0, }, { 0, }, { 0, } },
   7516 #ifndef DISASM_ONLY
   7517     {
   7518       0x800000007ffc0000ULL,
   7519       0xfffe000000000000ULL,
   7520       0ULL,
   7521       0ULL,
   7522       0ULL
   7523     },
   7524     {
   7525       0x0000000009780000ULL,
   7526       0x0c82000000000000ULL,
   7527       -1ULL,
   7528       -1ULL,
   7529       -1ULL
   7530     }
   7531 #endif
   7532   },
   7533   { "xori", TILEPRO_OPC_XORI, 0x3, 3, TREG_ZERO, 1,
   7534     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   7535 #ifndef DISASM_ONLY
   7536     {
   7537       0x800000007ff00000ULL,
   7538       0xfff8000000000000ULL,
   7539       0ULL,
   7540       0ULL,
   7541       0ULL
   7542     },
   7543     {
   7544       0x0000000050200000ULL,
   7545       0x30a8000000000000ULL,
   7546       -1ULL,
   7547       -1ULL,
   7548       -1ULL
   7549     }
   7550 #endif
   7551   },
   7552   { "xori.sn", TILEPRO_OPC_XORI_SN, 0x3, 3, TREG_SN, 1,
   7553     { { 9, 10, 0 }, { 7, 8, 1 }, { 0, }, { 0, }, { 0, } },
   7554 #ifndef DISASM_ONLY
   7555     {
   7556       0x800000007ff00000ULL,
   7557       0xfff8000000000000ULL,
   7558       0ULL,
   7559       0ULL,
   7560       0ULL
   7561     },
   7562     {
   7563       0x0000000058200000ULL,
   7564       0x34a8000000000000ULL,
   7565       -1ULL,
   7566       -1ULL,
   7567       -1ULL
   7568     }
   7569 #endif
   7570   },
   7571   { NULL, TILEPRO_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } },
   7572 #ifndef DISASM_ONLY
   7573     { 0, }, { 0, }
   7574 #endif
   7575   }
   7576 };
   7577 
   7578 #define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6))
   7579 #define CHILD(array_index) (TILEPRO_OPC_NONE + (array_index))
   7580 
   7581 static const unsigned short decode_X0_fsm[1153] =
   7582 {
   7583   BITFIELD(22, 9) /* index 0 */,
   7584   CHILD(513), CHILD(530), CHILD(547), CHILD(564), CHILD(596), CHILD(613),
   7585   CHILD(630), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7586   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7587   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7588   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7589   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7590   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7591   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(663), CHILD(680), CHILD(697),
   7592   CHILD(714), CHILD(746), CHILD(763), CHILD(780), TILEPRO_OPC_NONE,
   7593   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7594   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7595   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7596   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7597   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7598   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7599   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7600   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7601   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7602   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7603   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7604   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7605   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7606   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7607   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7608   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813),
   7609   CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(828), CHILD(828),
   7610   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7611   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7612   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7613   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7614   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7615   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7616   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7617   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7618   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7619   CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828),
   7620   CHILD(828), CHILD(828), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7621   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7622   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7623   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7624   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7625   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7626   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7627   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7628   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7629   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7630   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   7631   CHILD(873), CHILD(878), CHILD(883), CHILD(903), CHILD(908),
   7632   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7633   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7634   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7635   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7636   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7637   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7638   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(913),
   7639   CHILD(918), CHILD(923), CHILD(943), CHILD(948), TILEPRO_OPC_NONE,
   7640   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7641   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7642   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7643   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7644   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7645   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7646   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(953), TILEPRO_OPC_NONE,
   7647   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7648   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7649   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7650   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7651   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7652   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7653   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7654   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(988), TILEPRO_OPC_NONE,
   7655   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7656   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7657   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7658   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7659   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7660   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7661   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7662   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7663   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7664   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7665   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7666   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7667   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7668   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7669   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7670   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7671   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7672   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7673   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7674   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7675   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7676   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7677   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   7678   TILEPRO_OPC_MM, TILEPRO_OPC_MM, CHILD(993), TILEPRO_OPC_NONE,
   7679   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7680   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7681   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7682   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7683   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7684   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7685   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7686   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(1076), TILEPRO_OPC_NONE,
   7687   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7688   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7689   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7690   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7691   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7692   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7693   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7694   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7695   BITFIELD(18, 4) /* index 513 */,
   7696   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB, TILEPRO_OPC_ADDH, TILEPRO_OPC_ADD,
   7697   TILEPRO_OPC_ADIFFB_U, TILEPRO_OPC_ADIFFH, TILEPRO_OPC_AND,
   7698   TILEPRO_OPC_AVGB_U, TILEPRO_OPC_AVGH, TILEPRO_OPC_CRC32_32,
   7699   TILEPRO_OPC_CRC32_8, TILEPRO_OPC_INTHB, TILEPRO_OPC_INTHH,
   7700   TILEPRO_OPC_INTLB, TILEPRO_OPC_INTLH, TILEPRO_OPC_MAXB_U,
   7701   BITFIELD(18, 4) /* index 530 */,
   7702   TILEPRO_OPC_MAXH, TILEPRO_OPC_MINB_U, TILEPRO_OPC_MINH, TILEPRO_OPC_MNZB,
   7703   TILEPRO_OPC_MNZH, TILEPRO_OPC_MNZ, TILEPRO_OPC_MULHHA_SS,
   7704   TILEPRO_OPC_MULHHA_SU, TILEPRO_OPC_MULHHA_UU, TILEPRO_OPC_MULHHSA_UU,
   7705   TILEPRO_OPC_MULHH_SS, TILEPRO_OPC_MULHH_SU, TILEPRO_OPC_MULHH_UU,
   7706   TILEPRO_OPC_MULHLA_SS, TILEPRO_OPC_MULHLA_SU, TILEPRO_OPC_MULHLA_US,
   7707   BITFIELD(18, 4) /* index 547 */,
   7708   TILEPRO_OPC_MULHLA_UU, TILEPRO_OPC_MULHLSA_UU, TILEPRO_OPC_MULHL_SS,
   7709   TILEPRO_OPC_MULHL_SU, TILEPRO_OPC_MULHL_US, TILEPRO_OPC_MULHL_UU,
   7710   TILEPRO_OPC_MULLLA_SS, TILEPRO_OPC_MULLLA_SU, TILEPRO_OPC_MULLLA_UU,
   7711   TILEPRO_OPC_MULLLSA_UU, TILEPRO_OPC_MULLL_SS, TILEPRO_OPC_MULLL_SU,
   7712   TILEPRO_OPC_MULLL_UU, TILEPRO_OPC_MVNZ, TILEPRO_OPC_MVZ, TILEPRO_OPC_MZB,
   7713   BITFIELD(18, 4) /* index 564 */,
   7714   TILEPRO_OPC_MZH, TILEPRO_OPC_MZ, TILEPRO_OPC_NOR, CHILD(581),
   7715   TILEPRO_OPC_PACKHB, TILEPRO_OPC_PACKLB, TILEPRO_OPC_RL, TILEPRO_OPC_S1A,
   7716   TILEPRO_OPC_S2A, TILEPRO_OPC_S3A, TILEPRO_OPC_SADAB_U, TILEPRO_OPC_SADAH,
   7717   TILEPRO_OPC_SADAH_U, TILEPRO_OPC_SADB_U, TILEPRO_OPC_SADH,
   7718   TILEPRO_OPC_SADH_U,
   7719   BITFIELD(12, 2) /* index 581 */,
   7720   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(586),
   7721   BITFIELD(14, 2) /* index 586 */,
   7722   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(591),
   7723   BITFIELD(16, 2) /* index 591 */,
   7724   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE,
   7725   BITFIELD(18, 4) /* index 596 */,
   7726   TILEPRO_OPC_SEQB, TILEPRO_OPC_SEQH, TILEPRO_OPC_SEQ, TILEPRO_OPC_SHLB,
   7727   TILEPRO_OPC_SHLH, TILEPRO_OPC_SHL, TILEPRO_OPC_SHRB, TILEPRO_OPC_SHRH,
   7728   TILEPRO_OPC_SHR, TILEPRO_OPC_SLTB, TILEPRO_OPC_SLTB_U, TILEPRO_OPC_SLTEB,
   7729   TILEPRO_OPC_SLTEB_U, TILEPRO_OPC_SLTEH, TILEPRO_OPC_SLTEH_U,
   7730   TILEPRO_OPC_SLTE,
   7731   BITFIELD(18, 4) /* index 613 */,
   7732   TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLTH, TILEPRO_OPC_SLTH_U, TILEPRO_OPC_SLT,
   7733   TILEPRO_OPC_SLT_U, TILEPRO_OPC_SNEB, TILEPRO_OPC_SNEH, TILEPRO_OPC_SNE,
   7734   TILEPRO_OPC_SRAB, TILEPRO_OPC_SRAH, TILEPRO_OPC_SRA, TILEPRO_OPC_SUBB,
   7735   TILEPRO_OPC_SUBH, TILEPRO_OPC_SUB, TILEPRO_OPC_XOR, TILEPRO_OPC_DWORD_ALIGN,
   7736   BITFIELD(18, 3) /* index 630 */,
   7737   CHILD(639), CHILD(642), CHILD(645), CHILD(648), CHILD(651), CHILD(654),
   7738   CHILD(657), CHILD(660),
   7739   BITFIELD(21, 1) /* index 639 */,
   7740   TILEPRO_OPC_ADDS, TILEPRO_OPC_NONE,
   7741   BITFIELD(21, 1) /* index 642 */,
   7742   TILEPRO_OPC_SUBS, TILEPRO_OPC_NONE,
   7743   BITFIELD(21, 1) /* index 645 */,
   7744   TILEPRO_OPC_ADDBS_U, TILEPRO_OPC_NONE,
   7745   BITFIELD(21, 1) /* index 648 */,
   7746   TILEPRO_OPC_ADDHS, TILEPRO_OPC_NONE,
   7747   BITFIELD(21, 1) /* index 651 */,
   7748   TILEPRO_OPC_SUBBS_U, TILEPRO_OPC_NONE,
   7749   BITFIELD(21, 1) /* index 654 */,
   7750   TILEPRO_OPC_SUBHS, TILEPRO_OPC_NONE,
   7751   BITFIELD(21, 1) /* index 657 */,
   7752   TILEPRO_OPC_PACKHS, TILEPRO_OPC_NONE,
   7753   BITFIELD(21, 1) /* index 660 */,
   7754   TILEPRO_OPC_PACKBS_U, TILEPRO_OPC_NONE,
   7755   BITFIELD(18, 4) /* index 663 */,
   7756   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB_SN, TILEPRO_OPC_ADDH_SN,
   7757   TILEPRO_OPC_ADD_SN, TILEPRO_OPC_ADIFFB_U_SN, TILEPRO_OPC_ADIFFH_SN,
   7758   TILEPRO_OPC_AND_SN, TILEPRO_OPC_AVGB_U_SN, TILEPRO_OPC_AVGH_SN,
   7759   TILEPRO_OPC_CRC32_32_SN, TILEPRO_OPC_CRC32_8_SN, TILEPRO_OPC_INTHB_SN,
   7760   TILEPRO_OPC_INTHH_SN, TILEPRO_OPC_INTLB_SN, TILEPRO_OPC_INTLH_SN,
   7761   TILEPRO_OPC_MAXB_U_SN,
   7762   BITFIELD(18, 4) /* index 680 */,
   7763   TILEPRO_OPC_MAXH_SN, TILEPRO_OPC_MINB_U_SN, TILEPRO_OPC_MINH_SN,
   7764   TILEPRO_OPC_MNZB_SN, TILEPRO_OPC_MNZH_SN, TILEPRO_OPC_MNZ_SN,
   7765   TILEPRO_OPC_MULHHA_SS_SN, TILEPRO_OPC_MULHHA_SU_SN,
   7766   TILEPRO_OPC_MULHHA_UU_SN, TILEPRO_OPC_MULHHSA_UU_SN,
   7767   TILEPRO_OPC_MULHH_SS_SN, TILEPRO_OPC_MULHH_SU_SN, TILEPRO_OPC_MULHH_UU_SN,
   7768   TILEPRO_OPC_MULHLA_SS_SN, TILEPRO_OPC_MULHLA_SU_SN,
   7769   TILEPRO_OPC_MULHLA_US_SN,
   7770   BITFIELD(18, 4) /* index 697 */,
   7771   TILEPRO_OPC_MULHLA_UU_SN, TILEPRO_OPC_MULHLSA_UU_SN,
   7772   TILEPRO_OPC_MULHL_SS_SN, TILEPRO_OPC_MULHL_SU_SN, TILEPRO_OPC_MULHL_US_SN,
   7773   TILEPRO_OPC_MULHL_UU_SN, TILEPRO_OPC_MULLLA_SS_SN, TILEPRO_OPC_MULLLA_SU_SN,
   7774   TILEPRO_OPC_MULLLA_UU_SN, TILEPRO_OPC_MULLLSA_UU_SN,
   7775   TILEPRO_OPC_MULLL_SS_SN, TILEPRO_OPC_MULLL_SU_SN, TILEPRO_OPC_MULLL_UU_SN,
   7776   TILEPRO_OPC_MVNZ_SN, TILEPRO_OPC_MVZ_SN, TILEPRO_OPC_MZB_SN,
   7777   BITFIELD(18, 4) /* index 714 */,
   7778   TILEPRO_OPC_MZH_SN, TILEPRO_OPC_MZ_SN, TILEPRO_OPC_NOR_SN, CHILD(731),
   7779   TILEPRO_OPC_PACKHB_SN, TILEPRO_OPC_PACKLB_SN, TILEPRO_OPC_RL_SN,
   7780   TILEPRO_OPC_S1A_SN, TILEPRO_OPC_S2A_SN, TILEPRO_OPC_S3A_SN,
   7781   TILEPRO_OPC_SADAB_U_SN, TILEPRO_OPC_SADAH_SN, TILEPRO_OPC_SADAH_U_SN,
   7782   TILEPRO_OPC_SADB_U_SN, TILEPRO_OPC_SADH_SN, TILEPRO_OPC_SADH_U_SN,
   7783   BITFIELD(12, 2) /* index 731 */,
   7784   TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(736),
   7785   BITFIELD(14, 2) /* index 736 */,
   7786   TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(741),
   7787   BITFIELD(16, 2) /* index 741 */,
   7788   TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN,
   7789   TILEPRO_OPC_MOVE_SN,
   7790   BITFIELD(18, 4) /* index 746 */,
   7791   TILEPRO_OPC_SEQB_SN, TILEPRO_OPC_SEQH_SN, TILEPRO_OPC_SEQ_SN,
   7792   TILEPRO_OPC_SHLB_SN, TILEPRO_OPC_SHLH_SN, TILEPRO_OPC_SHL_SN,
   7793   TILEPRO_OPC_SHRB_SN, TILEPRO_OPC_SHRH_SN, TILEPRO_OPC_SHR_SN,
   7794   TILEPRO_OPC_SLTB_SN, TILEPRO_OPC_SLTB_U_SN, TILEPRO_OPC_SLTEB_SN,
   7795   TILEPRO_OPC_SLTEB_U_SN, TILEPRO_OPC_SLTEH_SN, TILEPRO_OPC_SLTEH_U_SN,
   7796   TILEPRO_OPC_SLTE_SN,
   7797   BITFIELD(18, 4) /* index 763 */,
   7798   TILEPRO_OPC_SLTE_U_SN, TILEPRO_OPC_SLTH_SN, TILEPRO_OPC_SLTH_U_SN,
   7799   TILEPRO_OPC_SLT_SN, TILEPRO_OPC_SLT_U_SN, TILEPRO_OPC_SNEB_SN,
   7800   TILEPRO_OPC_SNEH_SN, TILEPRO_OPC_SNE_SN, TILEPRO_OPC_SRAB_SN,
   7801   TILEPRO_OPC_SRAH_SN, TILEPRO_OPC_SRA_SN, TILEPRO_OPC_SUBB_SN,
   7802   TILEPRO_OPC_SUBH_SN, TILEPRO_OPC_SUB_SN, TILEPRO_OPC_XOR_SN,
   7803   TILEPRO_OPC_DWORD_ALIGN_SN,
   7804   BITFIELD(18, 3) /* index 780 */,
   7805   CHILD(789), CHILD(792), CHILD(795), CHILD(798), CHILD(801), CHILD(804),
   7806   CHILD(807), CHILD(810),
   7807   BITFIELD(21, 1) /* index 789 */,
   7808   TILEPRO_OPC_ADDS_SN, TILEPRO_OPC_NONE,
   7809   BITFIELD(21, 1) /* index 792 */,
   7810   TILEPRO_OPC_SUBS_SN, TILEPRO_OPC_NONE,
   7811   BITFIELD(21, 1) /* index 795 */,
   7812   TILEPRO_OPC_ADDBS_U_SN, TILEPRO_OPC_NONE,
   7813   BITFIELD(21, 1) /* index 798 */,
   7814   TILEPRO_OPC_ADDHS_SN, TILEPRO_OPC_NONE,
   7815   BITFIELD(21, 1) /* index 801 */,
   7816   TILEPRO_OPC_SUBBS_U_SN, TILEPRO_OPC_NONE,
   7817   BITFIELD(21, 1) /* index 804 */,
   7818   TILEPRO_OPC_SUBHS_SN, TILEPRO_OPC_NONE,
   7819   BITFIELD(21, 1) /* index 807 */,
   7820   TILEPRO_OPC_PACKHS_SN, TILEPRO_OPC_NONE,
   7821   BITFIELD(21, 1) /* index 810 */,
   7822   TILEPRO_OPC_PACKBS_U_SN, TILEPRO_OPC_NONE,
   7823   BITFIELD(6, 2) /* index 813 */,
   7824   TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN,
   7825   CHILD(818),
   7826   BITFIELD(8, 2) /* index 818 */,
   7827   TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN,
   7828   CHILD(823),
   7829   BITFIELD(10, 2) /* index 823 */,
   7830   TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN,
   7831   TILEPRO_OPC_MOVELI_SN,
   7832   BITFIELD(6, 2) /* index 828 */,
   7833   TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(833),
   7834   BITFIELD(8, 2) /* index 833 */,
   7835   TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(838),
   7836   BITFIELD(10, 2) /* index 838 */,
   7837   TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_MOVELI,
   7838   BITFIELD(0, 2) /* index 843 */,
   7839   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(848),
   7840   BITFIELD(2, 2) /* index 848 */,
   7841   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(853),
   7842   BITFIELD(4, 2) /* index 853 */,
   7843   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(858),
   7844   BITFIELD(6, 2) /* index 858 */,
   7845   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(863),
   7846   BITFIELD(8, 2) /* index 863 */,
   7847   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(868),
   7848   BITFIELD(10, 2) /* index 868 */,
   7849   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_INFOL,
   7850   BITFIELD(20, 2) /* index 873 */,
   7851   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB, TILEPRO_OPC_ADDIH, TILEPRO_OPC_ADDI,
   7852   BITFIELD(20, 2) /* index 878 */,
   7853   TILEPRO_OPC_MAXIB_U, TILEPRO_OPC_MAXIH, TILEPRO_OPC_MINIB_U,
   7854   TILEPRO_OPC_MINIH,
   7855   BITFIELD(20, 2) /* index 883 */,
   7856   CHILD(888), TILEPRO_OPC_SEQIB, TILEPRO_OPC_SEQIH, TILEPRO_OPC_SEQI,
   7857   BITFIELD(6, 2) /* index 888 */,
   7858   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(893),
   7859   BITFIELD(8, 2) /* index 893 */,
   7860   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(898),
   7861   BITFIELD(10, 2) /* index 898 */,
   7862   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI,
   7863   BITFIELD(20, 2) /* index 903 */,
   7864   TILEPRO_OPC_SLTIB, TILEPRO_OPC_SLTIB_U, TILEPRO_OPC_SLTIH,
   7865   TILEPRO_OPC_SLTIH_U,
   7866   BITFIELD(20, 2) /* index 908 */,
   7867   TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7868   BITFIELD(20, 2) /* index 913 */,
   7869   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB_SN, TILEPRO_OPC_ADDIH_SN,
   7870   TILEPRO_OPC_ADDI_SN,
   7871   BITFIELD(20, 2) /* index 918 */,
   7872   TILEPRO_OPC_MAXIB_U_SN, TILEPRO_OPC_MAXIH_SN, TILEPRO_OPC_MINIB_U_SN,
   7873   TILEPRO_OPC_MINIH_SN,
   7874   BITFIELD(20, 2) /* index 923 */,
   7875   CHILD(928), TILEPRO_OPC_SEQIB_SN, TILEPRO_OPC_SEQIH_SN, TILEPRO_OPC_SEQI_SN,
   7876   BITFIELD(6, 2) /* index 928 */,
   7877   TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(933),
   7878   BITFIELD(8, 2) /* index 933 */,
   7879   TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(938),
   7880   BITFIELD(10, 2) /* index 938 */,
   7881   TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN,
   7882   TILEPRO_OPC_MOVEI_SN,
   7883   BITFIELD(20, 2) /* index 943 */,
   7884   TILEPRO_OPC_SLTIB_SN, TILEPRO_OPC_SLTIB_U_SN, TILEPRO_OPC_SLTIH_SN,
   7885   TILEPRO_OPC_SLTIH_U_SN,
   7886   BITFIELD(20, 2) /* index 948 */,
   7887   TILEPRO_OPC_SLTI_SN, TILEPRO_OPC_SLTI_U_SN, TILEPRO_OPC_NONE,
   7888   TILEPRO_OPC_NONE,
   7889   BITFIELD(20, 2) /* index 953 */,
   7890   TILEPRO_OPC_NONE, CHILD(958), TILEPRO_OPC_XORI, TILEPRO_OPC_NONE,
   7891   BITFIELD(0, 2) /* index 958 */,
   7892   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(963),
   7893   BITFIELD(2, 2) /* index 963 */,
   7894   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(968),
   7895   BITFIELD(4, 2) /* index 968 */,
   7896   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(973),
   7897   BITFIELD(6, 2) /* index 973 */,
   7898   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(978),
   7899   BITFIELD(8, 2) /* index 978 */,
   7900   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(983),
   7901   BITFIELD(10, 2) /* index 983 */,
   7902   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO,
   7903   BITFIELD(20, 2) /* index 988 */,
   7904   TILEPRO_OPC_NONE, TILEPRO_OPC_ANDI_SN, TILEPRO_OPC_XORI_SN,
   7905   TILEPRO_OPC_NONE,
   7906   BITFIELD(17, 5) /* index 993 */,
   7907   TILEPRO_OPC_NONE, TILEPRO_OPC_RLI, TILEPRO_OPC_SHLIB, TILEPRO_OPC_SHLIH,
   7908   TILEPRO_OPC_SHLI, TILEPRO_OPC_SHRIB, TILEPRO_OPC_SHRIH, TILEPRO_OPC_SHRI,
   7909   TILEPRO_OPC_SRAIB, TILEPRO_OPC_SRAIH, TILEPRO_OPC_SRAI, CHILD(1026),
   7910   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7911   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7912   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7913   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7914   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7915   BITFIELD(12, 4) /* index 1026 */,
   7916   TILEPRO_OPC_NONE, CHILD(1043), CHILD(1046), CHILD(1049), CHILD(1052),
   7917   CHILD(1055), CHILD(1058), CHILD(1061), CHILD(1064), CHILD(1067),
   7918   CHILD(1070), CHILD(1073), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7919   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7920   BITFIELD(16, 1) /* index 1043 */,
   7921   TILEPRO_OPC_BITX, TILEPRO_OPC_NONE,
   7922   BITFIELD(16, 1) /* index 1046 */,
   7923   TILEPRO_OPC_BYTEX, TILEPRO_OPC_NONE,
   7924   BITFIELD(16, 1) /* index 1049 */,
   7925   TILEPRO_OPC_CLZ, TILEPRO_OPC_NONE,
   7926   BITFIELD(16, 1) /* index 1052 */,
   7927   TILEPRO_OPC_CTZ, TILEPRO_OPC_NONE,
   7928   BITFIELD(16, 1) /* index 1055 */,
   7929   TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE,
   7930   BITFIELD(16, 1) /* index 1058 */,
   7931   TILEPRO_OPC_NOP, TILEPRO_OPC_NONE,
   7932   BITFIELD(16, 1) /* index 1061 */,
   7933   TILEPRO_OPC_PCNT, TILEPRO_OPC_NONE,
   7934   BITFIELD(16, 1) /* index 1064 */,
   7935   TILEPRO_OPC_TBLIDXB0, TILEPRO_OPC_NONE,
   7936   BITFIELD(16, 1) /* index 1067 */,
   7937   TILEPRO_OPC_TBLIDXB1, TILEPRO_OPC_NONE,
   7938   BITFIELD(16, 1) /* index 1070 */,
   7939   TILEPRO_OPC_TBLIDXB2, TILEPRO_OPC_NONE,
   7940   BITFIELD(16, 1) /* index 1073 */,
   7941   TILEPRO_OPC_TBLIDXB3, TILEPRO_OPC_NONE,
   7942   BITFIELD(17, 5) /* index 1076 */,
   7943   TILEPRO_OPC_NONE, TILEPRO_OPC_RLI_SN, TILEPRO_OPC_SHLIB_SN,
   7944   TILEPRO_OPC_SHLIH_SN, TILEPRO_OPC_SHLI_SN, TILEPRO_OPC_SHRIB_SN,
   7945   TILEPRO_OPC_SHRIH_SN, TILEPRO_OPC_SHRI_SN, TILEPRO_OPC_SRAIB_SN,
   7946   TILEPRO_OPC_SRAIH_SN, TILEPRO_OPC_SRAI_SN, CHILD(1109), TILEPRO_OPC_NONE,
   7947   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7948   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7949   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7950   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7951   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7952   BITFIELD(12, 4) /* index 1109 */,
   7953   TILEPRO_OPC_NONE, CHILD(1126), CHILD(1129), CHILD(1132), CHILD(1135),
   7954   CHILD(1055), CHILD(1058), CHILD(1138), CHILD(1141), CHILD(1144),
   7955   CHILD(1147), CHILD(1150), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7956   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7957   BITFIELD(16, 1) /* index 1126 */,
   7958   TILEPRO_OPC_BITX_SN, TILEPRO_OPC_NONE,
   7959   BITFIELD(16, 1) /* index 1129 */,
   7960   TILEPRO_OPC_BYTEX_SN, TILEPRO_OPC_NONE,
   7961   BITFIELD(16, 1) /* index 1132 */,
   7962   TILEPRO_OPC_CLZ_SN, TILEPRO_OPC_NONE,
   7963   BITFIELD(16, 1) /* index 1135 */,
   7964   TILEPRO_OPC_CTZ_SN, TILEPRO_OPC_NONE,
   7965   BITFIELD(16, 1) /* index 1138 */,
   7966   TILEPRO_OPC_PCNT_SN, TILEPRO_OPC_NONE,
   7967   BITFIELD(16, 1) /* index 1141 */,
   7968   TILEPRO_OPC_TBLIDXB0_SN, TILEPRO_OPC_NONE,
   7969   BITFIELD(16, 1) /* index 1144 */,
   7970   TILEPRO_OPC_TBLIDXB1_SN, TILEPRO_OPC_NONE,
   7971   BITFIELD(16, 1) /* index 1147 */,
   7972   TILEPRO_OPC_TBLIDXB2_SN, TILEPRO_OPC_NONE,
   7973   BITFIELD(16, 1) /* index 1150 */,
   7974   TILEPRO_OPC_TBLIDXB3_SN, TILEPRO_OPC_NONE,
   7975 };
   7976 
   7977 static const unsigned short decode_X1_fsm[1580] =
   7978 {
   7979   BITFIELD(54, 9) /* index 0 */,
   7980   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7981   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7982   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7983   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7984   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7985   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7986   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7987   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7988   CHILD(513), CHILD(561), CHILD(594), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7989   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7990   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7991   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(641),
   7992   CHILD(689), CHILD(722), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7993   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7994   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   7995   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(766),
   7996   CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766),
   7997   CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766),
   7998   CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766),
   7999   CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766),
   8000   CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766),
   8001   CHILD(766), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781),
   8002   CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781),
   8003   CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781),
   8004   CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781),
   8005   CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781),
   8006   CHILD(781), CHILD(781), CHILD(781), CHILD(796), CHILD(796), CHILD(796),
   8007   CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796),
   8008   CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796),
   8009   CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796),
   8010   CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796),
   8011   CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(826),
   8012   CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826),
   8013   CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826),
   8014   CHILD(826), CHILD(826), CHILD(826), CHILD(843), CHILD(843), CHILD(843),
   8015   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   8016   CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843),
   8017   CHILD(843), CHILD(860), CHILD(899), CHILD(923), CHILD(932),
   8018   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8019   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8020   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8021   CHILD(961), CHILD(970), CHILD(994), CHILD(1003), TILEPRO_OPC_NONE,
   8022   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8023   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8024   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_MM,
   8025   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8026   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8027   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8028   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8029   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8030   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8031   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM,
   8032   TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, CHILD(1032),
   8033   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8034   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8035   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8036   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(1374),
   8037   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8038   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8039   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8040   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8041   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8042   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8043   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8044   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8045   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8046   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8047   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8048   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_J,
   8049   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8050   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8051   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8052   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8053   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8054   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8055   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8056   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8057   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8058   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8059   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8060   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J,
   8061   TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_JAL,
   8062   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8063   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8064   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8065   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8066   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8067   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8068   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8069   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8070   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8071   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8072   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8073   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8074   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8075   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8076   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL,
   8077   TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_NONE,
   8078   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8079   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8080   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8081   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8082   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8083   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8084   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8085   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8086   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8087   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8088   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8089   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8090   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8091   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8092   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8093   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8094   BITFIELD(49, 5) /* index 513 */,
   8095   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB, TILEPRO_OPC_ADDH, TILEPRO_OPC_ADD,
   8096   TILEPRO_OPC_AND, TILEPRO_OPC_INTHB, TILEPRO_OPC_INTHH, TILEPRO_OPC_INTLB,
   8097   TILEPRO_OPC_INTLH, TILEPRO_OPC_JALRP, TILEPRO_OPC_JALR, TILEPRO_OPC_JRP,
   8098   TILEPRO_OPC_JR, TILEPRO_OPC_LNK, TILEPRO_OPC_MAXB_U, TILEPRO_OPC_MAXH,
   8099   TILEPRO_OPC_MINB_U, TILEPRO_OPC_MINH, TILEPRO_OPC_MNZB, TILEPRO_OPC_MNZH,
   8100   TILEPRO_OPC_MNZ, TILEPRO_OPC_MZB, TILEPRO_OPC_MZH, TILEPRO_OPC_MZ,
   8101   TILEPRO_OPC_NOR, CHILD(546), TILEPRO_OPC_PACKHB, TILEPRO_OPC_PACKLB,
   8102   TILEPRO_OPC_RL, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_S3A,
   8103   BITFIELD(43, 2) /* index 546 */,
   8104   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(551),
   8105   BITFIELD(45, 2) /* index 551 */,
   8106   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(556),
   8107   BITFIELD(47, 2) /* index 556 */,
   8108   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE,
   8109   BITFIELD(49, 5) /* index 561 */,
   8110   TILEPRO_OPC_SB, TILEPRO_OPC_SEQB, TILEPRO_OPC_SEQH, TILEPRO_OPC_SEQ,
   8111   TILEPRO_OPC_SHLB, TILEPRO_OPC_SHLH, TILEPRO_OPC_SHL, TILEPRO_OPC_SHRB,
   8112   TILEPRO_OPC_SHRH, TILEPRO_OPC_SHR, TILEPRO_OPC_SH, TILEPRO_OPC_SLTB,
   8113   TILEPRO_OPC_SLTB_U, TILEPRO_OPC_SLTEB, TILEPRO_OPC_SLTEB_U,
   8114   TILEPRO_OPC_SLTEH, TILEPRO_OPC_SLTEH_U, TILEPRO_OPC_SLTE,
   8115   TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLTH, TILEPRO_OPC_SLTH_U, TILEPRO_OPC_SLT,
   8116   TILEPRO_OPC_SLT_U, TILEPRO_OPC_SNEB, TILEPRO_OPC_SNEH, TILEPRO_OPC_SNE,
   8117   TILEPRO_OPC_SRAB, TILEPRO_OPC_SRAH, TILEPRO_OPC_SRA, TILEPRO_OPC_SUBB,
   8118   TILEPRO_OPC_SUBH, TILEPRO_OPC_SUB,
   8119   BITFIELD(49, 4) /* index 594 */,
   8120   CHILD(611), CHILD(614), CHILD(617), CHILD(620), CHILD(623), CHILD(626),
   8121   CHILD(629), CHILD(632), CHILD(635), CHILD(638), TILEPRO_OPC_NONE,
   8122   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8123   TILEPRO_OPC_NONE,
   8124   BITFIELD(53, 1) /* index 611 */,
   8125   TILEPRO_OPC_SW, TILEPRO_OPC_NONE,
   8126   BITFIELD(53, 1) /* index 614 */,
   8127   TILEPRO_OPC_XOR, TILEPRO_OPC_NONE,
   8128   BITFIELD(53, 1) /* index 617 */,
   8129   TILEPRO_OPC_ADDS, TILEPRO_OPC_NONE,
   8130   BITFIELD(53, 1) /* index 620 */,
   8131   TILEPRO_OPC_SUBS, TILEPRO_OPC_NONE,
   8132   BITFIELD(53, 1) /* index 623 */,
   8133   TILEPRO_OPC_ADDBS_U, TILEPRO_OPC_NONE,
   8134   BITFIELD(53, 1) /* index 626 */,
   8135   TILEPRO_OPC_ADDHS, TILEPRO_OPC_NONE,
   8136   BITFIELD(53, 1) /* index 629 */,
   8137   TILEPRO_OPC_SUBBS_U, TILEPRO_OPC_NONE,
   8138   BITFIELD(53, 1) /* index 632 */,
   8139   TILEPRO_OPC_SUBHS, TILEPRO_OPC_NONE,
   8140   BITFIELD(53, 1) /* index 635 */,
   8141   TILEPRO_OPC_PACKHS, TILEPRO_OPC_NONE,
   8142   BITFIELD(53, 1) /* index 638 */,
   8143   TILEPRO_OPC_PACKBS_U, TILEPRO_OPC_NONE,
   8144   BITFIELD(49, 5) /* index 641 */,
   8145   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB_SN, TILEPRO_OPC_ADDH_SN,
   8146   TILEPRO_OPC_ADD_SN, TILEPRO_OPC_AND_SN, TILEPRO_OPC_INTHB_SN,
   8147   TILEPRO_OPC_INTHH_SN, TILEPRO_OPC_INTLB_SN, TILEPRO_OPC_INTLH_SN,
   8148   TILEPRO_OPC_JALRP, TILEPRO_OPC_JALR, TILEPRO_OPC_JRP, TILEPRO_OPC_JR,
   8149   TILEPRO_OPC_LNK_SN, TILEPRO_OPC_MAXB_U_SN, TILEPRO_OPC_MAXH_SN,
   8150   TILEPRO_OPC_MINB_U_SN, TILEPRO_OPC_MINH_SN, TILEPRO_OPC_MNZB_SN,
   8151   TILEPRO_OPC_MNZH_SN, TILEPRO_OPC_MNZ_SN, TILEPRO_OPC_MZB_SN,
   8152   TILEPRO_OPC_MZH_SN, TILEPRO_OPC_MZ_SN, TILEPRO_OPC_NOR_SN, CHILD(674),
   8153   TILEPRO_OPC_PACKHB_SN, TILEPRO_OPC_PACKLB_SN, TILEPRO_OPC_RL_SN,
   8154   TILEPRO_OPC_S1A_SN, TILEPRO_OPC_S2A_SN, TILEPRO_OPC_S3A_SN,
   8155   BITFIELD(43, 2) /* index 674 */,
   8156   TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(679),
   8157   BITFIELD(45, 2) /* index 679 */,
   8158   TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(684),
   8159   BITFIELD(47, 2) /* index 684 */,
   8160   TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN,
   8161   TILEPRO_OPC_MOVE_SN,
   8162   BITFIELD(49, 5) /* index 689 */,
   8163   TILEPRO_OPC_SB, TILEPRO_OPC_SEQB_SN, TILEPRO_OPC_SEQH_SN,
   8164   TILEPRO_OPC_SEQ_SN, TILEPRO_OPC_SHLB_SN, TILEPRO_OPC_SHLH_SN,
   8165   TILEPRO_OPC_SHL_SN, TILEPRO_OPC_SHRB_SN, TILEPRO_OPC_SHRH_SN,
   8166   TILEPRO_OPC_SHR_SN, TILEPRO_OPC_SH, TILEPRO_OPC_SLTB_SN,
   8167   TILEPRO_OPC_SLTB_U_SN, TILEPRO_OPC_SLTEB_SN, TILEPRO_OPC_SLTEB_U_SN,
   8168   TILEPRO_OPC_SLTEH_SN, TILEPRO_OPC_SLTEH_U_SN, TILEPRO_OPC_SLTE_SN,
   8169   TILEPRO_OPC_SLTE_U_SN, TILEPRO_OPC_SLTH_SN, TILEPRO_OPC_SLTH_U_SN,
   8170   TILEPRO_OPC_SLT_SN, TILEPRO_OPC_SLT_U_SN, TILEPRO_OPC_SNEB_SN,
   8171   TILEPRO_OPC_SNEH_SN, TILEPRO_OPC_SNE_SN, TILEPRO_OPC_SRAB_SN,
   8172   TILEPRO_OPC_SRAH_SN, TILEPRO_OPC_SRA_SN, TILEPRO_OPC_SUBB_SN,
   8173   TILEPRO_OPC_SUBH_SN, TILEPRO_OPC_SUB_SN,
   8174   BITFIELD(49, 4) /* index 722 */,
   8175   CHILD(611), CHILD(739), CHILD(742), CHILD(745), CHILD(748), CHILD(751),
   8176   CHILD(754), CHILD(757), CHILD(760), CHILD(763), TILEPRO_OPC_NONE,
   8177   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8178   TILEPRO_OPC_NONE,
   8179   BITFIELD(53, 1) /* index 739 */,
   8180   TILEPRO_OPC_XOR_SN, TILEPRO_OPC_NONE,
   8181   BITFIELD(53, 1) /* index 742 */,
   8182   TILEPRO_OPC_ADDS_SN, TILEPRO_OPC_NONE,
   8183   BITFIELD(53, 1) /* index 745 */,
   8184   TILEPRO_OPC_SUBS_SN, TILEPRO_OPC_NONE,
   8185   BITFIELD(53, 1) /* index 748 */,
   8186   TILEPRO_OPC_ADDBS_U_SN, TILEPRO_OPC_NONE,
   8187   BITFIELD(53, 1) /* index 751 */,
   8188   TILEPRO_OPC_ADDHS_SN, TILEPRO_OPC_NONE,
   8189   BITFIELD(53, 1) /* index 754 */,
   8190   TILEPRO_OPC_SUBBS_U_SN, TILEPRO_OPC_NONE,
   8191   BITFIELD(53, 1) /* index 757 */,
   8192   TILEPRO_OPC_SUBHS_SN, TILEPRO_OPC_NONE,
   8193   BITFIELD(53, 1) /* index 760 */,
   8194   TILEPRO_OPC_PACKHS_SN, TILEPRO_OPC_NONE,
   8195   BITFIELD(53, 1) /* index 763 */,
   8196   TILEPRO_OPC_PACKBS_U_SN, TILEPRO_OPC_NONE,
   8197   BITFIELD(37, 2) /* index 766 */,
   8198   TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN,
   8199   CHILD(771),
   8200   BITFIELD(39, 2) /* index 771 */,
   8201   TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN,
   8202   CHILD(776),
   8203   BITFIELD(41, 2) /* index 776 */,
   8204   TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN,
   8205   TILEPRO_OPC_MOVELI_SN,
   8206   BITFIELD(37, 2) /* index 781 */,
   8207   TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(786),
   8208   BITFIELD(39, 2) /* index 786 */,
   8209   TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(791),
   8210   BITFIELD(41, 2) /* index 791 */,
   8211   TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_MOVELI,
   8212   BITFIELD(31, 2) /* index 796 */,
   8213   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(801),
   8214   BITFIELD(33, 2) /* index 801 */,
   8215   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(806),
   8216   BITFIELD(35, 2) /* index 806 */,
   8217   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(811),
   8218   BITFIELD(37, 2) /* index 811 */,
   8219   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(816),
   8220   BITFIELD(39, 2) /* index 816 */,
   8221   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(821),
   8222   BITFIELD(41, 2) /* index 821 */,
   8223   TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_INFOL,
   8224   BITFIELD(31, 4) /* index 826 */,
   8225   TILEPRO_OPC_BZ, TILEPRO_OPC_BZT, TILEPRO_OPC_BNZ, TILEPRO_OPC_BNZT,
   8226   TILEPRO_OPC_BGZ, TILEPRO_OPC_BGZT, TILEPRO_OPC_BGEZ, TILEPRO_OPC_BGEZT,
   8227   TILEPRO_OPC_BLZ, TILEPRO_OPC_BLZT, TILEPRO_OPC_BLEZ, TILEPRO_OPC_BLEZT,
   8228   TILEPRO_OPC_BBS, TILEPRO_OPC_BBST, TILEPRO_OPC_BBNS, TILEPRO_OPC_BBNST,
   8229   BITFIELD(31, 4) /* index 843 */,
   8230   TILEPRO_OPC_BZ_SN, TILEPRO_OPC_BZT_SN, TILEPRO_OPC_BNZ_SN,
   8231   TILEPRO_OPC_BNZT_SN, TILEPRO_OPC_BGZ_SN, TILEPRO_OPC_BGZT_SN,
   8232   TILEPRO_OPC_BGEZ_SN, TILEPRO_OPC_BGEZT_SN, TILEPRO_OPC_BLZ_SN,
   8233   TILEPRO_OPC_BLZT_SN, TILEPRO_OPC_BLEZ_SN, TILEPRO_OPC_BLEZT_SN,
   8234   TILEPRO_OPC_BBS_SN, TILEPRO_OPC_BBST_SN, TILEPRO_OPC_BBNS_SN,
   8235   TILEPRO_OPC_BBNST_SN,
   8236   BITFIELD(51, 3) /* index 860 */,
   8237   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB, TILEPRO_OPC_ADDIH, TILEPRO_OPC_ADDI,
   8238   CHILD(869), TILEPRO_OPC_MAXIB_U, TILEPRO_OPC_MAXIH, TILEPRO_OPC_MFSPR,
   8239   BITFIELD(31, 2) /* index 869 */,
   8240   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(874),
   8241   BITFIELD(33, 2) /* index 874 */,
   8242   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(879),
   8243   BITFIELD(35, 2) /* index 879 */,
   8244   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(884),
   8245   BITFIELD(37, 2) /* index 884 */,
   8246   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(889),
   8247   BITFIELD(39, 2) /* index 889 */,
   8248   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(894),
   8249   BITFIELD(41, 2) /* index 894 */,
   8250   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO,
   8251   BITFIELD(51, 3) /* index 899 */,
   8252   TILEPRO_OPC_MINIB_U, TILEPRO_OPC_MINIH, TILEPRO_OPC_MTSPR, CHILD(908),
   8253   TILEPRO_OPC_SEQIB, TILEPRO_OPC_SEQIH, TILEPRO_OPC_SEQI, TILEPRO_OPC_SLTIB,
   8254   BITFIELD(37, 2) /* index 908 */,
   8255   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(913),
   8256   BITFIELD(39, 2) /* index 913 */,
   8257   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(918),
   8258   BITFIELD(41, 2) /* index 918 */,
   8259   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI,
   8260   BITFIELD(51, 3) /* index 923 */,
   8261   TILEPRO_OPC_SLTIB_U, TILEPRO_OPC_SLTIH, TILEPRO_OPC_SLTIH_U,
   8262   TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_XORI, TILEPRO_OPC_LBADD,
   8263   TILEPRO_OPC_LBADD_U,
   8264   BITFIELD(51, 3) /* index 932 */,
   8265   TILEPRO_OPC_LHADD, TILEPRO_OPC_LHADD_U, CHILD(941), TILEPRO_OPC_LWADD_NA,
   8266   TILEPRO_OPC_SBADD, TILEPRO_OPC_SHADD, TILEPRO_OPC_SWADD, TILEPRO_OPC_NONE,
   8267   BITFIELD(43, 2) /* index 941 */,
   8268   CHILD(946), TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD,
   8269   BITFIELD(45, 2) /* index 946 */,
   8270   CHILD(951), TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD,
   8271   BITFIELD(47, 2) /* index 951 */,
   8272   CHILD(956), TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD,
   8273   BITFIELD(49, 2) /* index 956 */,
   8274   TILEPRO_OPC_LW_TLS, TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD, TILEPRO_OPC_LWADD,
   8275   BITFIELD(51, 3) /* index 961 */,
   8276   TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB_SN, TILEPRO_OPC_ADDIH_SN,
   8277   TILEPRO_OPC_ADDI_SN, TILEPRO_OPC_ANDI_SN, TILEPRO_OPC_MAXIB_U_SN,
   8278   TILEPRO_OPC_MAXIH_SN, TILEPRO_OPC_MFSPR,
   8279   BITFIELD(51, 3) /* index 970 */,
   8280   TILEPRO_OPC_MINIB_U_SN, TILEPRO_OPC_MINIH_SN, TILEPRO_OPC_MTSPR, CHILD(979),
   8281   TILEPRO_OPC_SEQIB_SN, TILEPRO_OPC_SEQIH_SN, TILEPRO_OPC_SEQI_SN,
   8282   TILEPRO_OPC_SLTIB_SN,
   8283   BITFIELD(37, 2) /* index 979 */,
   8284   TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(984),
   8285   BITFIELD(39, 2) /* index 984 */,
   8286   TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(989),
   8287   BITFIELD(41, 2) /* index 989 */,
   8288   TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN,
   8289   TILEPRO_OPC_MOVEI_SN,
   8290   BITFIELD(51, 3) /* index 994 */,
   8291   TILEPRO_OPC_SLTIB_U_SN, TILEPRO_OPC_SLTIH_SN, TILEPRO_OPC_SLTIH_U_SN,
   8292   TILEPRO_OPC_SLTI_SN, TILEPRO_OPC_SLTI_U_SN, TILEPRO_OPC_XORI_SN,
   8293   TILEPRO_OPC_LBADD_SN, TILEPRO_OPC_LBADD_U_SN,
   8294   BITFIELD(51, 3) /* index 1003 */,
   8295   TILEPRO_OPC_LHADD_SN, TILEPRO_OPC_LHADD_U_SN, CHILD(1012),
   8296   TILEPRO_OPC_LWADD_NA_SN, TILEPRO_OPC_SBADD, TILEPRO_OPC_SHADD,
   8297   TILEPRO_OPC_SWADD, TILEPRO_OPC_NONE,
   8298   BITFIELD(43, 2) /* index 1012 */,
   8299   CHILD(1017), TILEPRO_OPC_LWADD_SN, TILEPRO_OPC_LWADD_SN,
   8300   TILEPRO_OPC_LWADD_SN,
   8301   BITFIELD(45, 2) /* index 1017 */,
   8302   CHILD(1022), TILEPRO_OPC_LWADD_SN, TILEPRO_OPC_LWADD_SN,
   8303   TILEPRO_OPC_LWADD_SN,
   8304   BITFIELD(47, 2) /* index 1022 */,
   8305   CHILD(1027), TILEPRO_OPC_LWADD_SN, TILEPRO_OPC_LWADD_SN,
   8306   TILEPRO_OPC_LWADD_SN,
   8307   BITFIELD(49, 2) /* index 1027 */,
   8308   TILEPRO_OPC_LW_TLS_SN, TILEPRO_OPC_LWADD_SN, TILEPRO_OPC_LWADD_SN,
   8309   TILEPRO_OPC_LWADD_SN,
   8310   BITFIELD(46, 7) /* index 1032 */,
   8311   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8312   CHILD(1161), CHILD(1161), CHILD(1161), CHILD(1161), CHILD(1164),
   8313   CHILD(1164), CHILD(1164), CHILD(1164), CHILD(1167), CHILD(1167),
   8314   CHILD(1167), CHILD(1167), CHILD(1170), CHILD(1170), CHILD(1170),
   8315   CHILD(1170), CHILD(1173), CHILD(1173), CHILD(1173), CHILD(1173),
   8316   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1179),
   8317   CHILD(1179), CHILD(1179), CHILD(1179), CHILD(1182), CHILD(1182),
   8318   CHILD(1182), CHILD(1182), CHILD(1185), CHILD(1185), CHILD(1185),
   8319   CHILD(1185), CHILD(1188), CHILD(1188), CHILD(1188), CHILD(1188),
   8320   CHILD(1191), CHILD(1282), CHILD(1330), CHILD(1363), TILEPRO_OPC_NONE,
   8321   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8322   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8323   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8324   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8325   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8326   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8327   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8328   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8329   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8330   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8331   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8332   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8333   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8334   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8335   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8336   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8337   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8338   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8339   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8340   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8341   BITFIELD(53, 1) /* index 1161 */,
   8342   TILEPRO_OPC_RLI, TILEPRO_OPC_NONE,
   8343   BITFIELD(53, 1) /* index 1164 */,
   8344   TILEPRO_OPC_SHLIB, TILEPRO_OPC_NONE,
   8345   BITFIELD(53, 1) /* index 1167 */,
   8346   TILEPRO_OPC_SHLIH, TILEPRO_OPC_NONE,
   8347   BITFIELD(53, 1) /* index 1170 */,
   8348   TILEPRO_OPC_SHLI, TILEPRO_OPC_NONE,
   8349   BITFIELD(53, 1) /* index 1173 */,
   8350   TILEPRO_OPC_SHRIB, TILEPRO_OPC_NONE,
   8351   BITFIELD(53, 1) /* index 1176 */,
   8352   TILEPRO_OPC_SHRIH, TILEPRO_OPC_NONE,
   8353   BITFIELD(53, 1) /* index 1179 */,
   8354   TILEPRO_OPC_SHRI, TILEPRO_OPC_NONE,
   8355   BITFIELD(53, 1) /* index 1182 */,
   8356   TILEPRO_OPC_SRAIB, TILEPRO_OPC_NONE,
   8357   BITFIELD(53, 1) /* index 1185 */,
   8358   TILEPRO_OPC_SRAIH, TILEPRO_OPC_NONE,
   8359   BITFIELD(53, 1) /* index 1188 */,
   8360   TILEPRO_OPC_SRAI, TILEPRO_OPC_NONE,
   8361   BITFIELD(43, 3) /* index 1191 */,
   8362   TILEPRO_OPC_NONE, CHILD(1200), CHILD(1203), CHILD(1206), CHILD(1209),
   8363   CHILD(1212), CHILD(1215), CHILD(1218),
   8364   BITFIELD(53, 1) /* index 1200 */,
   8365   TILEPRO_OPC_DRAIN, TILEPRO_OPC_NONE,
   8366   BITFIELD(53, 1) /* index 1203 */,
   8367   TILEPRO_OPC_DTLBPR, TILEPRO_OPC_NONE,
   8368   BITFIELD(53, 1) /* index 1206 */,
   8369   TILEPRO_OPC_FINV, TILEPRO_OPC_NONE,
   8370   BITFIELD(53, 1) /* index 1209 */,
   8371   TILEPRO_OPC_FLUSH, TILEPRO_OPC_NONE,
   8372   BITFIELD(53, 1) /* index 1212 */,
   8373   TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE,
   8374   BITFIELD(53, 1) /* index 1215 */,
   8375   TILEPRO_OPC_ICOH, TILEPRO_OPC_NONE,
   8376   BITFIELD(31, 2) /* index 1218 */,
   8377   CHILD(1223), CHILD(1251), CHILD(1279), CHILD(1279),
   8378   BITFIELD(53, 1) /* index 1223 */,
   8379   CHILD(1226), TILEPRO_OPC_NONE,
   8380   BITFIELD(33, 2) /* index 1226 */,
   8381   TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, CHILD(1231),
   8382   BITFIELD(35, 2) /* index 1231 */,
   8383   TILEPRO_OPC_ILL, CHILD(1236), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL,
   8384   BITFIELD(37, 2) /* index 1236 */,
   8385   TILEPRO_OPC_ILL, CHILD(1241), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL,
   8386   BITFIELD(39, 2) /* index 1241 */,
   8387   TILEPRO_OPC_ILL, CHILD(1246), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL,
   8388   BITFIELD(41, 2) /* index 1246 */,
   8389   TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_BPT, TILEPRO_OPC_ILL,
   8390   BITFIELD(53, 1) /* index 1251 */,
   8391   CHILD(1254), TILEPRO_OPC_NONE,
   8392   BITFIELD(33, 2) /* index 1254 */,
   8393   TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, CHILD(1259),
   8394   BITFIELD(35, 2) /* index 1259 */,
   8395   TILEPRO_OPC_ILL, CHILD(1264), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL,
   8396   BITFIELD(37, 2) /* index 1264 */,
   8397   TILEPRO_OPC_ILL, CHILD(1269), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL,
   8398   BITFIELD(39, 2) /* index 1269 */,
   8399   TILEPRO_OPC_ILL, CHILD(1274), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL,
   8400   BITFIELD(41, 2) /* index 1274 */,
   8401   TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_RAISE, TILEPRO_OPC_ILL,
   8402   BITFIELD(53, 1) /* index 1279 */,
   8403   TILEPRO_OPC_ILL, TILEPRO_OPC_NONE,
   8404   BITFIELD(43, 3) /* index 1282 */,
   8405   CHILD(1291), CHILD(1294), CHILD(1297), CHILD(1315), CHILD(1318),
   8406   CHILD(1321), CHILD(1324), CHILD(1327),
   8407   BITFIELD(53, 1) /* index 1291 */,
   8408   TILEPRO_OPC_INV, TILEPRO_OPC_NONE,
   8409   BITFIELD(53, 1) /* index 1294 */,
   8410   TILEPRO_OPC_IRET, TILEPRO_OPC_NONE,
   8411   BITFIELD(53, 1) /* index 1297 */,
   8412   CHILD(1300), TILEPRO_OPC_NONE,
   8413   BITFIELD(31, 2) /* index 1300 */,
   8414   TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(1305),
   8415   BITFIELD(33, 2) /* index 1305 */,
   8416   TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(1310),
   8417   BITFIELD(35, 2) /* index 1310 */,
   8418   TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_PREFETCH,
   8419   BITFIELD(53, 1) /* index 1315 */,
   8420   TILEPRO_OPC_LB_U, TILEPRO_OPC_NONE,
   8421   BITFIELD(53, 1) /* index 1318 */,
   8422   TILEPRO_OPC_LH, TILEPRO_OPC_NONE,
   8423   BITFIELD(53, 1) /* index 1321 */,
   8424   TILEPRO_OPC_LH_U, TILEPRO_OPC_NONE,
   8425   BITFIELD(53, 1) /* index 1324 */,
   8426   TILEPRO_OPC_LW, TILEPRO_OPC_NONE,
   8427   BITFIELD(53, 1) /* index 1327 */,
   8428   TILEPRO_OPC_MF, TILEPRO_OPC_NONE,
   8429   BITFIELD(43, 3) /* index 1330 */,
   8430   CHILD(1339), CHILD(1342), CHILD(1345), CHILD(1348), CHILD(1351),
   8431   CHILD(1354), CHILD(1357), CHILD(1360),
   8432   BITFIELD(53, 1) /* index 1339 */,
   8433   TILEPRO_OPC_NAP, TILEPRO_OPC_NONE,
   8434   BITFIELD(53, 1) /* index 1342 */,
   8435   TILEPRO_OPC_NOP, TILEPRO_OPC_NONE,
   8436   BITFIELD(53, 1) /* index 1345 */,
   8437   TILEPRO_OPC_SWINT0, TILEPRO_OPC_NONE,
   8438   BITFIELD(53, 1) /* index 1348 */,
   8439   TILEPRO_OPC_SWINT1, TILEPRO_OPC_NONE,
   8440   BITFIELD(53, 1) /* index 1351 */,
   8441   TILEPRO_OPC_SWINT2, TILEPRO_OPC_NONE,
   8442   BITFIELD(53, 1) /* index 1354 */,
   8443   TILEPRO_OPC_SWINT3, TILEPRO_OPC_NONE,
   8444   BITFIELD(53, 1) /* index 1357 */,
   8445   TILEPRO_OPC_TNS, TILEPRO_OPC_NONE,
   8446   BITFIELD(53, 1) /* index 1360 */,
   8447   TILEPRO_OPC_WH64, TILEPRO_OPC_NONE,
   8448   BITFIELD(43, 2) /* index 1363 */,
   8449   CHILD(1368), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8450   BITFIELD(45, 1) /* index 1368 */,
   8451   CHILD(1371), TILEPRO_OPC_NONE,
   8452   BITFIELD(53, 1) /* index 1371 */,
   8453   TILEPRO_OPC_LW_NA, TILEPRO_OPC_NONE,
   8454   BITFIELD(46, 7) /* index 1374 */,
   8455   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8456   CHILD(1503), CHILD(1503), CHILD(1503), CHILD(1503), CHILD(1506),
   8457   CHILD(1506), CHILD(1506), CHILD(1506), CHILD(1509), CHILD(1509),
   8458   CHILD(1509), CHILD(1509), CHILD(1512), CHILD(1512), CHILD(1512),
   8459   CHILD(1512), CHILD(1515), CHILD(1515), CHILD(1515), CHILD(1515),
   8460   CHILD(1518), CHILD(1518), CHILD(1518), CHILD(1518), CHILD(1521),
   8461   CHILD(1521), CHILD(1521), CHILD(1521), CHILD(1524), CHILD(1524),
   8462   CHILD(1524), CHILD(1524), CHILD(1527), CHILD(1527), CHILD(1527),
   8463   CHILD(1527), CHILD(1530), CHILD(1530), CHILD(1530), CHILD(1530),
   8464   CHILD(1191), CHILD(1533), CHILD(1557), CHILD(1569), TILEPRO_OPC_NONE,
   8465   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8466   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8467   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8468   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8469   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8470   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8471   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8472   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8473   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8474   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8475   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8476   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8477   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8478   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8479   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8480   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8481   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8482   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8483   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8484   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8485   BITFIELD(53, 1) /* index 1503 */,
   8486   TILEPRO_OPC_RLI_SN, TILEPRO_OPC_NONE,
   8487   BITFIELD(53, 1) /* index 1506 */,
   8488   TILEPRO_OPC_SHLIB_SN, TILEPRO_OPC_NONE,
   8489   BITFIELD(53, 1) /* index 1509 */,
   8490   TILEPRO_OPC_SHLIH_SN, TILEPRO_OPC_NONE,
   8491   BITFIELD(53, 1) /* index 1512 */,
   8492   TILEPRO_OPC_SHLI_SN, TILEPRO_OPC_NONE,
   8493   BITFIELD(53, 1) /* index 1515 */,
   8494   TILEPRO_OPC_SHRIB_SN, TILEPRO_OPC_NONE,
   8495   BITFIELD(53, 1) /* index 1518 */,
   8496   TILEPRO_OPC_SHRIH_SN, TILEPRO_OPC_NONE,
   8497   BITFIELD(53, 1) /* index 1521 */,
   8498   TILEPRO_OPC_SHRI_SN, TILEPRO_OPC_NONE,
   8499   BITFIELD(53, 1) /* index 1524 */,
   8500   TILEPRO_OPC_SRAIB_SN, TILEPRO_OPC_NONE,
   8501   BITFIELD(53, 1) /* index 1527 */,
   8502   TILEPRO_OPC_SRAIH_SN, TILEPRO_OPC_NONE,
   8503   BITFIELD(53, 1) /* index 1530 */,
   8504   TILEPRO_OPC_SRAI_SN, TILEPRO_OPC_NONE,
   8505   BITFIELD(43, 3) /* index 1533 */,
   8506   CHILD(1291), CHILD(1294), CHILD(1542), CHILD(1545), CHILD(1548),
   8507   CHILD(1551), CHILD(1554), CHILD(1327),
   8508   BITFIELD(53, 1) /* index 1542 */,
   8509   TILEPRO_OPC_LB_SN, TILEPRO_OPC_NONE,
   8510   BITFIELD(53, 1) /* index 1545 */,
   8511   TILEPRO_OPC_LB_U_SN, TILEPRO_OPC_NONE,
   8512   BITFIELD(53, 1) /* index 1548 */,
   8513   TILEPRO_OPC_LH_SN, TILEPRO_OPC_NONE,
   8514   BITFIELD(53, 1) /* index 1551 */,
   8515   TILEPRO_OPC_LH_U_SN, TILEPRO_OPC_NONE,
   8516   BITFIELD(53, 1) /* index 1554 */,
   8517   TILEPRO_OPC_LW_SN, TILEPRO_OPC_NONE,
   8518   BITFIELD(43, 3) /* index 1557 */,
   8519   CHILD(1339), CHILD(1342), CHILD(1345), CHILD(1348), CHILD(1351),
   8520   CHILD(1354), CHILD(1566), CHILD(1360),
   8521   BITFIELD(53, 1) /* index 1566 */,
   8522   TILEPRO_OPC_TNS_SN, TILEPRO_OPC_NONE,
   8523   BITFIELD(43, 2) /* index 1569 */,
   8524   CHILD(1574), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8525   BITFIELD(45, 1) /* index 1574 */,
   8526   CHILD(1577), TILEPRO_OPC_NONE,
   8527   BITFIELD(53, 1) /* index 1577 */,
   8528   TILEPRO_OPC_LW_NA_SN, TILEPRO_OPC_NONE,
   8529 };
   8530 
   8531 static const unsigned short decode_Y0_fsm[168] =
   8532 {
   8533   BITFIELD(27, 4) /* index 0 */,
   8534   TILEPRO_OPC_NONE, CHILD(17), CHILD(22), CHILD(27), CHILD(47), CHILD(52),
   8535   CHILD(57), CHILD(62), CHILD(67), TILEPRO_OPC_ADDI, CHILD(72), CHILD(102),
   8536   TILEPRO_OPC_SEQI, CHILD(117), TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U,
   8537   BITFIELD(18, 2) /* index 17 */,
   8538   TILEPRO_OPC_ADD, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_SUB,
   8539   BITFIELD(18, 2) /* index 22 */,
   8540   TILEPRO_OPC_MNZ, TILEPRO_OPC_MVNZ, TILEPRO_OPC_MVZ, TILEPRO_OPC_MZ,
   8541   BITFIELD(18, 2) /* index 27 */,
   8542   TILEPRO_OPC_AND, TILEPRO_OPC_NOR, CHILD(32), TILEPRO_OPC_XOR,
   8543   BITFIELD(12, 2) /* index 32 */,
   8544   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(37),
   8545   BITFIELD(14, 2) /* index 37 */,
   8546   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(42),
   8547   BITFIELD(16, 2) /* index 42 */,
   8548   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE,
   8549   BITFIELD(18, 2) /* index 47 */,
   8550   TILEPRO_OPC_RL, TILEPRO_OPC_SHL, TILEPRO_OPC_SHR, TILEPRO_OPC_SRA,
   8551   BITFIELD(18, 2) /* index 52 */,
   8552   TILEPRO_OPC_SLTE, TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLT, TILEPRO_OPC_SLT_U,
   8553   BITFIELD(18, 2) /* index 57 */,
   8554   TILEPRO_OPC_MULHLSA_UU, TILEPRO_OPC_S3A, TILEPRO_OPC_SEQ, TILEPRO_OPC_SNE,
   8555   BITFIELD(18, 2) /* index 62 */,
   8556   TILEPRO_OPC_MULHH_SS, TILEPRO_OPC_MULHH_UU, TILEPRO_OPC_MULLL_SS,
   8557   TILEPRO_OPC_MULLL_UU,
   8558   BITFIELD(18, 2) /* index 67 */,
   8559   TILEPRO_OPC_MULHHA_SS, TILEPRO_OPC_MULHHA_UU, TILEPRO_OPC_MULLLA_SS,
   8560   TILEPRO_OPC_MULLLA_UU,
   8561   BITFIELD(0, 2) /* index 72 */,
   8562   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(77),
   8563   BITFIELD(2, 2) /* index 77 */,
   8564   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(82),
   8565   BITFIELD(4, 2) /* index 82 */,
   8566   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(87),
   8567   BITFIELD(6, 2) /* index 87 */,
   8568   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(92),
   8569   BITFIELD(8, 2) /* index 92 */,
   8570   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(97),
   8571   BITFIELD(10, 2) /* index 97 */,
   8572   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO,
   8573   BITFIELD(6, 2) /* index 102 */,
   8574   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(107),
   8575   BITFIELD(8, 2) /* index 107 */,
   8576   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(112),
   8577   BITFIELD(10, 2) /* index 112 */,
   8578   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI,
   8579   BITFIELD(15, 5) /* index 117 */,
   8580   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8581   TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, TILEPRO_OPC_RLI,
   8582   TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI,
   8583   TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI,
   8584   TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI,
   8585   CHILD(150), CHILD(159), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8586   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8587   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8588   BITFIELD(12, 3) /* index 150 */,
   8589   TILEPRO_OPC_NONE, TILEPRO_OPC_BITX, TILEPRO_OPC_BYTEX, TILEPRO_OPC_CLZ,
   8590   TILEPRO_OPC_CTZ, TILEPRO_OPC_FNOP, TILEPRO_OPC_NOP, TILEPRO_OPC_PCNT,
   8591   BITFIELD(12, 3) /* index 159 */,
   8592   TILEPRO_OPC_TBLIDXB0, TILEPRO_OPC_TBLIDXB1, TILEPRO_OPC_TBLIDXB2,
   8593   TILEPRO_OPC_TBLIDXB3, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8594   TILEPRO_OPC_NONE,
   8595 };
   8596 
   8597 static const unsigned short decode_Y1_fsm[140] =
   8598 {
   8599   BITFIELD(59, 4) /* index 0 */,
   8600   TILEPRO_OPC_NONE, CHILD(17), CHILD(22), CHILD(27), CHILD(47), CHILD(52),
   8601   CHILD(57), TILEPRO_OPC_ADDI, CHILD(62), CHILD(92), TILEPRO_OPC_SEQI,
   8602   CHILD(107), TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_NONE,
   8603   TILEPRO_OPC_NONE,
   8604   BITFIELD(49, 2) /* index 17 */,
   8605   TILEPRO_OPC_ADD, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_SUB,
   8606   BITFIELD(49, 2) /* index 22 */,
   8607   TILEPRO_OPC_NONE, TILEPRO_OPC_MNZ, TILEPRO_OPC_MZ, TILEPRO_OPC_NONE,
   8608   BITFIELD(49, 2) /* index 27 */,
   8609   TILEPRO_OPC_AND, TILEPRO_OPC_NOR, CHILD(32), TILEPRO_OPC_XOR,
   8610   BITFIELD(43, 2) /* index 32 */,
   8611   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(37),
   8612   BITFIELD(45, 2) /* index 37 */,
   8613   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(42),
   8614   BITFIELD(47, 2) /* index 42 */,
   8615   TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE,
   8616   BITFIELD(49, 2) /* index 47 */,
   8617   TILEPRO_OPC_RL, TILEPRO_OPC_SHL, TILEPRO_OPC_SHR, TILEPRO_OPC_SRA,
   8618   BITFIELD(49, 2) /* index 52 */,
   8619   TILEPRO_OPC_SLTE, TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLT, TILEPRO_OPC_SLT_U,
   8620   BITFIELD(49, 2) /* index 57 */,
   8621   TILEPRO_OPC_NONE, TILEPRO_OPC_S3A, TILEPRO_OPC_SEQ, TILEPRO_OPC_SNE,
   8622   BITFIELD(31, 2) /* index 62 */,
   8623   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(67),
   8624   BITFIELD(33, 2) /* index 67 */,
   8625   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(72),
   8626   BITFIELD(35, 2) /* index 72 */,
   8627   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(77),
   8628   BITFIELD(37, 2) /* index 77 */,
   8629   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(82),
   8630   BITFIELD(39, 2) /* index 82 */,
   8631   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(87),
   8632   BITFIELD(41, 2) /* index 87 */,
   8633   TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO,
   8634   BITFIELD(37, 2) /* index 92 */,
   8635   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(97),
   8636   BITFIELD(39, 2) /* index 97 */,
   8637   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(102),
   8638   BITFIELD(41, 2) /* index 102 */,
   8639   TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI,
   8640   BITFIELD(48, 3) /* index 107 */,
   8641   TILEPRO_OPC_NONE, TILEPRO_OPC_RLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHRI,
   8642   TILEPRO_OPC_SRAI, CHILD(116), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8643   BITFIELD(43, 3) /* index 116 */,
   8644   TILEPRO_OPC_NONE, CHILD(125), CHILD(130), CHILD(135), TILEPRO_OPC_NONE,
   8645   TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8646   BITFIELD(46, 2) /* index 125 */,
   8647   TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8648   BITFIELD(46, 2) /* index 130 */,
   8649   TILEPRO_OPC_ILL, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8650   BITFIELD(46, 2) /* index 135 */,
   8651   TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE,
   8652 };
   8653 
   8654 static const unsigned short decode_Y2_fsm[24] =
   8655 {
   8656   BITFIELD(56, 3) /* index 0 */,
   8657   CHILD(9), TILEPRO_OPC_LB_U, TILEPRO_OPC_LH, TILEPRO_OPC_LH_U,
   8658   TILEPRO_OPC_LW, TILEPRO_OPC_SB, TILEPRO_OPC_SH, TILEPRO_OPC_SW,
   8659   BITFIELD(20, 2) /* index 9 */,
   8660   TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(14),
   8661   BITFIELD(22, 2) /* index 14 */,
   8662   TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(19),
   8663   BITFIELD(24, 2) /* index 19 */,
   8664   TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_PREFETCH,
   8665 };
   8666 
   8667 #undef BITFIELD
   8668 #undef CHILD
   8669 
   8670 const unsigned short * const
   8671 tilepro_bundle_decoder_fsms[TILEPRO_NUM_PIPELINE_ENCODINGS] =
   8672 {
   8673   decode_X0_fsm,
   8674   decode_X1_fsm,
   8675   decode_Y0_fsm,
   8676   decode_Y1_fsm,
   8677   decode_Y2_fsm
   8678 };
   8679 
   8680 #ifndef DISASM_ONLY
   8681 const struct tilepro_sn_opcode tilepro_sn_opcodes[23] =
   8682 {
   8683  { "bz", TILEPRO_SN_OPC_BZ,
   8684     1 /* num_operands */,
   8685     /* operands */
   8686     { 38 },
   8687     /* fixed_bit_mask */
   8688     0xfc00,
   8689     /* fixed_bit_value */
   8690     0xe000
   8691   },
   8692   { "bnz", TILEPRO_SN_OPC_BNZ,
   8693     1 /* num_operands */,
   8694     /* operands */
   8695     { 38 },
   8696     /* fixed_bit_mask */
   8697     0xfc00,
   8698     /* fixed_bit_value */
   8699     0xe400
   8700   },
   8701   { "jrr", TILEPRO_SN_OPC_JRR,
   8702     1 /* num_operands */,
   8703     /* operands */
   8704     { 39 },
   8705     /* fixed_bit_mask */
   8706     0xff00,
   8707     /* fixed_bit_value */
   8708     0x0600
   8709   },
   8710   { "fnop", TILEPRO_SN_OPC_FNOP,
   8711     0 /* num_operands */,
   8712     /* operands */
   8713     { 0, },
   8714     /* fixed_bit_mask */
   8715     0xffff,
   8716     /* fixed_bit_value */
   8717     0x0003
   8718   },
   8719   { "blz", TILEPRO_SN_OPC_BLZ,
   8720     1 /* num_operands */,
   8721     /* operands */
   8722     { 38 },
   8723     /* fixed_bit_mask */
   8724     0xfc00,
   8725     /* fixed_bit_value */
   8726     0xf000
   8727   },
   8728   { "nop", TILEPRO_SN_OPC_NOP,
   8729     0 /* num_operands */,
   8730     /* operands */
   8731     { 0, },
   8732     /* fixed_bit_mask */
   8733     0xffff,
   8734     /* fixed_bit_value */
   8735     0x0002
   8736   },
   8737   { "movei", TILEPRO_SN_OPC_MOVEI,
   8738     1 /* num_operands */,
   8739     /* operands */
   8740     { 40 },
   8741     /* fixed_bit_mask */
   8742     0xff00,
   8743     /* fixed_bit_value */
   8744     0x0400
   8745   },
   8746   { "move", TILEPRO_SN_OPC_MOVE,
   8747     2 /* num_operands */,
   8748     /* operands */
   8749     { 41, 42 },
   8750     /* fixed_bit_mask */
   8751     0xfff0,
   8752     /* fixed_bit_value */
   8753     0x0080
   8754   },
   8755   { "bgez", TILEPRO_SN_OPC_BGEZ,
   8756     1 /* num_operands */,
   8757     /* operands */
   8758     { 38 },
   8759     /* fixed_bit_mask */
   8760     0xfc00,
   8761     /* fixed_bit_value */
   8762     0xf400
   8763   },
   8764   { "jr", TILEPRO_SN_OPC_JR,
   8765     1 /* num_operands */,
   8766     /* operands */
   8767     { 42 },
   8768     /* fixed_bit_mask */
   8769     0xfff0,
   8770     /* fixed_bit_value */
   8771     0x0040
   8772   },
   8773   { "blez", TILEPRO_SN_OPC_BLEZ,
   8774     1 /* num_operands */,
   8775     /* operands */
   8776     { 38 },
   8777     /* fixed_bit_mask */
   8778     0xfc00,
   8779     /* fixed_bit_value */
   8780     0xec00
   8781   },
   8782   { "bbns", TILEPRO_SN_OPC_BBNS,
   8783     1 /* num_operands */,
   8784     /* operands */
   8785     { 38 },
   8786     /* fixed_bit_mask */
   8787     0xfc00,
   8788     /* fixed_bit_value */
   8789     0xfc00
   8790   },
   8791   { "jalrr", TILEPRO_SN_OPC_JALRR,
   8792     1 /* num_operands */,
   8793     /* operands */
   8794     { 39 },
   8795     /* fixed_bit_mask */
   8796     0xff00,
   8797     /* fixed_bit_value */
   8798     0x0700
   8799   },
   8800   { "bpt", TILEPRO_SN_OPC_BPT,
   8801     0 /* num_operands */,
   8802     /* operands */
   8803     { 0, },
   8804     /* fixed_bit_mask */
   8805     0xffff,
   8806     /* fixed_bit_value */
   8807     0x0001
   8808   },
   8809   { "jalr", TILEPRO_SN_OPC_JALR,
   8810     1 /* num_operands */,
   8811     /* operands */
   8812     { 42 },
   8813     /* fixed_bit_mask */
   8814     0xfff0,
   8815     /* fixed_bit_value */
   8816     0x0050
   8817   },
   8818   { "shr1", TILEPRO_SN_OPC_SHR1,
   8819     2 /* num_operands */,
   8820     /* operands */
   8821     { 41, 42 },
   8822     /* fixed_bit_mask */
   8823     0xfff0,
   8824     /* fixed_bit_value */
   8825     0x0090
   8826   },
   8827   { "bgz", TILEPRO_SN_OPC_BGZ,
   8828     1 /* num_operands */,
   8829     /* operands */
   8830     { 38 },
   8831     /* fixed_bit_mask */
   8832     0xfc00,
   8833     /* fixed_bit_value */
   8834     0xe800
   8835   },
   8836   { "bbs", TILEPRO_SN_OPC_BBS,
   8837     1 /* num_operands */,
   8838     /* operands */
   8839     { 38 },
   8840     /* fixed_bit_mask */
   8841     0xfc00,
   8842     /* fixed_bit_value */
   8843     0xf800
   8844   },
   8845   { "shl8ii", TILEPRO_SN_OPC_SHL8II,
   8846     1 /* num_operands */,
   8847     /* operands */
   8848     { 39 },
   8849     /* fixed_bit_mask */
   8850     0xff00,
   8851     /* fixed_bit_value */
   8852     0x0300
   8853   },
   8854   { "addi", TILEPRO_SN_OPC_ADDI,
   8855     1 /* num_operands */,
   8856     /* operands */
   8857     { 40 },
   8858     /* fixed_bit_mask */
   8859     0xff00,
   8860     /* fixed_bit_value */
   8861     0x0500
   8862   },
   8863   { "halt", TILEPRO_SN_OPC_HALT,
   8864     0 /* num_operands */,
   8865     /* operands */
   8866     { 0, },
   8867     /* fixed_bit_mask */
   8868     0xffff,
   8869     /* fixed_bit_value */
   8870     0x0000
   8871   },
   8872   { "route", TILEPRO_SN_OPC_ROUTE, 0, { 0, }, 0, 0,
   8873   },
   8874   { 0, TILEPRO_SN_OPC_NONE, 0, { 0, }, 0, 0,
   8875   }
   8876 };
   8877 
   8878 const unsigned char tilepro_sn_route_encode[6 * 6 * 6] =
   8879 {
   8880   0xdf,
   8881   0xde,
   8882   0xdd,
   8883   0xdc,
   8884   0xdb,
   8885   0xda,
   8886   0xb9,
   8887   0xb8,
   8888   0xa1,
   8889   0xa0,
   8890   0x11,
   8891   0x10,
   8892   0x9f,
   8893   0x9e,
   8894   0x9d,
   8895   0x9c,
   8896   0x9b,
   8897   0x9a,
   8898   0x79,
   8899   0x78,
   8900   0x61,
   8901   0x60,
   8902   0xb,
   8903   0xa,
   8904   0x5f,
   8905   0x5e,
   8906   0x5d,
   8907   0x5c,
   8908   0x5b,
   8909   0x5a,
   8910   0x1f,
   8911   0x1e,
   8912   0x1d,
   8913   0x1c,
   8914   0x1b,
   8915   0x1a,
   8916   0xd7,
   8917   0xd6,
   8918   0xd5,
   8919   0xd4,
   8920   0xd3,
   8921   0xd2,
   8922   0xa7,
   8923   0xa6,
   8924   0xb1,
   8925   0xb0,
   8926   0x13,
   8927   0x12,
   8928   0x97,
   8929   0x96,
   8930   0x95,
   8931   0x94,
   8932   0x93,
   8933   0x92,
   8934   0x67,
   8935   0x66,
   8936   0x71,
   8937   0x70,
   8938   0x9,
   8939   0x8,
   8940   0x57,
   8941   0x56,
   8942   0x55,
   8943   0x54,
   8944   0x53,
   8945   0x52,
   8946   0x17,
   8947   0x16,
   8948   0x15,
   8949   0x14,
   8950   0x19,
   8951   0x18,
   8952   0xcf,
   8953   0xce,
   8954   0xcd,
   8955   0xcc,
   8956   0xcb,
   8957   0xca,
   8958   0xaf,
   8959   0xae,
   8960   0xad,
   8961   0xac,
   8962   0xab,
   8963   0xaa,
   8964   0x8f,
   8965   0x8e,
   8966   0x8d,
   8967   0x8c,
   8968   0x8b,
   8969   0x8a,
   8970   0x6f,
   8971   0x6e,
   8972   0x6d,
   8973   0x6c,
   8974   0x6b,
   8975   0x6a,
   8976   0x4f,
   8977   0x4e,
   8978   0x4d,
   8979   0x4c,
   8980   0x4b,
   8981   0x4a,
   8982   0x2f,
   8983   0x2e,
   8984   0x2d,
   8985   0x2c,
   8986   0x2b,
   8987   0x2a,
   8988   0xc9,
   8989   0xc8,
   8990   0xc5,
   8991   0xc4,
   8992   0xc3,
   8993   0xc2,
   8994   0xa9,
   8995   0xa8,
   8996   0xa5,
   8997   0xa4,
   8998   0xa3,
   8999   0xa2,
   9000   0x89,
   9001   0x88,
   9002   0x85,
   9003   0x84,
   9004   0x83,
   9005   0x82,
   9006   0x69,
   9007   0x68,
   9008   0x65,
   9009   0x64,
   9010   0x63,
   9011   0x62,
   9012   0x47,
   9013   0x46,
   9014   0x45,
   9015   0x44,
   9016   0x43,
   9017   0x42,
   9018   0x27,
   9019   0x26,
   9020   0x25,
   9021   0x24,
   9022   0x23,
   9023   0x22,
   9024   0xd9,
   9025   0xd8,
   9026   0xc1,
   9027   0xc0,
   9028   0x3b,
   9029   0x3a,
   9030   0xbf,
   9031   0xbe,
   9032   0xbd,
   9033   0xbc,
   9034   0xbb,
   9035   0xba,
   9036   0x99,
   9037   0x98,
   9038   0x81,
   9039   0x80,
   9040   0x31,
   9041   0x30,
   9042   0x7f,
   9043   0x7e,
   9044   0x7d,
   9045   0x7c,
   9046   0x7b,
   9047   0x7a,
   9048   0x59,
   9049   0x58,
   9050   0x3d,
   9051   0x3c,
   9052   0x49,
   9053   0x48,
   9054   0xf,
   9055   0xe,
   9056   0xd,
   9057   0xc,
   9058   0x29,
   9059   0x28,
   9060   0xc7,
   9061   0xc6,
   9062   0xd1,
   9063   0xd0,
   9064   0x39,
   9065   0x38,
   9066   0xb7,
   9067   0xb6,
   9068   0xb5,
   9069   0xb4,
   9070   0xb3,
   9071   0xb2,
   9072   0x87,
   9073   0x86,
   9074   0x91,
   9075   0x90,
   9076   0x33,
   9077   0x32,
   9078   0x77,
   9079   0x76,
   9080   0x75,
   9081   0x74,
   9082   0x73,
   9083   0x72,
   9084   0x3f,
   9085   0x3e,
   9086   0x51,
   9087   0x50,
   9088   0x41,
   9089   0x40,
   9090   0x37,
   9091   0x36,
   9092   0x35,
   9093   0x34,
   9094   0x21,
   9095   0x20
   9096 };
   9097 
   9098 const signed char tilepro_sn_route_decode[256][3] =
   9099 {
   9100   { -1, -1, -1 },
   9101   { -1, -1, -1 },
   9102   { -1, -1, -1 },
   9103   { -1, -1, -1 },
   9104   { -1, -1, -1 },
   9105   { -1, -1, -1 },
   9106   { -1, -1, -1 },
   9107   { -1, -1, -1 },
   9108   { 5, 3, 1 },
   9109   { 4, 3, 1 },
   9110   { 5, 3, 0 },
   9111   { 4, 3, 0 },
   9112   { 3, 5, 4 },
   9113   { 2, 5, 4 },
   9114   { 1, 5, 4 },
   9115   { 0, 5, 4 },
   9116   { 5, 1, 0 },
   9117   { 4, 1, 0 },
   9118   { 5, 1, 1 },
   9119   { 4, 1, 1 },
   9120   { 3, 5, 1 },
   9121   { 2, 5, 1 },
   9122   { 1, 5, 1 },
   9123   { 0, 5, 1 },
   9124   { 5, 5, 1 },
   9125   { 4, 5, 1 },
   9126   { 5, 5, 0 },
   9127   { 4, 5, 0 },
   9128   { 3, 5, 0 },
   9129   { 2, 5, 0 },
   9130   { 1, 5, 0 },
   9131   { 0, 5, 0 },
   9132   { 5, 5, 5 },
   9133   { 4, 5, 5 },
   9134   { 5, 5, 3 },
   9135   { 4, 5, 3 },
   9136   { 3, 5, 3 },
   9137   { 2, 5, 3 },
   9138   { 1, 5, 3 },
   9139   { 0, 5, 3 },
   9140   { 5, 5, 4 },
   9141   { 4, 5, 4 },
   9142   { 5, 5, 2 },
   9143   { 4, 5, 2 },
   9144   { 3, 5, 2 },
   9145   { 2, 5, 2 },
   9146   { 1, 5, 2 },
   9147   { 0, 5, 2 },
   9148   { 5, 2, 4 },
   9149   { 4, 2, 4 },
   9150   { 5, 2, 5 },
   9151   { 4, 2, 5 },
   9152   { 3, 5, 5 },
   9153   { 2, 5, 5 },
   9154   { 1, 5, 5 },
   9155   { 0, 5, 5 },
   9156   { 5, 0, 5 },
   9157   { 4, 0, 5 },
   9158   { 5, 0, 4 },
   9159   { 4, 0, 4 },
   9160   { 3, 4, 4 },
   9161   { 2, 4, 4 },
   9162   { 1, 4, 5 },
   9163   { 0, 4, 5 },
   9164   { 5, 4, 5 },
   9165   { 4, 4, 5 },
   9166   { 5, 4, 3 },
   9167   { 4, 4, 3 },
   9168   { 3, 4, 3 },
   9169   { 2, 4, 3 },
   9170   { 1, 4, 3 },
   9171   { 0, 4, 3 },
   9172   { 5, 4, 4 },
   9173   { 4, 4, 4 },
   9174   { 5, 4, 2 },
   9175   { 4, 4, 2 },
   9176   { 3, 4, 2 },
   9177   { 2, 4, 2 },
   9178   { 1, 4, 2 },
   9179   { 0, 4, 2 },
   9180   { 3, 4, 5 },
   9181   { 2, 4, 5 },
   9182   { 5, 4, 1 },
   9183   { 4, 4, 1 },
   9184   { 3, 4, 1 },
   9185   { 2, 4, 1 },
   9186   { 1, 4, 1 },
   9187   { 0, 4, 1 },
   9188   { 1, 4, 4 },
   9189   { 0, 4, 4 },
   9190   { 5, 4, 0 },
   9191   { 4, 4, 0 },
   9192   { 3, 4, 0 },
   9193   { 2, 4, 0 },
   9194   { 1, 4, 0 },
   9195   { 0, 4, 0 },
   9196   { 3, 3, 0 },
   9197   { 2, 3, 0 },
   9198   { 5, 3, 3 },
   9199   { 4, 3, 3 },
   9200   { 3, 3, 3 },
   9201   { 2, 3, 3 },
   9202   { 1, 3, 1 },
   9203   { 0, 3, 1 },
   9204   { 1, 3, 3 },
   9205   { 0, 3, 3 },
   9206   { 5, 3, 2 },
   9207   { 4, 3, 2 },
   9208   { 3, 3, 2 },
   9209   { 2, 3, 2 },
   9210   { 1, 3, 2 },
   9211   { 0, 3, 2 },
   9212   { 3, 3, 1 },
   9213   { 2, 3, 1 },
   9214   { 5, 3, 5 },
   9215   { 4, 3, 5 },
   9216   { 3, 3, 5 },
   9217   { 2, 3, 5 },
   9218   { 1, 3, 5 },
   9219   { 0, 3, 5 },
   9220   { 1, 3, 0 },
   9221   { 0, 3, 0 },
   9222   { 5, 3, 4 },
   9223   { 4, 3, 4 },
   9224   { 3, 3, 4 },
   9225   { 2, 3, 4 },
   9226   { 1, 3, 4 },
   9227   { 0, 3, 4 },
   9228   { 3, 2, 4 },
   9229   { 2, 2, 4 },
   9230   { 5, 2, 3 },
   9231   { 4, 2, 3 },
   9232   { 3, 2, 3 },
   9233   { 2, 2, 3 },
   9234   { 1, 2, 5 },
   9235   { 0, 2, 5 },
   9236   { 1, 2, 3 },
   9237   { 0, 2, 3 },
   9238   { 5, 2, 2 },
   9239   { 4, 2, 2 },
   9240   { 3, 2, 2 },
   9241   { 2, 2, 2 },
   9242   { 1, 2, 2 },
   9243   { 0, 2, 2 },
   9244   { 3, 2, 5 },
   9245   { 2, 2, 5 },
   9246   { 5, 2, 1 },
   9247   { 4, 2, 1 },
   9248   { 3, 2, 1 },
   9249   { 2, 2, 1 },
   9250   { 1, 2, 1 },
   9251   { 0, 2, 1 },
   9252   { 1, 2, 4 },
   9253   { 0, 2, 4 },
   9254   { 5, 2, 0 },
   9255   { 4, 2, 0 },
   9256   { 3, 2, 0 },
   9257   { 2, 2, 0 },
   9258   { 1, 2, 0 },
   9259   { 0, 2, 0 },
   9260   { 3, 1, 0 },
   9261   { 2, 1, 0 },
   9262   { 5, 1, 3 },
   9263   { 4, 1, 3 },
   9264   { 3, 1, 3 },
   9265   { 2, 1, 3 },
   9266   { 1, 1, 1 },
   9267   { 0, 1, 1 },
   9268   { 1, 1, 3 },
   9269   { 0, 1, 3 },
   9270   { 5, 1, 2 },
   9271   { 4, 1, 2 },
   9272   { 3, 1, 2 },
   9273   { 2, 1, 2 },
   9274   { 1, 1, 2 },
   9275   { 0, 1, 2 },
   9276   { 3, 1, 1 },
   9277   { 2, 1, 1 },
   9278   { 5, 1, 5 },
   9279   { 4, 1, 5 },
   9280   { 3, 1, 5 },
   9281   { 2, 1, 5 },
   9282   { 1, 1, 5 },
   9283   { 0, 1, 5 },
   9284   { 1, 1, 0 },
   9285   { 0, 1, 0 },
   9286   { 5, 1, 4 },
   9287   { 4, 1, 4 },
   9288   { 3, 1, 4 },
   9289   { 2, 1, 4 },
   9290   { 1, 1, 4 },
   9291   { 0, 1, 4 },
   9292   { 3, 0, 4 },
   9293   { 2, 0, 4 },
   9294   { 5, 0, 3 },
   9295   { 4, 0, 3 },
   9296   { 3, 0, 3 },
   9297   { 2, 0, 3 },
   9298   { 1, 0, 5 },
   9299   { 0, 0, 5 },
   9300   { 1, 0, 3 },
   9301   { 0, 0, 3 },
   9302   { 5, 0, 2 },
   9303   { 4, 0, 2 },
   9304   { 3, 0, 2 },
   9305   { 2, 0, 2 },
   9306   { 1, 0, 2 },
   9307   { 0, 0, 2 },
   9308   { 3, 0, 5 },
   9309   { 2, 0, 5 },
   9310   { 5, 0, 1 },
   9311   { 4, 0, 1 },
   9312   { 3, 0, 1 },
   9313   { 2, 0, 1 },
   9314   { 1, 0, 1 },
   9315   { 0, 0, 1 },
   9316   { 1, 0, 4 },
   9317   { 0, 0, 4 },
   9318   { 5, 0, 0 },
   9319   { 4, 0, 0 },
   9320   { 3, 0, 0 },
   9321   { 2, 0, 0 },
   9322   { 1, 0, 0 },
   9323   { 0, 0, 0 },
   9324   { -1, -1, -1 },
   9325   { -1, -1, -1 },
   9326   { -1, -1, -1 },
   9327   { -1, -1, -1 },
   9328   { -1, -1, -1 },
   9329   { -1, -1, -1 },
   9330   { -1, -1, -1 },
   9331   { -1, -1, -1 },
   9332   { -1, -1, -1 },
   9333   { -1, -1, -1 },
   9334   { -1, -1, -1 },
   9335   { -1, -1, -1 },
   9336   { -1, -1, -1 },
   9337   { -1, -1, -1 },
   9338   { -1, -1, -1 },
   9339   { -1, -1, -1 },
   9340   { -1, -1, -1 },
   9341   { -1, -1, -1 },
   9342   { -1, -1, -1 },
   9343   { -1, -1, -1 },
   9344   { -1, -1, -1 },
   9345   { -1, -1, -1 },
   9346   { -1, -1, -1 },
   9347   { -1, -1, -1 },
   9348   { -1, -1, -1 },
   9349   { -1, -1, -1 },
   9350   { -1, -1, -1 },
   9351   { -1, -1, -1 },
   9352   { -1, -1, -1 },
   9353   { -1, -1, -1 },
   9354   { -1, -1, -1 },
   9355   { -1, -1, -1 }
   9356 };
   9357 
   9358 const char tilepro_sn_direction_names[6][5] =
   9359 {
   9360   "w",
   9361   "c",
   9362   "acc",
   9363   "n",
   9364   "e",
   9365   "s"
   9366 };
   9367 
   9368 const signed char tilepro_sn_dest_map[6][6] =
   9369 {
   9370   { -1, 3, 4, 5, 1, 2 } /* val -> w */,
   9371   { -1, 3, 4, 5, 0, 2 } /* val -> c */,
   9372   { -1, 3, 4, 5, 0, 1 } /* val -> acc */,
   9373   { -1, 4, 5, 0, 1, 2 } /* val -> n */,
   9374   { -1, 3, 5, 0, 1, 2 } /* val -> e */,
   9375   { -1, 3, 4, 0, 1, 2 } /* val -> s */
   9376 };
   9377 #endif /* DISASM_ONLY */
   9378 
   9379 const struct tilepro_operand tilepro_operands[43] =
   9380 {
   9381   {
   9382     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_X0),
   9383     8, 1, 0, 0, 0, 0,
   9384     create_Imm8_X0, get_Imm8_X0
   9385   },
   9386   {
   9387     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_X1),
   9388     8, 1, 0, 0, 0, 0,
   9389     create_Imm8_X1, get_Imm8_X1
   9390   },
   9391   {
   9392     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_Y0),
   9393     8, 1, 0, 0, 0, 0,
   9394     create_Imm8_Y0, get_Imm8_Y0
   9395   },
   9396   {
   9397     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_Y1),
   9398     8, 1, 0, 0, 0, 0,
   9399     create_Imm8_Y1, get_Imm8_Y1
   9400   },
   9401   {
   9402     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM16_X0),
   9403     16, 1, 0, 0, 0, 0,
   9404     create_Imm16_X0, get_Imm16_X0
   9405   },
   9406   {
   9407     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM16_X1),
   9408     16, 1, 0, 0, 0, 0,
   9409     create_Imm16_X1, get_Imm16_X1
   9410   },
   9411   {
   9412     TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(TILEPRO_JOFFLONG_X1),
   9413     29, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
   9414     create_JOffLong_X1, get_JOffLong_X1
   9415   },
   9416   {
   9417     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9418     6, 0, 0, 1, 0, 0,
   9419     create_Dest_X1, get_Dest_X1
   9420   },
   9421   {
   9422     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9423     6, 0, 1, 0, 0, 0,
   9424     create_SrcA_X1, get_SrcA_X1
   9425   },
   9426   {
   9427     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9428     6, 0, 0, 1, 0, 0,
   9429     create_Dest_X0, get_Dest_X0
   9430   },
   9431   {
   9432     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9433     6, 0, 1, 0, 0, 0,
   9434     create_SrcA_X0, get_SrcA_X0
   9435   },
   9436   {
   9437     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9438     6, 0, 0, 1, 0, 0,
   9439     create_Dest_Y0, get_Dest_Y0
   9440   },
   9441   {
   9442     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9443     6, 0, 1, 0, 0, 0,
   9444     create_SrcA_Y0, get_SrcA_Y0
   9445   },
   9446   {
   9447     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9448     6, 0, 0, 1, 0, 0,
   9449     create_Dest_Y1, get_Dest_Y1
   9450   },
   9451   {
   9452     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9453     6, 0, 1, 0, 0, 0,
   9454     create_SrcA_Y1, get_SrcA_Y1
   9455   },
   9456   {
   9457     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9458     6, 0, 1, 0, 0, 0,
   9459     create_SrcA_Y2, get_SrcA_Y2
   9460   },
   9461   {
   9462     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9463     6, 0, 1, 0, 0, 0,
   9464     create_SrcB_X0, get_SrcB_X0
   9465   },
   9466   {
   9467     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9468     6, 0, 1, 0, 0, 0,
   9469     create_SrcB_X1, get_SrcB_X1
   9470   },
   9471   {
   9472     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9473     6, 0, 1, 0, 0, 0,
   9474     create_SrcB_Y0, get_SrcB_Y0
   9475   },
   9476   {
   9477     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9478     6, 0, 1, 0, 0, 0,
   9479     create_SrcB_Y1, get_SrcB_Y1
   9480   },
   9481   {
   9482     TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(TILEPRO_BROFF_X1),
   9483     17, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
   9484     create_BrOff_X1, get_BrOff_X1
   9485   },
   9486   {
   9487     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9488     6, 0, 1, 1, 0, 0,
   9489     create_Dest_X0, get_Dest_X0
   9490   },
   9491   {
   9492     TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(NONE),
   9493     28, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
   9494     create_JOff_X1, get_JOff_X1
   9495   },
   9496   {
   9497     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9498     6, 0, 0, 1, 0, 0,
   9499     create_SrcBDest_Y2, get_SrcBDest_Y2
   9500   },
   9501   {
   9502     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9503     6, 0, 1, 1, 0, 0,
   9504     create_SrcA_X1, get_SrcA_X1
   9505   },
   9506   {
   9507     TILEPRO_OP_TYPE_SPR, BFD_RELOC(TILEPRO_MF_IMM15_X1),
   9508     15, 0, 0, 0, 0, 0,
   9509     create_MF_Imm15_X1, get_MF_Imm15_X1
   9510   },
   9511   {
   9512     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMSTART_X0),
   9513     5, 0, 0, 0, 0, 0,
   9514     create_MMStart_X0, get_MMStart_X0
   9515   },
   9516   {
   9517     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMEND_X0),
   9518     5, 0, 0, 0, 0, 0,
   9519     create_MMEnd_X0, get_MMEnd_X0
   9520   },
   9521   {
   9522     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMSTART_X1),
   9523     5, 0, 0, 0, 0, 0,
   9524     create_MMStart_X1, get_MMStart_X1
   9525   },
   9526   {
   9527     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMEND_X1),
   9528     5, 0, 0, 0, 0, 0,
   9529     create_MMEnd_X1, get_MMEnd_X1
   9530   },
   9531   {
   9532     TILEPRO_OP_TYPE_SPR, BFD_RELOC(TILEPRO_MT_IMM15_X1),
   9533     15, 0, 0, 0, 0, 0,
   9534     create_MT_Imm15_X1, get_MT_Imm15_X1
   9535   },
   9536   {
   9537     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9538     6, 0, 1, 1, 0, 0,
   9539     create_Dest_Y0, get_Dest_Y0
   9540   },
   9541   {
   9542     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_X0),
   9543     5, 0, 0, 0, 0, 0,
   9544     create_ShAmt_X0, get_ShAmt_X0
   9545   },
   9546   {
   9547     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_X1),
   9548     5, 0, 0, 0, 0, 0,
   9549     create_ShAmt_X1, get_ShAmt_X1
   9550   },
   9551   {
   9552     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_Y0),
   9553     5, 0, 0, 0, 0, 0,
   9554     create_ShAmt_Y0, get_ShAmt_Y0
   9555   },
   9556   {
   9557     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_Y1),
   9558     5, 0, 0, 0, 0, 0,
   9559     create_ShAmt_Y1, get_ShAmt_Y1
   9560   },
   9561   {
   9562     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9563     6, 0, 1, 0, 0, 0,
   9564     create_SrcBDest_Y2, get_SrcBDest_Y2
   9565   },
   9566   {
   9567     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_DEST_IMM8_X1),
   9568     8, 1, 0, 0, 0, 0,
   9569     create_Dest_Imm8_X1, get_Dest_Imm8_X1
   9570   },
   9571   {
   9572     TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(NONE),
   9573     10, 1, 0, 0, 1, TILEPRO_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES,
   9574     create_BrOff_SN, get_BrOff_SN
   9575   },
   9576   {
   9577     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE),
   9578     8, 0, 0, 0, 0, 0,
   9579     create_Imm8_SN, get_Imm8_SN
   9580   },
   9581   {
   9582     TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE),
   9583     8, 1, 0, 0, 0, 0,
   9584     create_Imm8_SN, get_Imm8_SN
   9585   },
   9586   {
   9587     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9588     2, 0, 0, 1, 0, 0,
   9589     create_Dest_SN, get_Dest_SN
   9590   },
   9591   {
   9592     TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   9593     2, 0, 1, 0, 0, 0,
   9594     create_Src_SN, get_Src_SN
   9595   }
   9596 };
   9597 
   9598 #ifndef DISASM_ONLY
   9599 const struct tilepro_spr tilepro_sprs[] =
   9600 {
   9601   { 0, "MPL_ITLB_MISS_SET_0" },
   9602   { 1, "MPL_ITLB_MISS_SET_1" },
   9603   { 2, "MPL_ITLB_MISS_SET_2" },
   9604   { 3, "MPL_ITLB_MISS_SET_3" },
   9605   { 4, "MPL_ITLB_MISS" },
   9606   { 256, "ITLB_CURRENT_0" },
   9607   { 257, "ITLB_CURRENT_1" },
   9608   { 258, "ITLB_CURRENT_2" },
   9609   { 259, "ITLB_CURRENT_3" },
   9610   { 260, "ITLB_INDEX" },
   9611   { 261, "ITLB_MATCH_0" },
   9612   { 262, "ITLB_PR" },
   9613   { 263, "NUMBER_ITLB" },
   9614   { 264, "REPLACEMENT_ITLB" },
   9615   { 265, "WIRED_ITLB" },
   9616   { 266, "ITLB_PERF" },
   9617   { 512, "MPL_MEM_ERROR_SET_0" },
   9618   { 513, "MPL_MEM_ERROR_SET_1" },
   9619   { 514, "MPL_MEM_ERROR_SET_2" },
   9620   { 515, "MPL_MEM_ERROR_SET_3" },
   9621   { 516, "MPL_MEM_ERROR" },
   9622   { 517, "L1_I_ERROR" },
   9623   { 518, "MEM_ERROR_CBOX_ADDR" },
   9624   { 519, "MEM_ERROR_CBOX_STATUS" },
   9625   { 520, "MEM_ERROR_ENABLE" },
   9626   { 521, "MEM_ERROR_MBOX_ADDR" },
   9627   { 522, "MEM_ERROR_MBOX_STATUS" },
   9628   { 523, "SNIC_ERROR_LOG_STATUS" },
   9629   { 524, "SNIC_ERROR_LOG_VA" },
   9630   { 525, "XDN_DEMUX_ERROR" },
   9631   { 1024, "MPL_ILL_SET_0" },
   9632   { 1025, "MPL_ILL_SET_1" },
   9633   { 1026, "MPL_ILL_SET_2" },
   9634   { 1027, "MPL_ILL_SET_3" },
   9635   { 1028, "MPL_ILL" },
   9636   { 1536, "MPL_GPV_SET_0" },
   9637   { 1537, "MPL_GPV_SET_1" },
   9638   { 1538, "MPL_GPV_SET_2" },
   9639   { 1539, "MPL_GPV_SET_3" },
   9640   { 1540, "MPL_GPV" },
   9641   { 1541, "GPV_REASON" },
   9642   { 2048, "MPL_SN_ACCESS_SET_0" },
   9643   { 2049, "MPL_SN_ACCESS_SET_1" },
   9644   { 2050, "MPL_SN_ACCESS_SET_2" },
   9645   { 2051, "MPL_SN_ACCESS_SET_3" },
   9646   { 2052, "MPL_SN_ACCESS" },
   9647   { 2053, "SNCTL" },
   9648   { 2054, "SNFIFO_DATA" },
   9649   { 2055, "SNFIFO_SEL" },
   9650   { 2056, "SNIC_INVADDR" },
   9651   { 2057, "SNISTATE" },
   9652   { 2058, "SNOSTATE" },
   9653   { 2059, "SNPC" },
   9654   { 2060, "SNSTATIC" },
   9655   { 2304, "SN_DATA_AVAIL" },
   9656   { 2560, "MPL_IDN_ACCESS_SET_0" },
   9657   { 2561, "MPL_IDN_ACCESS_SET_1" },
   9658   { 2562, "MPL_IDN_ACCESS_SET_2" },
   9659   { 2563, "MPL_IDN_ACCESS_SET_3" },
   9660   { 2564, "MPL_IDN_ACCESS" },
   9661   { 2565, "IDN_DEMUX_CA_COUNT" },
   9662   { 2566, "IDN_DEMUX_COUNT_0" },
   9663   { 2567, "IDN_DEMUX_COUNT_1" },
   9664   { 2568, "IDN_DEMUX_CTL" },
   9665   { 2569, "IDN_DEMUX_CURR_TAG" },
   9666   { 2570, "IDN_DEMUX_QUEUE_SEL" },
   9667   { 2571, "IDN_DEMUX_STATUS" },
   9668   { 2572, "IDN_DEMUX_WRITE_FIFO" },
   9669   { 2573, "IDN_DEMUX_WRITE_QUEUE" },
   9670   { 2574, "IDN_PENDING" },
   9671   { 2575, "IDN_SP_FIFO_DATA" },
   9672   { 2576, "IDN_SP_FIFO_SEL" },
   9673   { 2577, "IDN_SP_FREEZE" },
   9674   { 2578, "IDN_SP_STATE" },
   9675   { 2579, "IDN_TAG_0" },
   9676   { 2580, "IDN_TAG_1" },
   9677   { 2581, "IDN_TAG_VALID" },
   9678   { 2582, "IDN_TILE_COORD" },
   9679   { 2816, "IDN_CA_DATA" },
   9680   { 2817, "IDN_CA_REM" },
   9681   { 2818, "IDN_CA_TAG" },
   9682   { 2819, "IDN_DATA_AVAIL" },
   9683   { 3072, "MPL_UDN_ACCESS_SET_0" },
   9684   { 3073, "MPL_UDN_ACCESS_SET_1" },
   9685   { 3074, "MPL_UDN_ACCESS_SET_2" },
   9686   { 3075, "MPL_UDN_ACCESS_SET_3" },
   9687   { 3076, "MPL_UDN_ACCESS" },
   9688   { 3077, "UDN_DEMUX_CA_COUNT" },
   9689   { 3078, "UDN_DEMUX_COUNT_0" },
   9690   { 3079, "UDN_DEMUX_COUNT_1" },
   9691   { 3080, "UDN_DEMUX_COUNT_2" },
   9692   { 3081, "UDN_DEMUX_COUNT_3" },
   9693   { 3082, "UDN_DEMUX_CTL" },
   9694   { 3083, "UDN_DEMUX_CURR_TAG" },
   9695   { 3084, "UDN_DEMUX_QUEUE_SEL" },
   9696   { 3085, "UDN_DEMUX_STATUS" },
   9697   { 3086, "UDN_DEMUX_WRITE_FIFO" },
   9698   { 3087, "UDN_DEMUX_WRITE_QUEUE" },
   9699   { 3088, "UDN_PENDING" },
   9700   { 3089, "UDN_SP_FIFO_DATA" },
   9701   { 3090, "UDN_SP_FIFO_SEL" },
   9702   { 3091, "UDN_SP_FREEZE" },
   9703   { 3092, "UDN_SP_STATE" },
   9704   { 3093, "UDN_TAG_0" },
   9705   { 3094, "UDN_TAG_1" },
   9706   { 3095, "UDN_TAG_2" },
   9707   { 3096, "UDN_TAG_3" },
   9708   { 3097, "UDN_TAG_VALID" },
   9709   { 3098, "UDN_TILE_COORD" },
   9710   { 3328, "UDN_CA_DATA" },
   9711   { 3329, "UDN_CA_REM" },
   9712   { 3330, "UDN_CA_TAG" },
   9713   { 3331, "UDN_DATA_AVAIL" },
   9714   { 3584, "MPL_IDN_REFILL_SET_0" },
   9715   { 3585, "MPL_IDN_REFILL_SET_1" },
   9716   { 3586, "MPL_IDN_REFILL_SET_2" },
   9717   { 3587, "MPL_IDN_REFILL_SET_3" },
   9718   { 3588, "MPL_IDN_REFILL" },
   9719   { 3589, "IDN_REFILL_EN" },
   9720   { 4096, "MPL_UDN_REFILL_SET_0" },
   9721   { 4097, "MPL_UDN_REFILL_SET_1" },
   9722   { 4098, "MPL_UDN_REFILL_SET_2" },
   9723   { 4099, "MPL_UDN_REFILL_SET_3" },
   9724   { 4100, "MPL_UDN_REFILL" },
   9725   { 4101, "UDN_REFILL_EN" },
   9726   { 4608, "MPL_IDN_COMPLETE_SET_0" },
   9727   { 4609, "MPL_IDN_COMPLETE_SET_1" },
   9728   { 4610, "MPL_IDN_COMPLETE_SET_2" },
   9729   { 4611, "MPL_IDN_COMPLETE_SET_3" },
   9730   { 4612, "MPL_IDN_COMPLETE" },
   9731   { 4613, "IDN_REMAINING" },
   9732   { 5120, "MPL_UDN_COMPLETE_SET_0" },
   9733   { 5121, "MPL_UDN_COMPLETE_SET_1" },
   9734   { 5122, "MPL_UDN_COMPLETE_SET_2" },
   9735   { 5123, "MPL_UDN_COMPLETE_SET_3" },
   9736   { 5124, "MPL_UDN_COMPLETE" },
   9737   { 5125, "UDN_REMAINING" },
   9738   { 5632, "MPL_SWINT_3_SET_0" },
   9739   { 5633, "MPL_SWINT_3_SET_1" },
   9740   { 5634, "MPL_SWINT_3_SET_2" },
   9741   { 5635, "MPL_SWINT_3_SET_3" },
   9742   { 5636, "MPL_SWINT_3" },
   9743   { 6144, "MPL_SWINT_2_SET_0" },
   9744   { 6145, "MPL_SWINT_2_SET_1" },
   9745   { 6146, "MPL_SWINT_2_SET_2" },
   9746   { 6147, "MPL_SWINT_2_SET_3" },
   9747   { 6148, "MPL_SWINT_2" },
   9748   { 6656, "MPL_SWINT_1_SET_0" },
   9749   { 6657, "MPL_SWINT_1_SET_1" },
   9750   { 6658, "MPL_SWINT_1_SET_2" },
   9751   { 6659, "MPL_SWINT_1_SET_3" },
   9752   { 6660, "MPL_SWINT_1" },
   9753   { 7168, "MPL_SWINT_0_SET_0" },
   9754   { 7169, "MPL_SWINT_0_SET_1" },
   9755   { 7170, "MPL_SWINT_0_SET_2" },
   9756   { 7171, "MPL_SWINT_0_SET_3" },
   9757   { 7172, "MPL_SWINT_0" },
   9758   { 7680, "MPL_UNALIGN_DATA_SET_0" },
   9759   { 7681, "MPL_UNALIGN_DATA_SET_1" },
   9760   { 7682, "MPL_UNALIGN_DATA_SET_2" },
   9761   { 7683, "MPL_UNALIGN_DATA_SET_3" },
   9762   { 7684, "MPL_UNALIGN_DATA" },
   9763   { 8192, "MPL_DTLB_MISS_SET_0" },
   9764   { 8193, "MPL_DTLB_MISS_SET_1" },
   9765   { 8194, "MPL_DTLB_MISS_SET_2" },
   9766   { 8195, "MPL_DTLB_MISS_SET_3" },
   9767   { 8196, "MPL_DTLB_MISS" },
   9768   { 8448, "AER_0" },
   9769   { 8449, "AER_1" },
   9770   { 8450, "DTLB_BAD_ADDR" },
   9771   { 8451, "DTLB_BAD_ADDR_REASON" },
   9772   { 8452, "DTLB_CURRENT_0" },
   9773   { 8453, "DTLB_CURRENT_1" },
   9774   { 8454, "DTLB_CURRENT_2" },
   9775   { 8455, "DTLB_CURRENT_3" },
   9776   { 8456, "DTLB_INDEX" },
   9777   { 8457, "DTLB_MATCH_0" },
   9778   { 8458, "NUMBER_DTLB" },
   9779   { 8459, "PHYSICAL_MEMORY_MODE" },
   9780   { 8460, "REPLACEMENT_DTLB" },
   9781   { 8461, "WIRED_DTLB" },
   9782   { 8462, "CACHE_RED_WAY_OVERRIDDEN" },
   9783   { 8463, "DTLB_PERF" },
   9784   { 8704, "MPL_DTLB_ACCESS_SET_0" },
   9785   { 8705, "MPL_DTLB_ACCESS_SET_1" },
   9786   { 8706, "MPL_DTLB_ACCESS_SET_2" },
   9787   { 8707, "MPL_DTLB_ACCESS_SET_3" },
   9788   { 8708, "MPL_DTLB_ACCESS" },
   9789   { 9216, "MPL_DMATLB_MISS_SET_0" },
   9790   { 9217, "MPL_DMATLB_MISS_SET_1" },
   9791   { 9218, "MPL_DMATLB_MISS_SET_2" },
   9792   { 9219, "MPL_DMATLB_MISS_SET_3" },
   9793   { 9220, "MPL_DMATLB_MISS" },
   9794   { 9472, "DMA_BAD_ADDR" },
   9795   { 9473, "DMA_STATUS" },
   9796   { 9728, "MPL_DMATLB_ACCESS_SET_0" },
   9797   { 9729, "MPL_DMATLB_ACCESS_SET_1" },
   9798   { 9730, "MPL_DMATLB_ACCESS_SET_2" },
   9799   { 9731, "MPL_DMATLB_ACCESS_SET_3" },
   9800   { 9732, "MPL_DMATLB_ACCESS" },
   9801   { 10240, "MPL_SNITLB_MISS_SET_0" },
   9802   { 10241, "MPL_SNITLB_MISS_SET_1" },
   9803   { 10242, "MPL_SNITLB_MISS_SET_2" },
   9804   { 10243, "MPL_SNITLB_MISS_SET_3" },
   9805   { 10244, "MPL_SNITLB_MISS" },
   9806   { 10245, "NUMBER_SNITLB" },
   9807   { 10246, "REPLACEMENT_SNITLB" },
   9808   { 10247, "SNITLB_CURRENT_0" },
   9809   { 10248, "SNITLB_CURRENT_1" },
   9810   { 10249, "SNITLB_CURRENT_2" },
   9811   { 10250, "SNITLB_CURRENT_3" },
   9812   { 10251, "SNITLB_INDEX" },
   9813   { 10252, "SNITLB_MATCH_0" },
   9814   { 10253, "SNITLB_PR" },
   9815   { 10254, "WIRED_SNITLB" },
   9816   { 10255, "SNITLB_STATUS" },
   9817   { 10752, "MPL_SN_NOTIFY_SET_0" },
   9818   { 10753, "MPL_SN_NOTIFY_SET_1" },
   9819   { 10754, "MPL_SN_NOTIFY_SET_2" },
   9820   { 10755, "MPL_SN_NOTIFY_SET_3" },
   9821   { 10756, "MPL_SN_NOTIFY" },
   9822   { 10757, "SN_NOTIFY_STATUS" },
   9823   { 11264, "MPL_SN_FIREWALL_SET_0" },
   9824   { 11265, "MPL_SN_FIREWALL_SET_1" },
   9825   { 11266, "MPL_SN_FIREWALL_SET_2" },
   9826   { 11267, "MPL_SN_FIREWALL_SET_3" },
   9827   { 11268, "MPL_SN_FIREWALL" },
   9828   { 11269, "SN_DIRECTION_PROTECT" },
   9829   { 11776, "MPL_IDN_FIREWALL_SET_0" },
   9830   { 11777, "MPL_IDN_FIREWALL_SET_1" },
   9831   { 11778, "MPL_IDN_FIREWALL_SET_2" },
   9832   { 11779, "MPL_IDN_FIREWALL_SET_3" },
   9833   { 11780, "MPL_IDN_FIREWALL" },
   9834   { 11781, "IDN_DIRECTION_PROTECT" },
   9835   { 12288, "MPL_UDN_FIREWALL_SET_0" },
   9836   { 12289, "MPL_UDN_FIREWALL_SET_1" },
   9837   { 12290, "MPL_UDN_FIREWALL_SET_2" },
   9838   { 12291, "MPL_UDN_FIREWALL_SET_3" },
   9839   { 12292, "MPL_UDN_FIREWALL" },
   9840   { 12293, "UDN_DIRECTION_PROTECT" },
   9841   { 12800, "MPL_TILE_TIMER_SET_0" },
   9842   { 12801, "MPL_TILE_TIMER_SET_1" },
   9843   { 12802, "MPL_TILE_TIMER_SET_2" },
   9844   { 12803, "MPL_TILE_TIMER_SET_3" },
   9845   { 12804, "MPL_TILE_TIMER" },
   9846   { 12805, "TILE_TIMER_CONTROL" },
   9847   { 13312, "MPL_IDN_TIMER_SET_0" },
   9848   { 13313, "MPL_IDN_TIMER_SET_1" },
   9849   { 13314, "MPL_IDN_TIMER_SET_2" },
   9850   { 13315, "MPL_IDN_TIMER_SET_3" },
   9851   { 13316, "MPL_IDN_TIMER" },
   9852   { 13317, "IDN_DEADLOCK_COUNT" },
   9853   { 13318, "IDN_DEADLOCK_TIMEOUT" },
   9854   { 13824, "MPL_UDN_TIMER_SET_0" },
   9855   { 13825, "MPL_UDN_TIMER_SET_1" },
   9856   { 13826, "MPL_UDN_TIMER_SET_2" },
   9857   { 13827, "MPL_UDN_TIMER_SET_3" },
   9858   { 13828, "MPL_UDN_TIMER" },
   9859   { 13829, "UDN_DEADLOCK_COUNT" },
   9860   { 13830, "UDN_DEADLOCK_TIMEOUT" },
   9861   { 14336, "MPL_DMA_NOTIFY_SET_0" },
   9862   { 14337, "MPL_DMA_NOTIFY_SET_1" },
   9863   { 14338, "MPL_DMA_NOTIFY_SET_2" },
   9864   { 14339, "MPL_DMA_NOTIFY_SET_3" },
   9865   { 14340, "MPL_DMA_NOTIFY" },
   9866   { 14592, "DMA_BYTE" },
   9867   { 14593, "DMA_CHUNK_SIZE" },
   9868   { 14594, "DMA_CTR" },
   9869   { 14595, "DMA_DST_ADDR" },
   9870   { 14596, "DMA_DST_CHUNK_ADDR" },
   9871   { 14597, "DMA_SRC_ADDR" },
   9872   { 14598, "DMA_SRC_CHUNK_ADDR" },
   9873   { 14599, "DMA_STRIDE" },
   9874   { 14600, "DMA_USER_STATUS" },
   9875   { 14848, "MPL_IDN_CA_SET_0" },
   9876   { 14849, "MPL_IDN_CA_SET_1" },
   9877   { 14850, "MPL_IDN_CA_SET_2" },
   9878   { 14851, "MPL_IDN_CA_SET_3" },
   9879   { 14852, "MPL_IDN_CA" },
   9880   { 15360, "MPL_UDN_CA_SET_0" },
   9881   { 15361, "MPL_UDN_CA_SET_1" },
   9882   { 15362, "MPL_UDN_CA_SET_2" },
   9883   { 15363, "MPL_UDN_CA_SET_3" },
   9884   { 15364, "MPL_UDN_CA" },
   9885   { 15872, "MPL_IDN_AVAIL_SET_0" },
   9886   { 15873, "MPL_IDN_AVAIL_SET_1" },
   9887   { 15874, "MPL_IDN_AVAIL_SET_2" },
   9888   { 15875, "MPL_IDN_AVAIL_SET_3" },
   9889   { 15876, "MPL_IDN_AVAIL" },
   9890   { 15877, "IDN_AVAIL_EN" },
   9891   { 16384, "MPL_UDN_AVAIL_SET_0" },
   9892   { 16385, "MPL_UDN_AVAIL_SET_1" },
   9893   { 16386, "MPL_UDN_AVAIL_SET_2" },
   9894   { 16387, "MPL_UDN_AVAIL_SET_3" },
   9895   { 16388, "MPL_UDN_AVAIL" },
   9896   { 16389, "UDN_AVAIL_EN" },
   9897   { 16896, "MPL_PERF_COUNT_SET_0" },
   9898   { 16897, "MPL_PERF_COUNT_SET_1" },
   9899   { 16898, "MPL_PERF_COUNT_SET_2" },
   9900   { 16899, "MPL_PERF_COUNT_SET_3" },
   9901   { 16900, "MPL_PERF_COUNT" },
   9902   { 16901, "PERF_COUNT_0" },
   9903   { 16902, "PERF_COUNT_1" },
   9904   { 16903, "PERF_COUNT_CTL" },
   9905   { 16904, "PERF_COUNT_STS" },
   9906   { 16905, "WATCH_CTL" },
   9907   { 16906, "WATCH_MASK" },
   9908   { 16907, "WATCH_VAL" },
   9909   { 16912, "PERF_COUNT_DN_CTL" },
   9910   { 17408, "MPL_INTCTRL_3_SET_0" },
   9911   { 17409, "MPL_INTCTRL_3_SET_1" },
   9912   { 17410, "MPL_INTCTRL_3_SET_2" },
   9913   { 17411, "MPL_INTCTRL_3_SET_3" },
   9914   { 17412, "MPL_INTCTRL_3" },
   9915   { 17413, "EX_CONTEXT_3_0" },
   9916   { 17414, "EX_CONTEXT_3_1" },
   9917   { 17415, "INTERRUPT_MASK_3_0" },
   9918   { 17416, "INTERRUPT_MASK_3_1" },
   9919   { 17417, "INTERRUPT_MASK_RESET_3_0" },
   9920   { 17418, "INTERRUPT_MASK_RESET_3_1" },
   9921   { 17419, "INTERRUPT_MASK_SET_3_0" },
   9922   { 17420, "INTERRUPT_MASK_SET_3_1" },
   9923   { 17432, "INTCTRL_3_STATUS" },
   9924   { 17664, "SYSTEM_SAVE_3_0" },
   9925   { 17665, "SYSTEM_SAVE_3_1" },
   9926   { 17666, "SYSTEM_SAVE_3_2" },
   9927   { 17667, "SYSTEM_SAVE_3_3" },
   9928   { 17920, "MPL_INTCTRL_2_SET_0" },
   9929   { 17921, "MPL_INTCTRL_2_SET_1" },
   9930   { 17922, "MPL_INTCTRL_2_SET_2" },
   9931   { 17923, "MPL_INTCTRL_2_SET_3" },
   9932   { 17924, "MPL_INTCTRL_2" },
   9933   { 17925, "EX_CONTEXT_2_0" },
   9934   { 17926, "EX_CONTEXT_2_1" },
   9935   { 17927, "INTCTRL_2_STATUS" },
   9936   { 17928, "INTERRUPT_MASK_2_0" },
   9937   { 17929, "INTERRUPT_MASK_2_1" },
   9938   { 17930, "INTERRUPT_MASK_RESET_2_0" },
   9939   { 17931, "INTERRUPT_MASK_RESET_2_1" },
   9940   { 17932, "INTERRUPT_MASK_SET_2_0" },
   9941   { 17933, "INTERRUPT_MASK_SET_2_1" },
   9942   { 18176, "SYSTEM_SAVE_2_0" },
   9943   { 18177, "SYSTEM_SAVE_2_1" },
   9944   { 18178, "SYSTEM_SAVE_2_2" },
   9945   { 18179, "SYSTEM_SAVE_2_3" },
   9946   { 18432, "MPL_INTCTRL_1_SET_0" },
   9947   { 18433, "MPL_INTCTRL_1_SET_1" },
   9948   { 18434, "MPL_INTCTRL_1_SET_2" },
   9949   { 18435, "MPL_INTCTRL_1_SET_3" },
   9950   { 18436, "MPL_INTCTRL_1" },
   9951   { 18437, "EX_CONTEXT_1_0" },
   9952   { 18438, "EX_CONTEXT_1_1" },
   9953   { 18439, "INTCTRL_1_STATUS" },
   9954   { 18440, "INTCTRL_3_STATUS_REV0" },
   9955   { 18441, "INTERRUPT_MASK_1_0" },
   9956   { 18442, "INTERRUPT_MASK_1_1" },
   9957   { 18443, "INTERRUPT_MASK_RESET_1_0" },
   9958   { 18444, "INTERRUPT_MASK_RESET_1_1" },
   9959   { 18445, "INTERRUPT_MASK_SET_1_0" },
   9960   { 18446, "INTERRUPT_MASK_SET_1_1" },
   9961   { 18688, "SYSTEM_SAVE_1_0" },
   9962   { 18689, "SYSTEM_SAVE_1_1" },
   9963   { 18690, "SYSTEM_SAVE_1_2" },
   9964   { 18691, "SYSTEM_SAVE_1_3" },
   9965   { 18944, "MPL_INTCTRL_0_SET_0" },
   9966   { 18945, "MPL_INTCTRL_0_SET_1" },
   9967   { 18946, "MPL_INTCTRL_0_SET_2" },
   9968   { 18947, "MPL_INTCTRL_0_SET_3" },
   9969   { 18948, "MPL_INTCTRL_0" },
   9970   { 18949, "EX_CONTEXT_0_0" },
   9971   { 18950, "EX_CONTEXT_0_1" },
   9972   { 18951, "INTCTRL_0_STATUS" },
   9973   { 18952, "INTERRUPT_MASK_0_0" },
   9974   { 18953, "INTERRUPT_MASK_0_1" },
   9975   { 18954, "INTERRUPT_MASK_RESET_0_0" },
   9976   { 18955, "INTERRUPT_MASK_RESET_0_1" },
   9977   { 18956, "INTERRUPT_MASK_SET_0_0" },
   9978   { 18957, "INTERRUPT_MASK_SET_0_1" },
   9979   { 19200, "SYSTEM_SAVE_0_0" },
   9980   { 19201, "SYSTEM_SAVE_0_1" },
   9981   { 19202, "SYSTEM_SAVE_0_2" },
   9982   { 19203, "SYSTEM_SAVE_0_3" },
   9983   { 19456, "MPL_BOOT_ACCESS_SET_0" },
   9984   { 19457, "MPL_BOOT_ACCESS_SET_1" },
   9985   { 19458, "MPL_BOOT_ACCESS_SET_2" },
   9986   { 19459, "MPL_BOOT_ACCESS_SET_3" },
   9987   { 19460, "MPL_BOOT_ACCESS" },
   9988   { 19461, "CBOX_CACHEASRAM_CONFIG" },
   9989   { 19462, "CBOX_CACHE_CONFIG" },
   9990   { 19463, "CBOX_MMAP_0" },
   9991   { 19464, "CBOX_MMAP_1" },
   9992   { 19465, "CBOX_MMAP_2" },
   9993   { 19466, "CBOX_MMAP_3" },
   9994   { 19467, "CBOX_MSR" },
   9995   { 19468, "CBOX_SRC_ID" },
   9996   { 19469, "CYCLE_HIGH_MODIFY" },
   9997   { 19470, "CYCLE_LOW_MODIFY" },
   9998   { 19471, "DIAG_BCST_CTL" },
   9999   { 19472, "DIAG_BCST_MASK" },
   10000   { 19473, "DIAG_BCST_TRIGGER" },
   10001   { 19474, "DIAG_MUX_CTL" },
   10002   { 19475, "DIAG_TRACE_CTL" },
   10003   { 19476, "DIAG_TRACE_STS" },
   10004   { 19477, "IDN_DEMUX_BUF_THRESH" },
   10005   { 19478, "SBOX_CONFIG" },
   10006   { 19479, "TILE_COORD" },
   10007   { 19480, "UDN_DEMUX_BUF_THRESH" },
   10008   { 19481, "CBOX_HOME_MAP_ADDR" },
   10009   { 19482, "CBOX_HOME_MAP_DATA" },
   10010   { 19483, "CBOX_MSR1" },
   10011   { 19484, "BIG_ENDIAN_CONFIG" },
   10012   { 19485, "MEM_STRIPE_CONFIG" },
   10013   { 19486, "DIAG_TRACE_WAY" },
   10014   { 19487, "VDN_SNOOP_SHIM_CTL" },
   10015   { 19488, "PERF_COUNT_PLS" },
   10016   { 19489, "DIAG_TRACE_DATA" },
   10017   { 19712, "I_AER_0" },
   10018   { 19713, "I_AER_1" },
   10019   { 19714, "I_PHYSICAL_MEMORY_MODE" },
   10020   { 19968, "MPL_WORLD_ACCESS_SET_0" },
   10021   { 19969, "MPL_WORLD_ACCESS_SET_1" },
   10022   { 19970, "MPL_WORLD_ACCESS_SET_2" },
   10023   { 19971, "MPL_WORLD_ACCESS_SET_3" },
   10024   { 19972, "MPL_WORLD_ACCESS" },
   10025   { 19973, "SIM_SOCKET" },
   10026   { 19974, "CYCLE_HIGH" },
   10027   { 19975, "CYCLE_LOW" },
   10028   { 19976, "DONE" },
   10029   { 19977, "FAIL" },
   10030   { 19978, "INTERRUPT_CRITICAL_SECTION" },
   10031   { 19979, "PASS" },
   10032   { 19980, "SIM_CONTROL" },
   10033   { 19981, "EVENT_BEGIN" },
   10034   { 19982, "EVENT_END" },
   10035   { 19983, "TILE_WRITE_PENDING" },
   10036   { 19984, "TILE_RTF_HWM" },
   10037   { 20224, "PROC_STATUS" },
   10038   { 20225, "STATUS_SATURATE" },
   10039   { 20480, "MPL_I_ASID_SET_0" },
   10040   { 20481, "MPL_I_ASID_SET_1" },
   10041   { 20482, "MPL_I_ASID_SET_2" },
   10042   { 20483, "MPL_I_ASID_SET_3" },
   10043   { 20484, "MPL_I_ASID" },
   10044   { 20485, "I_ASID" },
   10045   { 20992, "MPL_D_ASID_SET_0" },
   10046   { 20993, "MPL_D_ASID_SET_1" },
   10047   { 20994, "MPL_D_ASID_SET_2" },
   10048   { 20995, "MPL_D_ASID_SET_3" },
   10049   { 20996, "MPL_D_ASID" },
   10050   { 20997, "D_ASID" },
   10051   { 21504, "MPL_DMA_ASID_SET_0" },
   10052   { 21505, "MPL_DMA_ASID_SET_1" },
   10053   { 21506, "MPL_DMA_ASID_SET_2" },
   10054   { 21507, "MPL_DMA_ASID_SET_3" },
   10055   { 21508, "MPL_DMA_ASID" },
   10056   { 21509, "DMA_ASID" },
   10057   { 22016, "MPL_SNI_ASID_SET_0" },
   10058   { 22017, "MPL_SNI_ASID_SET_1" },
   10059   { 22018, "MPL_SNI_ASID_SET_2" },
   10060   { 22019, "MPL_SNI_ASID_SET_3" },
   10061   { 22020, "MPL_SNI_ASID" },
   10062   { 22021, "SNI_ASID" },
   10063   { 22528, "MPL_DMA_CPL_SET_0" },
   10064   { 22529, "MPL_DMA_CPL_SET_1" },
   10065   { 22530, "MPL_DMA_CPL_SET_2" },
   10066   { 22531, "MPL_DMA_CPL_SET_3" },
   10067   { 22532, "MPL_DMA_CPL" },
   10068   { 23040, "MPL_SN_CPL_SET_0" },
   10069   { 23041, "MPL_SN_CPL_SET_1" },
   10070   { 23042, "MPL_SN_CPL_SET_2" },
   10071   { 23043, "MPL_SN_CPL_SET_3" },
   10072   { 23044, "MPL_SN_CPL" },
   10073   { 23552, "MPL_DOUBLE_FAULT_SET_0" },
   10074   { 23553, "MPL_DOUBLE_FAULT_SET_1" },
   10075   { 23554, "MPL_DOUBLE_FAULT_SET_2" },
   10076   { 23555, "MPL_DOUBLE_FAULT_SET_3" },
   10077   { 23556, "MPL_DOUBLE_FAULT" },
   10078   { 23557, "LAST_INTERRUPT_REASON" },
   10079   { 24064, "MPL_SN_STATIC_ACCESS_SET_0" },
   10080   { 24065, "MPL_SN_STATIC_ACCESS_SET_1" },
   10081   { 24066, "MPL_SN_STATIC_ACCESS_SET_2" },
   10082   { 24067, "MPL_SN_STATIC_ACCESS_SET_3" },
   10083   { 24068, "MPL_SN_STATIC_ACCESS" },
   10084   { 24069, "SN_STATIC_CTL" },
   10085   { 24070, "SN_STATIC_FIFO_DATA" },
   10086   { 24071, "SN_STATIC_FIFO_SEL" },
   10087   { 24073, "SN_STATIC_ISTATE" },
   10088   { 24074, "SN_STATIC_OSTATE" },
   10089   { 24076, "SN_STATIC_STATIC" },
   10090   { 24320, "SN_STATIC_DATA_AVAIL" },
   10091   { 24576, "MPL_AUX_PERF_COUNT_SET_0" },
   10092   { 24577, "MPL_AUX_PERF_COUNT_SET_1" },
   10093   { 24578, "MPL_AUX_PERF_COUNT_SET_2" },
   10094   { 24579, "MPL_AUX_PERF_COUNT_SET_3" },
   10095   { 24580, "MPL_AUX_PERF_COUNT" },
   10096   { 24581, "AUX_PERF_COUNT_0" },
   10097   { 24582, "AUX_PERF_COUNT_1" },
   10098   { 24583, "AUX_PERF_COUNT_CTL" },
   10099   { 24584, "AUX_PERF_COUNT_STS" },
   10100 };
   10101 
   10102 const int tilepro_num_sprs = 499;
   10103 
   10104 #endif /* DISASM_ONLY */
   10105 
   10106 #ifndef DISASM_ONLY
   10107 
   10108 #include <stdlib.h>
   10109 
   10110 static int
   10111 tilepro_spr_compare (const void *a_ptr, const void *b_ptr)
   10112 {
   10113   const struct tilepro_spr *a = (const struct tilepro_spr *) a_ptr;
   10114   const struct tilepro_spr *b = (const struct tilepro_spr *) b_ptr;
   10115 
   10116   return a->number - b->number;
   10117 }
   10118 
   10119 const char *
   10120 get_tilepro_spr_name (int num)
   10121 {
   10122   void *result;
   10123   struct tilepro_spr key;
   10124 
   10125   key.number = num;
   10126   result = bsearch ((const void *) &key, (const void *) tilepro_sprs,
   10127 		    tilepro_num_sprs, sizeof (struct tilepro_spr),
   10128 		    tilepro_spr_compare);
   10129 
   10130   if (result == NULL)
   10131     return NULL;
   10132 
   10133   {
   10134     struct tilepro_spr *result_ptr = (struct tilepro_spr *) result;
   10135 
   10136     return result_ptr->name;
   10137   }
   10138 }
   10139 
   10140 
   10141 /* Canonical name of each register. */
   10142 const char * const tilepro_register_names[] =
   10143 {
   10144   "r0",   "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
   10145   "r8",   "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
   10146   "r16",  "r17", "r18", "r19", "r20", "r21", "r22", "r23",
   10147   "r24",  "r25", "r26", "r27", "r28", "r29", "r30", "r31",
   10148   "r32",  "r33", "r34", "r35", "r36", "r37", "r38", "r39",
   10149   "r40",  "r41", "r42", "r43", "r44", "r45", "r46", "r47",
   10150   "r48",  "r49", "r50", "r51", "r52", "tp",  "sp",  "lr",
   10151   "sn",  "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero"
   10152 };
   10153 
   10154 #endif /* not DISASM_ONLY */
   10155 
   10156 
   10157 /* Given a set of bundle bits and a specific pipe, returns which
   10158    instruction the bundle contains in that pipe.  */
   10159 
   10160 const struct tilepro_opcode *
   10161 find_opcode (tilepro_bundle_bits bits, tilepro_pipeline pipe)
   10162 {
   10163   const unsigned short *table = tilepro_bundle_decoder_fsms[pipe];
   10164   int i = 0;
   10165 
   10166   while (1)
   10167     {
   10168       unsigned short bitspec = table[i];
   10169       unsigned int bitfield =
   10170 	((unsigned int) (bits >> (bitspec & 63))) & (bitspec >> 6);
   10171       unsigned short next = table[i + 1 + bitfield];
   10172 
   10173       if (next <= TILEPRO_OPC_NONE)
   10174 	return &tilepro_opcodes[next];
   10175 
   10176       i = next - TILEPRO_OPC_NONE;
   10177     }
   10178 }
   10179 
   10180 
   10181 int
   10182 parse_insn_tilepro (tilepro_bundle_bits bits,
   10183                     unsigned int pc,
   10184                     struct tilepro_decoded_instruction
   10185                     decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE])
   10186 {
   10187   int num_instructions = 0;
   10188   int pipe;
   10189   int min_pipe, max_pipe;
   10190 
   10191   if ((bits & TILEPRO_BUNDLE_Y_ENCODING_MASK) == 0)
   10192     {
   10193       min_pipe = TILEPRO_PIPELINE_X0;
   10194       max_pipe = TILEPRO_PIPELINE_X1;
   10195     }
   10196   else
   10197     {
   10198       min_pipe = TILEPRO_PIPELINE_Y0;
   10199       max_pipe = TILEPRO_PIPELINE_Y2;
   10200     }
   10201 
   10202   /* For each pipe, find an instruction that fits.  */
   10203   for (pipe = min_pipe; pipe <= max_pipe; pipe++)
   10204     {
   10205       const struct tilepro_opcode *opc;
   10206       struct tilepro_decoded_instruction *d;
   10207       int i;
   10208 
   10209       d = &decoded[num_instructions++];
   10210       opc = find_opcode (bits, (tilepro_pipeline)pipe);
   10211       d->opcode = opc;
   10212 
   10213       /* Decode each operand, sign extending, etc. as appropriate.  */
   10214       for (i = 0; i < opc->num_operands; i++)
   10215 	{
   10216 	  const struct tilepro_operand *op =
   10217 	    &tilepro_operands[opc->operands[pipe][i]];
   10218 	  int opval = op->extract (bits);
   10219 
   10220 	  if (op->is_signed)
   10221 	    {
   10222 	      /* Sign-extend the operand.  */
   10223 	      int shift = (int)((sizeof(int) * 8) - op->num_bits);
   10224 	      opval = (opval << shift) >> shift;
   10225 	    }
   10226 
   10227 	  /* Adjust PC-relative scaled branch offsets.  */
   10228 	  if (op->type == TILEPRO_OP_TYPE_ADDRESS)
   10229 	    {
   10230 	      opval *= TILEPRO_BUNDLE_SIZE_IN_BYTES;
   10231 	      opval += (int)pc;
   10232 	    }
   10233 
   10234 	  /* Record the final value.  */
   10235 	  d->operands[i] = op;
   10236 	  d->operand_values[i] = opval;
   10237 	}
   10238     }
   10239 
   10240   return num_instructions;
   10241 }
   10242