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Searched
defs:Cycle
(Results
1 - 3
of
3
) sorted by null
/system/connectivity/shill/test-scripts/
connect-disconnect
51
def
Cycle
(service_name, iteration):
110
rc =
Cycle
(service_name, total)
/external/llvm/lib/Target/AMDGPU/
R600InstrInfo.cpp
460
// only be fetched during the first
cycle
.
475
unsigned
Cycle
= getTransSwizzle(TransSwz, i);
480
if (Vector[Src.second][
Cycle
] < 0)
481
Vector[Src.second][
Cycle
] = Src.first;
482
if (Vector[Src.second][
Cycle
] != Src.first)
525
/// Instructions in Trans slot can't read gpr at
cycle
0 if they also read
526
/// a const, and can't read a gpr at
cycle
1 if they read 2 const.
536
unsigned
Cycle
= getTransSwizzle(TransSwz, i);
539
if (ConstCount > 0 &&
Cycle
== 0)
541
if (ConstCount > 1 &&
Cycle
== 1
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/external/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp
120
// to use the listed output operand
cycle
number (using operand 0 here, which
130
int
Cycle
= ItinData->getOperandCycle(DefClass, i);
131
if (
Cycle
< 0)
134
Latency = std::max(Latency, (unsigned)
Cycle
);
713
// an open question. On the A2, the isel instruction has a 2-
cycle
latency
714
// but single-
cycle
throughput. These numbers are used in combination with
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